}\r
}\r
\r
-/**\r
- Check if the device is still on port. It also checks if the AHCI controller\r
- supports the address and data count will be transferred.\r
-\r
- @param PciIo The PCI IO protocol instance.\r
- @param Port The number of port.\r
-\r
- @retval EFI_SUCCESS The device is attached to port and the transfer data is\r
- supported by AHCI controller.\r
- @retval EFI_UNSUPPORTED The transfer address and count is not supported by AHCI\r
- controller.\r
- @retval EFI_NOT_READY The physical communication between AHCI controller and device\r
- is not ready.\r
-\r
-**/\r
-EFI_STATUS\r
-EFIAPI\r
-AhciCheckDeviceStatus (\r
- IN EFI_PCI_IO_PROTOCOL *PciIo,\r
- IN UINT8 Port\r
- )\r
-{\r
- UINT32 Data;\r
- UINT32 Offset;\r
-\r
- Offset = EFI_AHCI_PORT_START + Port * EFI_AHCI_PORT_REG_WIDTH + EFI_AHCI_PORT_SSTS;\r
-\r
- Data = AhciReadReg (PciIo, Offset) & EFI_AHCI_PORT_SSTS_DET_MASK;\r
-\r
- if (Data == EFI_AHCI_PORT_SSTS_DET_PCE) {\r
- return EFI_SUCCESS;\r
- }\r
-\r
- return EFI_NOT_READY;\r
-}\r
\r
/**\r
\r
return EFI_SUCCESS;\r
}\r
\r
-/**\r
- Do AHCI port reset.\r
-\r
- @param PciIo The PCI IO protocol instance.\r
- @param Port The number of port.\r
- @param Timeout The timeout value of reset, uses 100ns as a unit.\r
-\r
- @retval EFI_DEVICE_ERROR The port reset unsuccessfully\r
- @retval EFI_TIMEOUT The reset operation is time out.\r
- @retval EFI_SUCCESS The port reset successfully.\r
-\r
-**/\r
-EFI_STATUS\r
-EFIAPI\r
-AhciPortReset (\r
- IN EFI_PCI_IO_PROTOCOL *PciIo,\r
- IN UINT8 Port,\r
- IN UINT64 Timeout\r
- )\r
-{\r
- EFI_STATUS Status;\r
- UINT32 Offset;\r
-\r
- AhciClearPortStatus (PciIo, Port);\r
-\r
- AhciStopCommand (PciIo, Port, Timeout);\r
-\r
- AhciDisableFisReceive (PciIo, Port, Timeout);\r
-\r
- AhciEnableFisReceive (PciIo, Port, Timeout);\r
-\r
- Offset = EFI_AHCI_PORT_START + Port * EFI_AHCI_PORT_REG_WIDTH + EFI_AHCI_PORT_SCTL;\r
-\r
- AhciOrReg (PciIo, Offset, EFI_AHCI_PORT_SCTL_DET_INIT);\r
-\r
- //\r
- // wait 5 millisecond before de-assert DET\r
- //\r
- MicroSecondDelay (5000);\r
-\r
- AhciAndReg (PciIo, Offset, (UINT32)EFI_AHCI_PORT_SCTL_MASK);\r
-\r
- //\r
- // wait 5 millisecond before de-assert DET\r
- //\r
- MicroSecondDelay (5000);\r
-\r
- //\r
- // Wait for communication to be re-established\r
- //\r
- Offset = EFI_AHCI_PORT_START + Port * EFI_AHCI_PORT_REG_WIDTH + EFI_AHCI_PORT_SSTS;\r
- Status = AhciWaitMmioSet (\r
- PciIo,\r
- Offset,\r
- EFI_AHCI_PORT_SSTS_DET_MASK,\r
- EFI_AHCI_PORT_SSTS_DET_PCE,\r
- Timeout\r
- );\r
-\r
- if (EFI_ERROR (Status)) {\r
- DEBUG ((EFI_D_ERROR, "Port %d COMRESET failed: %r\n", Port, Status));\r
- return Status;\r
- }\r
-\r
- Offset = EFI_AHCI_PORT_START + Port * EFI_AHCI_PORT_REG_WIDTH + EFI_AHCI_PORT_SERR;\r
- AhciOrReg (PciIo, Offset, EFI_AHCI_PORT_ERR_CLEAR);\r
-\r
- return EFI_SUCCESS;\r
-}\r
\r
/**\r
Do AHCI HBA reset.\r