goto ON_EXIT;\r
}\r
}\r
- \r
+\r
//\r
// Clean up the asynchronous transfers, currently only\r
// interrupt supports asynchronous operation.\r
\r
//\r
// Software must not write a one to this field unless the host controller\r
- // is in the Halted state. Doing so will yield undefined results. \r
+ // is in the Halted state. Doing so will yield undefined results.\r
// refers to Spec[EHCI1.0-2.3.1]\r
- // \r
+ //\r
if (!EHC_REG_BIT_IS_SET (Ehc, EHC_USBSTS_OFFSET, USBSTS_HALT)) {\r
Status = EFI_DEVICE_ERROR;\r
break;\r
break;\r
}\r
}\r
- \r
+\r
//\r
// Set one to PortReset bit must also set zero to PortEnable bit\r
//\r
/**\r
Create and initialize a USB2_HC_DEV\r
\r
- @param PciIo The PciIo on this device\r
+ @param PciIo The PciIo on this device\r
+ @param OriginalPciAttributes Original PCI attributes\r
\r
@return The allocated and initialized USB2_HC_DEV structure\r
@return if created, otherwise NULL.\r
STATIC\r
USB2_HC_DEV *\r
EhcCreateUsb2Hc (\r
- IN EFI_PCI_IO_PROTOCOL *PciIo\r
+ IN EFI_PCI_IO_PROTOCOL *PciIo,\r
+ IN UINT64 OriginalPciAttributes\r
)\r
{\r
USB2_HC_DEV *Ehc;\r
Ehc->Usb2Hc.MajorRevision = 0x1;\r
Ehc->Usb2Hc.MinorRevision = 0x1;\r
\r
- Ehc->PciIo = PciIo;\r
+ Ehc->PciIo = PciIo;\r
+ Ehc->OriginalPciAttributes = OriginalPciAttributes;\r
\r
InitializeListHead (&Ehc->AsyncIntTransfers);\r
\r
USB2_HC_DEV *Ehc;\r
EFI_PCI_IO_PROTOCOL *PciIo;\r
UINT64 Supports;\r
+ UINT64 OriginalPciAttributes;\r
\r
//\r
// Open the PciIo Protocol, then enable the USB host controller\r
return EFI_DEVICE_ERROR;\r
}\r
\r
+ //\r
+ // Save original PCI attributes\r
+ //\r
+ Status = PciIo->Attributes (\r
+ PciIo,\r
+ EfiPciIoAttributeOperationGet,\r
+ 0,\r
+ &OriginalPciAttributes\r
+ );\r
+\r
+ if (EFI_ERROR (Status)) {\r
+ return Status;\r
+ }\r
+\r
Status = PciIo->Attributes (\r
PciIo,\r
EfiPciIoAttributeOperationSupported,\r
//\r
// Create then install USB2_HC_PROTOCOL\r
//\r
- Ehc = EhcCreateUsb2Hc (PciIo);\r
+ Ehc = EhcCreateUsb2Hc (PciIo, OriginalPciAttributes);\r
\r
if (Ehc == NULL) {\r
EHC_ERROR (("EhcDriverBindingStart: failed to create USB2_HC\n"));\r
gBS->FreePool (Ehc);\r
\r
CLOSE_PCIIO:\r
+ //\r
+ // Restore original PCI attributes\r
+ //\r
+ PciIo->Attributes (\r
+ PciIo,\r
+ EfiPciIoAttributeOperationSet,\r
+ OriginalPciAttributes,\r
+ NULL\r
+ );\r
+\r
gBS->CloseProtocol (\r
Controller,\r
&gEfiPciIoProtocolGuid,\r
EFI_USB2_HC_PROTOCOL *Usb2Hc;\r
EFI_PCI_IO_PROTOCOL *PciIo;\r
USB2_HC_DEV *Ehc;\r
- UINT64 Supports;\r
\r
//\r
// Test whether the Controller handler passed in is a valid\r
}\r
\r
//\r
- // Disable the USB Host Controller\r
+ // Restore original PCI attributes\r
//\r
- Status = PciIo->Attributes (\r
- PciIo,\r
- EfiPciIoAttributeOperationSupported,\r
- 0,\r
- &Supports\r
- );\r
- if (!EFI_ERROR (Status)) {\r
- Supports &= EFI_PCI_DEVICE_ENABLE;\r
- Status = PciIo->Attributes (\r
- PciIo,\r
- EfiPciIoAttributeOperationDisable,\r
- Supports,\r
- NULL\r
- );\r
- }\r
+ PciIo->Attributes (\r
+ PciIo,\r
+ EfiPciIoAttributeOperationSet,\r
+ Ehc->OriginalPciAttributes,\r
+ NULL\r
+ );\r
\r
gBS->CloseProtocol (\r
Controller,\r
Controller\r
);\r
\r
- gBS->FreePool (Ehc);\r
+ FreePool (Ehc);\r
+\r
return EFI_SUCCESS;\r
}\r
\r