/** @file\r
Private Header file for Usb Host Controller PEIM\r
\r
-Copyright (c) 2010 - 2015, Intel Corporation. All rights reserved.<BR>\r
+Copyright (c) 2010 - 2017, Intel Corporation. All rights reserved.<BR>\r
\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions\r
\r
#include <Ppi/UsbController.h>\r
#include <Ppi/Usb2HostController.h>\r
+#include <Ppi/IoMmu.h>\r
+#include <Ppi/EndOfPeiPhase.h>\r
\r
#include <Library/DebugLib.h>\r
#include <Library/PeimEntryPoint.h>\r
struct _PEI_USB2_HC_DEV {\r
UINTN Signature;\r
PEI_USB2_HOST_CONTROLLER_PPI Usb2HostControllerPpi;\r
- EFI_PEI_PPI_DESCRIPTOR PpiDescriptor; \r
+ EDKII_IOMMU_PPI *IoMmu;\r
+ EFI_PEI_PPI_DESCRIPTOR PpiDescriptor;\r
+ //\r
+ // EndOfPei callback is used to stop the XHC DMA operation\r
+ // after exit PEI phase.\r
+ //\r
+ EFI_PEI_NOTIFY_DESCRIPTOR EndOfPeiNotifyList;\r
UINT32 UsbHostControllerBaseAddress;\r
PEI_URB *Urb;\r
USBHC_MEM_POOL *MemPool;\r
// Periodic (interrupt) transfer schedule data:\r
//\r
VOID *PeriodFrame; // Mapped as common buffer \r
- VOID *PeriodFrameHost;\r
VOID *PeriodFrameMap;\r
\r
PEI_EHC_QH *PeriodOne;\r
};\r
\r
#define PEI_RECOVERY_USB_EHC_DEV_FROM_EHCI_THIS(a) CR (a, PEI_USB2_HC_DEV, Usb2HostControllerPpi, USB2_HC_DEV_SIGNATURE)\r
+#define PEI_RECOVERY_USB_EHC_DEV_FROM_THIS_NOTIFY(a) CR (a, PEI_USB2_HC_DEV, EndOfPeiNotifyList, USB2_HC_DEV_SIGNATURE)\r
\r
/**\r
@param EhcDev EHCI Device.\r
\r
/**\r
Release the memory management pool.\r
- \r
+\r
+ @param Ehc The EHCI device.\r
@param Pool The USB memory pool to free.\r
\r
@retval EFI_DEVICE_ERROR Fail to free the memory pool.\r
**/\r
EFI_STATUS\r
UsbHcFreeMemPool (\r
+ IN PEI_USB2_HC_DEV *Ehc,\r
IN USBHC_MEM_POOL *Pool\r
)\r
;\r
/**\r
Free the allocated memory back to the memory pool.\r
\r
+ @param Ehc The EHCI device.\r
@param Pool The memory pool of the host controller.\r
@param Mem The memory to free.\r
@param Size The size of the memory to free.\r
**/\r
VOID\r
UsbHcFreeMem (\r
+ IN PEI_USB2_HC_DEV *Ehc,\r
IN USBHC_MEM_POOL *Pool,\r
IN VOID *Mem,\r
IN UINTN Size\r
)\r
;\r
\r
+/**\r
+ Provides the controller-specific addresses required to access system memory from a\r
+ DMA bus master.\r
+\r
+ @param IoMmu Pointer to IOMMU PPI.\r
+ @param Operation Indicates if the bus master is going to read or write to system memory.\r
+ @param HostAddress The system memory address to map to the PCI controller.\r
+ @param NumberOfBytes On input the number of bytes to map. On output the number of bytes\r
+ that were mapped.\r
+ @param DeviceAddress The resulting map address for the bus master PCI controller to use to\r
+ access the hosts HostAddress.\r
+ @param Mapping A resulting value to pass to Unmap().\r
+\r
+ @retval EFI_SUCCESS The range was mapped for the returned NumberOfBytes.\r
+ @retval EFI_UNSUPPORTED The HostAddress cannot be mapped as a common buffer.\r
+ @retval EFI_INVALID_PARAMETER One or more parameters are invalid.\r
+ @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.\r
+ @retval EFI_DEVICE_ERROR The system hardware could not map the requested address.\r
+\r
+**/\r
+EFI_STATUS\r
+IoMmuMap (\r
+ IN EDKII_IOMMU_PPI *IoMmu,\r
+ IN EDKII_IOMMU_OPERATION Operation,\r
+ IN VOID *HostAddress,\r
+ IN OUT UINTN *NumberOfBytes,\r
+ OUT EFI_PHYSICAL_ADDRESS *DeviceAddress,\r
+ OUT VOID **Mapping\r
+ );\r
+\r
+/**\r
+ Completes the Map() operation and releases any corresponding resources.\r
+\r
+ @param IoMmu Pointer to IOMMU PPI.\r
+ @param Mapping The mapping value returned from Map().\r
+\r
+**/\r
+VOID\r
+IoMmuUnmap (\r
+ IN EDKII_IOMMU_PPI *IoMmu,\r
+ IN VOID *Mapping\r
+ );\r
+\r
+/**\r
+ Allocates pages that are suitable for an OperationBusMasterCommonBuffer or\r
+ OperationBusMasterCommonBuffer64 mapping.\r
+\r
+ @param IoMmu Pointer to IOMMU PPI.\r
+ @param Pages The number of pages to allocate.\r
+ @param HostAddress A pointer to store the base system memory address of the\r
+ allocated range.\r
+ @param DeviceAddress The resulting map address for the bus master PCI controller to use to\r
+ access the hosts HostAddress.\r
+ @param Mapping A resulting value to pass to Unmap().\r
+\r
+ @retval EFI_SUCCESS The requested memory pages were allocated.\r
+ @retval EFI_UNSUPPORTED Attributes is unsupported. The only legal attribute bits are\r
+ MEMORY_WRITE_COMBINE and MEMORY_CACHED.\r
+ @retval EFI_INVALID_PARAMETER One or more parameters are invalid.\r
+ @retval EFI_OUT_OF_RESOURCES The memory pages could not be allocated.\r
+\r
+**/\r
+EFI_STATUS\r
+IoMmuAllocateBuffer (\r
+ IN EDKII_IOMMU_PPI *IoMmu,\r
+ IN UINTN Pages,\r
+ OUT VOID **HostAddress,\r
+ OUT EFI_PHYSICAL_ADDRESS *DeviceAddress,\r
+ OUT VOID **Mapping\r
+ );\r
+\r
+/**\r
+ Frees memory that was allocated with AllocateBuffer().\r
+\r
+ @param IoMmu Pointer to IOMMU PPI.\r
+ @param Pages The number of pages to free.\r
+ @param HostAddress The base system memory address of the allocated range.\r
+ @param Mapping The mapping value returned from Map().\r
+\r
+**/\r
+VOID\r
+IoMmuFreeBuffer (\r
+ IN EDKII_IOMMU_PPI *IoMmu,\r
+ IN UINTN Pages,\r
+ IN VOID *HostAddress,\r
+ IN VOID *Mapping\r
+ );\r
+\r
+/**\r
+ Initialize IOMMU.\r
+\r
+ @param IoMmu Pointer to pointer to IOMMU PPI.\r
+\r
+**/\r
+VOID\r
+IoMmuInit (\r
+ OUT EDKII_IOMMU_PPI **IoMmu\r
+ );\r
+\r
#endif\r