MdeModulePkg/Pci: Fixed Asserts in SCT PCIIO Protocol Test.

[mirror_edk2.git] / MdeModulePkg / Bus / Pci / NonDiscoverablePciDeviceDxe / NonDiscoverablePciDeviceIo.h

diff --git a/MdeModulePkg/Bus/Pci/NonDiscoverablePciDeviceDxe/NonDiscoverablePciDeviceIo.h b/MdeModulePkg/Bus/Pci/NonDiscoverablePciDeviceDxe/NonDiscoverablePciDeviceIo.h
index bc0a3d3258f9bab4a05750fa51613d6947289514..15541c281153d3924b4750808a4e7fa162a6d962 100644 (file)
--- a/MdeModulePkg/Bus/Pci/NonDiscoverablePciDeviceDxe/NonDiscoverablePciDeviceIo.h
+++ b/MdeModulePkg/Bus/Pci/NonDiscoverablePciDeviceDxe/NonDiscoverablePciDeviceIo.h
@@ -2,19 +2,15 @@
 \r
   Copyright (C) 2016, Linaro Ltd. All rights reserved.<BR>\r
 \r
-  This program and the accompanying materials are licensed and made available\r
-  under the terms and conditions of the BSD License which accompanies this\r
-  distribution. The full text of the license may be found at\r
-  http://opensource.org/licenses/bsd-license.php\r
-\r
-  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, WITHOUT\r
-  WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+  SPDX-License-Identifier: BSD-2-Clause-Patent\r
 \r
 **/\r
 \r
 #ifndef __NON_DISCOVERABLE_PCI_DEVICE_IO_H__\r
 #define __NON_DISCOVERABLE_PCI_DEVICE_IO_H__\r
 \r
+#include <PiDxe.h>\r
+\r
 #include <Library/BaseMemoryLib.h>\r
 #include <Library/DebugLib.h>\r
 #include <Library/MemoryAllocationLib.h>\r
@@ -25,6 +21,7 @@
 \r
 #include <Protocol/ComponentName.h>\r
 #include <Protocol/NonDiscoverableDevice.h>\r
+#include <Protocol/Cpu.h>\r
 #include <Protocol/PciIo.h>\r
 \r
 #define NON_DISCOVERABLE_PCI_DEVICE_SIG SIGNATURE_32 ('P', 'P', 'I', 'D')\r
@@ -33,11 +30,35 @@
         CR (PciIoPointer, NON_DISCOVERABLE_PCI_DEVICE, PciIo, \\r
             NON_DISCOVERABLE_PCI_DEVICE_SIG)\r
 \r
+#define DEV_SUPPORTED_ATTRIBUTES \\r
+    (EFI_PCI_DEVICE_ENABLE | EFI_PCI_IO_ATTRIBUTE_DUAL_ADDRESS_CYCLE)\r
+\r
 #define PCI_ID_VENDOR_UNKNOWN         0xffff\r
 #define PCI_ID_DEVICE_DONTCARE        0x0000\r
 \r
 #define PCI_MAX_BARS                  6\r
 \r
+extern EFI_CPU_ARCH_PROTOCOL      *mCpu;\r
+\r
+typedef struct {\r
+  //\r
+  // The linked-list next pointer\r
+  //\r
+  LIST_ENTRY          List;\r
+  //\r
+  // The address of the uncached allocation\r
+  //\r
+  VOID                *HostAddress;\r
+  //\r
+  // The number of pages in the allocation\r
+  //\r
+  UINTN               NumPages;\r
+  //\r
+  // The attributes of the allocation\r
+  //\r
+  UINT64              Attributes;\r
+} NON_DISCOVERABLE_DEVICE_UNCACHED_ALLOCATION;\r
+\r
 typedef struct {\r
   UINT32                    Signature;\r
   //\r
@@ -71,8 +92,25 @@ typedef struct {
   // Whether this device has been enabled\r
   //\r
   BOOLEAN                   Enabled;\r
+  //\r
+  // Linked list to keep track of uncached allocations performed\r
+  // on behalf of this device\r
+  //\r
+  LIST_ENTRY                UncachedAllocationList;\r
+  //\r
+  // Unique ID for this device instance: needed so that we can report unique\r
+  // segment/bus/device number for each device instance. Note that this number\r
+  // may change when disconnecting/reconnecting the driver.\r
+  //\r
+  UINTN                     UniqueId;\r
 } NON_DISCOVERABLE_PCI_DEVICE;\r
 \r
+/**\r
+  Initialize PciIo Protocol.\r
+\r
+  @param  Device      Point to NON_DISCOVERABLE_PCI_DEVICE instance.\r
+\r
+**/\r
 VOID\r
 InitializePciIoProtocol (\r
   NON_DISCOVERABLE_PCI_DEVICE     *Device\r