AddrRangeMin = Configuration1->AddrRangeMin;\r
Configuration1->AddrRangeMin = Configuration2->AddrRangeMin;\r
Configuration2->AddrRangeMin = AddrRangeMin;\r
- \r
+\r
AddrLen = Configuration1->AddrLen;\r
Configuration1->AddrLen = Configuration2->AddrLen;\r
Configuration2->AddrLen = AddrLen;\r
Status = PciAllocateBusNumber (RootBridgeDev, SubBusNumber, PaddedBusRange, &SubBusNumber);\r
if (EFI_ERROR (Status)) {\r
return Status;\r
- } \r
+ }\r
\r
//\r
// Find the bus range which contains the higest bus number, then returns the number of buses\r
Configuration++;\r
Desc = Configuration->Desc;\r
Configuration->Desc = ACPI_END_TAG_DESCRIPTOR;\r
- \r
+\r
//\r
// Set bus number\r
//\r
//\r
Configuration->Desc = Desc;\r
(Configuration - 1)->AddrLen = AddrLen;\r
- \r
+\r
return Status;\r
}\r
\r
Phase,\r
ChipsetEntry\r
);\r
- } \r
+ }\r
\r
Status = PciResAlloc->NotifyPhase (\r
PciResAlloc,\r
return EFI_INVALID_PARAMETER;\r
}\r
}\r
- \r
+\r
Status = gBS->OpenProtocol (\r
Controller,\r
&gEfiPciIoProtocolGuid,\r