Fixed potential issues to release resources when error occurs.

[mirror_edk2.git] / MdeModulePkg / Bus / Pci / UhciDxe / Uhci.c

diff --git a/MdeModulePkg/Bus/Pci/UhciDxe/Uhci.c b/MdeModulePkg/Bus/Pci/UhciDxe/Uhci.c
index 8cda00fbda9f106cdc140ecf48ab8ab6f98b7e7d..b52510041f8e6ecf531a055eba806a4fd9e18af8 100644 (file)
--- a/MdeModulePkg/Bus/Pci/UhciDxe/Uhci.c
+++ b/MdeModulePkg/Bus/Pci/UhciDxe/Uhci.c
@@ -56,38 +56,27 @@ UhciReset (
     //\r
     // Stop schedule and set the Global Reset bit in the command register\r
     //\r
-    UhciStopHc (Uhc, STALL_1_SECOND);\r
+    UhciStopHc (Uhc, UHC_GENERIC_TIMEOUT);\r
     UhciSetRegBit (Uhc->PciIo, USBCMD_OFFSET, USBCMD_GRESET);\r
 \r
-    //\r
-    // Wait 50ms for root port to let reset complete\r
-    // See UHCI spec page122 Reset signaling\r
-    //\r
-    gBS->Stall (ROOT_PORT_REST_TIME);\r
+    gBS->Stall (UHC_ROOT_PORT_RESET_STALL);\r
 \r
     //\r
     // Clear the Global Reset bit to zero.\r
     //\r
     UhciClearRegBit (Uhc->PciIo, USBCMD_OFFSET, USBCMD_GRESET);\r
 \r
-    //\r
-    // UHCI spec page120 reset recovery time\r
-    //\r
-    gBS->Stall (PORT_RESET_RECOVERY_TIME);\r
+    gBS->Stall (UHC_ROOT_PORT_RECOVERY_STALL);\r
     break;\r
 \r
   case EFI_USB_HC_RESET_HOST_CONTROLLER:\r
     //\r
     // Stop schedule and set Host Controller Reset bit to 1\r
     //\r
-    UhciStopHc (Uhc, STALL_1_SECOND);\r
+    UhciStopHc (Uhc, UHC_GENERIC_TIMEOUT);\r
     UhciSetRegBit (Uhc->PciIo, USBCMD_OFFSET, USBCMD_HCRESET);\r
 \r
-    //\r
-    // this bit will be reset by Host Controller when reset is completed.\r
-    // wait 10ms to let reset complete\r
-    //\r
-    gBS->Stall (PORT_RESET_RECOVERY_TIME);\r
+    gBS->Stall (UHC_ROOT_PORT_RECOVERY_STALL);\r
     break;\r
 \r
   default:\r
@@ -202,7 +191,7 @@ UhciSetState (
 \r
   switch (State) {\r
   case EfiUsbHcStateHalt:\r
-    Status = UhciStopHc (Uhc, STALL_1_SECOND);\r
+    Status = UhciStopHc (Uhc, UHC_GENERIC_TIMEOUT);\r
     break;\r
 \r
   case EfiUsbHcStateOperational:\r
@@ -228,7 +217,7 @@ UhciSetState (
       //\r
       // wait 20ms to let resume complete (20ms is specified by UHCI spec)\r
       //\r
-      gBS->Stall (FORCE_GLOBAL_RESUME_TIME);\r
+      gBS->Stall (UHC_FORCE_GLOBAL_RESUME_STALL);\r
 \r
       //\r
       // Write FGR bit to 0 and EGSM(Enter Global Suspend Mode) bit to 0\r
@@ -1828,8 +1817,6 @@ Uhci2AsyncIsochronousTransfer (
   return EFI_UNSUPPORTED;\r
 }\r
 \r
-//@MT: EFI_DRIVER_ENTRY_POINT (UhciDriverEntryPoint)\r
-\r
 EFI_STATUS\r
 EFIAPI\r
 UhciDriverEntryPoint (\r
@@ -1854,14 +1841,13 @@ UhciDriverEntryPoint (
 \r
 --*/\r
 {\r
-  return EfiLibInstallAllDriverProtocols (\r
+  return EfiLibInstallDriverBindingComponentName2 (\r
            ImageHandle,\r
            SystemTable,\r
            &gUhciDriverBinding,\r
            ImageHandle,\r
            &gUhciComponentName,\r
-           NULL,\r
-           NULL\r
+           &gUhciComponentName2\r
            );\r
 }\r
 \r
@@ -1955,7 +1941,8 @@ ON_EXIT:
 STATIC\r
 USB_HC_DEV *\r
 UhciAllocateDev (\r
-  IN EFI_PCI_IO_PROTOCOL    *PciIo\r
+  IN EFI_PCI_IO_PROTOCOL    *PciIo,\r
+  IN UINT64                 OriginalPciAttributes\r
   )\r
 {\r
   USB_HC_DEV  *Uhc;\r
@@ -2004,8 +1991,9 @@ UhciAllocateDev (
   Uhc->Usb2Hc.MajorRevision             = 0x1;\r
   Uhc->Usb2Hc.MinorRevision             = 0x1;\r
 \r
-  Uhc->PciIo   = PciIo;\r
-  Uhc->MemPool = UsbHcInitMemPool (PciIo, TRUE, 0);\r
+  Uhc->PciIo                 = PciIo;\r
+  Uhc->OriginalPciAttributes = OriginalPciAttributes;\r
+  Uhc->MemPool               = UsbHcInitMemPool (PciIo, TRUE, 0);\r
 \r
   if (Uhc->MemPool == NULL) {\r
     Status = EFI_OUT_OF_RESOURCES;\r
@@ -2087,7 +2075,7 @@ UhciCleanDevUp (
   // Uninstall the USB_HC and USB_HC2 protocol, then disable the controller\r
   //\r
   Uhc = UHC_FROM_USB_HC_PROTO (This);\r
-  UhciStopHc (Uhc, STALL_1_SECOND);\r
+  UhciStopHc (Uhc, UHC_GENERIC_TIMEOUT);\r
 \r
   gBS->UninstallProtocolInterface (\r
         Controller,\r
@@ -2104,12 +2092,15 @@ UhciCleanDevUp (
   UhciFreeAllAsyncReq (Uhc);\r
   UhciDestoryFrameList (Uhc);\r
 \r
+  //\r
+  // Restore original PCI attributes\r
+  //\r
   Uhc->PciIo->Attributes (\r
-                Uhc->PciIo,\r
-                EfiPciIoAttributeOperationDisable,\r
-                EFI_PCI_DEVICE_ENABLE,\r
-                NULL\r
-                );\r
+                  Uhc->PciIo,\r
+                  EfiPciIoAttributeOperationSet,\r
+                  Uhc->OriginalPciAttributes,\r
+                  NULL\r
+                  );\r
 \r
   UhciFreeDev (Uhc);\r
 }\r
@@ -2140,6 +2131,9 @@ UhciDriverBindingStart (
   EFI_STATUS          Status;\r
   EFI_PCI_IO_PROTOCOL *PciIo;\r
   USB_HC_DEV          *Uhc;\r
+  UINT64              Supports;\r
+  UINT64              OriginalPciAttributes;\r
+  BOOLEAN             PciAttributesSaved;\r
 \r
   //\r
   // Open PCIIO, then enable the EHC device and turn off emulation\r
@@ -2158,20 +2152,45 @@ UhciDriverBindingStart (
     return Status;\r
   }\r
 \r
+  PciAttributesSaved = FALSE;\r
+  //\r
+  // Save original PCI attributes\r
+  //\r
+  Status = PciIo->Attributes (\r
+                    PciIo,\r
+                    EfiPciIoAttributeOperationGet,\r
+                    0,\r
+                    &OriginalPciAttributes\r
+                    );\r
+\r
+  if (EFI_ERROR (Status)) {\r
+    goto CLOSE_PCIIO;\r
+  }\r
+  PciAttributesSaved = TRUE;\r
+\r
   UhciTurnOffUsbEmulation (PciIo);\r
 \r
   Status = PciIo->Attributes (\r
                     PciIo,\r
-                    EfiPciIoAttributeOperationEnable,\r
-                    EFI_PCI_DEVICE_ENABLE,\r
-                    NULL\r
+                    EfiPciIoAttributeOperationSupported,\r
+                    0,\r
+                    &Supports\r
                     );\r
+  if (!EFI_ERROR (Status)) {\r
+    Supports &= EFI_PCI_DEVICE_ENABLE;\r
+    Status = PciIo->Attributes (\r
+                      PciIo,\r
+                      EfiPciIoAttributeOperationEnable,\r
+                      Supports,\r
+                      NULL\r
+                      );\r
+  }\r
 \r
   if (EFI_ERROR (Status)) {\r
     goto CLOSE_PCIIO;\r
   }\r
 \r
-  Uhc = UhciAllocateDev (PciIo);\r
+  Uhc = UhciAllocateDev (PciIo, OriginalPciAttributes);\r
 \r
   if (Uhc == NULL) {\r
     Status = EFI_OUT_OF_RESOURCES;\r
@@ -2191,7 +2210,7 @@ UhciDriverBindingStart (
   Status = gBS->SetTimer (\r
                   Uhc->AsyncIntMonitor,\r
                   TimerPeriodic,\r
-                  INTERRUPT_POLLING_TIME\r
+                  UHC_ASYNC_POLL_INTERVAL\r
                   );\r
 \r
   if (EFI_ERROR (Status)) {\r
@@ -2219,13 +2238,22 @@ UhciDriverBindingStart (
   //\r
   Uhc->CtrlNameTable = NULL;\r
 \r
-  AddUnicodeString (\r
+  AddUnicodeString2 (\r
     "eng",\r
     gUhciComponentName.SupportedLanguages,\r
     &Uhc->CtrlNameTable,\r
-    L"Usb Universal Host Controller"\r
+    L"Usb Universal Host Controller",\r
+    TRUE\r
+    );\r
+  AddUnicodeString2 (\r
+    "en",\r
+    gUhciComponentName2.SupportedLanguages,\r
+    &Uhc->CtrlNameTable,\r
+    L"Usb Universal Host Controller",\r
+    FALSE\r
     );\r
 \r
+\r
   //\r
   // Start the UHCI hardware, also set its reclamation point to 64 bytes\r
   //\r
@@ -2237,6 +2265,18 @@ FREE_UHC:
   UhciFreeDev (Uhc);\r
 \r
 CLOSE_PCIIO:\r
+  if (PciAttributesSaved == TRUE) {\r
+    //\r
+    // Restore original PCI attributes\r
+    //\r
+    PciIo->Attributes (\r
+                    PciIo,\r
+                    EfiPciIoAttributeOperationSet,\r
+                    OriginalPciAttributes,\r
+                    NULL\r
+                    );\r
+  }\r
+\r
   gBS->CloseProtocol (\r
         Controller,\r
         &gEfiPciIoProtocolGuid,\r