XhcWriteOpReg (Xhc, XHC_CRCR_OFFSET, XHC_LOW_32BIT(CmdRingPhy));\r
XhcWriteOpReg (Xhc, XHC_CRCR_OFFSET + 4, XHC_HIGH_32BIT (CmdRingPhy));\r
\r
- DEBUG ((EFI_D_INFO, "XhcInitSched:XHC_CRCR=0x%x\n", Xhc->CmdRing.RingSeg0));\r
-\r
//\r
// Disable the 'interrupter enable' bit in USB_CMD\r
// and clear IE & IP bit in all Interrupter X Management Registers.\r
// Allocate EventRing for Cmd, Ctrl, Bulk, Interrupt, AsynInterrupt transfer\r
//\r
CreateEventRing (Xhc, &Xhc->EventRing);\r
- DEBUG ((EFI_D_INFO, "XhcInitSched:XHC_EVENTRING=0x%x\n", Xhc->EventRing.EventRingSeg0));\r
+ DEBUG ((DEBUG_INFO, "XhcInitSched: Created CMD ring [%p~%p) EVENT ring [%p~%p)\n",\r
+ Xhc->CmdRing.RingSeg0, (UINTN)Xhc->CmdRing.RingSeg0 + sizeof (TRB_TEMPLATE) * CMD_RING_TRB_NUMBER,\r
+ Xhc->EventRing.EventRingSeg0, (UINTN)Xhc->EventRing.EventRingSeg0 + sizeof (TRB_TEMPLATE) * EVENT_RING_TRB_NUMBER\r
+ ));\r
}\r
\r
/**\r
@param Urb The urb which doesn't get completed in a specified timeout range.\r
\r
@retval EFI_SUCCESS The dequeuing of the TDs is successful.\r
+ @retval EFI_ALREADY_STARTED The Urb is finished so no deque is needed.\r
@retval Others Failed to stop the endpoint and dequeue the TDs.\r
\r
**/\r
//\r
// 1) Send Stop endpoint command to stop xHC from executing of the TDs on the endpoint\r
//\r
- Status = XhcStopEndpoint(Xhc, SlotId, Dci);\r
+ Status = XhcStopEndpoint(Xhc, SlotId, Dci, Urb);\r
if (EFI_ERROR(Status)) {\r
DEBUG ((EFI_D_ERROR, "XhcDequeueTrbFromEndpoint: Stop Endpoint Failed, Status = %r\n", Status));\r
goto Done;\r
//\r
// 2)Set dequeue pointer\r
//\r
- Status = XhcSetTrDequeuePointer(Xhc, SlotId, Dci, Urb);\r
- if (EFI_ERROR(Status)) {\r
- DEBUG ((EFI_D_ERROR, "XhcDequeueTrbFromEndpoint: Set Transfer Ring Dequeue Pointer Failed, Status = %r\n", Status));\r
- goto Done;\r
+ if (Urb->Finished && Urb->Result == EFI_USB_NOERROR) {\r
+ //\r
+ // Return Already Started to indicate the pending URB is finished.\r
+ // This fixes BULK data loss when transfer is detected as timeout\r
+ // but finished just before stopping endpoint.\r
+ //\r
+ Status = EFI_ALREADY_STARTED;\r
+ DEBUG ((DEBUG_INFO, "XhcDequeueTrbFromEndpoint: Pending URB is finished: Length Actual/Expect = %d/%d!\n", Urb->Completed, Urb->DataLen));\r
+ } else {\r
+ Status = XhcSetTrDequeuePointer(Xhc, SlotId, Dci, Urb);\r
+ if (EFI_ERROR (Status)) {\r
+ DEBUG ((DEBUG_ERROR, "XhcDequeueTrbFromEndpoint: Set Transfer Ring Dequeue Pointer Failed, Status = %r\n", Status));\r
+ goto Done;\r
+ }\r
}\r
\r
//\r
}\r
\r
/**\r
- Check if the Trb is a transaction of the URBs in XHCI's asynchronous transfer list.\r
+ Check if the Trb is a transaction of the URB.\r
\r
- @param Xhc The XHCI Instance.\r
- @param Trb The TRB to be checked.\r
- @param Urb The pointer to the matched Urb.\r
+ @param Trb The TRB to be checked\r
+ @param Urb The URB to be checked.\r
\r
- @retval TRUE The Trb is matched with a transaction of the URBs in the async list.\r
- @retval FALSE The Trb is not matched with any URBs in the async list.\r
+ @retval TRUE It is a transaction of the URB.\r
+ @retval FALSE It is not any transaction of the URB.\r
\r
**/\r
BOOLEAN\r
-IsAsyncIntTrb (\r
+IsTransferRingTrb (\r
IN USB_XHCI_INSTANCE *Xhc,\r
IN TRB_TEMPLATE *Trb,\r
- OUT URB **Urb\r
+ IN URB *Urb\r
)\r
{\r
- LIST_ENTRY *Entry;\r
- LIST_ENTRY *Next;\r
- TRB_TEMPLATE *CheckedTrb;\r
- URB *CheckedUrb;\r
- UINTN Index;\r
+ LINK_TRB *LinkTrb;\r
+ TRB_TEMPLATE *CheckedTrb;\r
+ UINTN Index;\r
+ EFI_PHYSICAL_ADDRESS PhyAddr;\r
\r
- EFI_LIST_FOR_EACH_SAFE (Entry, Next, &Xhc->AsyncIntTransfers) {\r
- CheckedUrb = EFI_LIST_CONTAINER (Entry, URB, UrbList);\r
- CheckedTrb = CheckedUrb->TrbStart;\r
- for (Index = 0; Index < CheckedUrb->TrbNum; Index++) {\r
- if (Trb == CheckedTrb) {\r
- *Urb = CheckedUrb;\r
- return TRUE;\r
- }\r
- CheckedTrb++;\r
- //\r
- // If the checked TRB is the link TRB at the end of the transfer ring,\r
- // recircle it to the head of the ring.\r
- //\r
- if (CheckedTrb->Type == TRB_TYPE_LINK) {\r
- CheckedTrb = (TRB_TEMPLATE*) CheckedUrb->Ring->RingSeg0;\r
- }\r
+ CheckedTrb = Urb->TrbStart;\r
+ for (Index = 0; Index < Urb->TrbNum; Index++) {\r
+ if (Trb == CheckedTrb) {\r
+ return TRUE;\r
+ }\r
+ CheckedTrb++;\r
+ //\r
+ // If the checked TRB is the link TRB at the end of the transfer ring,\r
+ // recircle it to the head of the ring.\r
+ //\r
+ if (CheckedTrb->Type == TRB_TYPE_LINK) {\r
+ LinkTrb = (LINK_TRB *) CheckedTrb;\r
+ PhyAddr = (EFI_PHYSICAL_ADDRESS)(LinkTrb->PtrLo | LShiftU64 ((UINT64) LinkTrb->PtrHi, 32));\r
+ CheckedTrb = (TRB_TEMPLATE *)(UINTN) UsbHcGetHostAddrForPciAddr (Xhc->MemPool, (VOID *)(UINTN) PhyAddr, sizeof (TRB_TEMPLATE));\r
+ ASSERT (CheckedTrb == Urb->Ring->RingSeg0);\r
}\r
}\r
\r
}\r
\r
/**\r
- Check if the Trb is a transaction of the URB.\r
+ Check if the Trb is a transaction of the URBs in XHCI's asynchronous transfer list.\r
\r
- @param Trb The TRB to be checked\r
- @param Urb The transfer ring to be checked.\r
+ @param Xhc The XHCI Instance.\r
+ @param Trb The TRB to be checked.\r
+ @param Urb The pointer to the matched Urb.\r
\r
- @retval TRUE It is a transaction of the URB.\r
- @retval FALSE It is not any transaction of the URB.\r
+ @retval TRUE The Trb is matched with a transaction of the URBs in the async list.\r
+ @retval FALSE The Trb is not matched with any URBs in the async list.\r
\r
**/\r
BOOLEAN\r
-IsTransferRingTrb (\r
+IsAsyncIntTrb (\r
+ IN USB_XHCI_INSTANCE *Xhc,\r
IN TRB_TEMPLATE *Trb,\r
- IN URB *Urb\r
+ OUT URB **Urb\r
)\r
{\r
- TRB_TEMPLATE *CheckedTrb;\r
- UINTN Index;\r
-\r
- CheckedTrb = Urb->Ring->RingSeg0;\r
-\r
- ASSERT (Urb->Ring->TrbNumber == CMD_RING_TRB_NUMBER || Urb->Ring->TrbNumber == TR_RING_TRB_NUMBER);\r
+ LIST_ENTRY *Entry;\r
+ LIST_ENTRY *Next;\r
+ URB *CheckedUrb;\r
\r
- for (Index = 0; Index < Urb->Ring->TrbNumber; Index++) {\r
- if (Trb == CheckedTrb) {\r
+ EFI_LIST_FOR_EACH_SAFE (Entry, Next, &Xhc->AsyncIntTransfers) {\r
+ CheckedUrb = EFI_LIST_CONTAINER (Entry, URB, UrbList);\r
+ if (IsTransferRingTrb (Xhc, Trb, CheckedUrb)) {\r
+ *Urb = CheckedUrb;\r
return TRUE;\r
}\r
- CheckedTrb++;\r
}\r
\r
return FALSE;\r
}\r
\r
+\r
/**\r
Check the URB's execution result and update the URB's\r
result accordingly.\r
TRBPtr = (TRB_TEMPLATE *)(UINTN) UsbHcGetHostAddrForPciAddr (Xhc->MemPool, (VOID *)(UINTN) PhyAddr, sizeof (TRB_TEMPLATE));\r
\r
//\r
- // Update the status of Urb according to the finished event regardless of whether\r
- // the urb is current checked one or in the XHCI's async transfer list.\r
+ // Update the status of URB including the pending URB, the URB that is currently checked,\r
+ // and URBs in the XHCI's async interrupt transfer list.\r
// This way is used to avoid that those completed async transfer events don't get\r
// handled in time and are flushed by newer coming events.\r
//\r
- if (IsTransferRingTrb (TRBPtr, Urb)) {\r
+ if (Xhc->PendingUrb != NULL && IsTransferRingTrb (Xhc, TRBPtr, Xhc->PendingUrb)) {\r
+ CheckedUrb = Xhc->PendingUrb;\r
+ } else if (IsTransferRingTrb (Xhc, TRBPtr, Urb)) {\r
CheckedUrb = Urb;\r
} else if (IsAsyncIntTrb (Xhc, TRBPtr, &AsyncUrb)) { \r
CheckedUrb = AsyncUrb;\r
DEBUG ((EFI_D_ERROR, "XhcCheckUrbResult: TRANSACTION_ERROR! Completecode = %x\n",EvtTrb->Completecode));\r
goto EXIT;\r
\r
+ case TRB_COMPLETION_STOPPED:\r
+ case TRB_COMPLETION_STOPPED_LENGTH_INVALID:\r
+ CheckedUrb->Result |= EFI_USB_ERR_TIMEOUT;\r
+ CheckedUrb->Finished = TRUE;\r
+ //\r
+ // The pending URB is timeout and force stopped when stopping endpoint.\r
+ // Continue the loop to receive the Command Complete Event for stopping endpoint.\r
+ //\r
+ continue;\r
+\r
case TRB_COMPLETION_SHORT_PACKET:\r
case TRB_COMPLETION_SUCCESS:\r
if (EvtTrb->Completecode == TRB_COMPLETION_SHORT_PACKET) {\r
EFI_LIST_FOR_EACH_SAFE (Entry, Next, &Xhc->AsyncIntTransfers) {\r
Urb = EFI_LIST_CONTAINER (Entry, URB, UrbList);\r
\r
- //\r
- // Device doesn't finish the IntTransfer until real data comes\r
- // So the TRB should be removed as well.\r
- //\r
+ //\r
+ // Device doesn't finish the IntTransfer until real data comes\r
+ // So the TRB should be removed as well.\r
+ //\r
Status = XhcDequeueTrbFromEndpoint (Xhc, Urb);\r
if (EFI_ERROR (Status)) {\r
DEBUG ((EFI_D_ERROR, "XhciDelAllAsyncIntTransfers: XhcDequeueTrbFromEndpoint failed\n"));\r
EndpointTransferRing = AllocateZeroPool(sizeof (TRANSFER_RING));\r
Xhc->UsbDevContext[SlotId].EndpointTransferRing[Dci-1] = (VOID *) EndpointTransferRing;\r
CreateTransferRing(Xhc, TR_RING_TRB_NUMBER, (TRANSFER_RING *)Xhc->UsbDevContext[SlotId].EndpointTransferRing[Dci-1]);\r
+ DEBUG ((DEBUG_INFO, "Endpoint[%x]: Created BULK ring [%p~%p)\n",\r
+ EpDesc->EndpointAddress,\r
+ EndpointTransferRing->RingSeg0,\r
+ (UINTN) EndpointTransferRing->RingSeg0 + TR_RING_TRB_NUMBER * sizeof (TRB_TEMPLATE)\r
+ ));\r
}\r
\r
break;\r
EndpointTransferRing = AllocateZeroPool(sizeof (TRANSFER_RING));\r
Xhc->UsbDevContext[SlotId].EndpointTransferRing[Dci-1] = (VOID *) EndpointTransferRing;\r
CreateTransferRing(Xhc, TR_RING_TRB_NUMBER, (TRANSFER_RING *)Xhc->UsbDevContext[SlotId].EndpointTransferRing[Dci-1]);\r
+ DEBUG ((DEBUG_INFO, "Endpoint[%x]: Created INT ring [%p~%p)\n",\r
+ EpDesc->EndpointAddress,\r
+ EndpointTransferRing->RingSeg0,\r
+ (UINTN) EndpointTransferRing->RingSeg0 + TR_RING_TRB_NUMBER * sizeof (TRB_TEMPLATE)\r
+ ));\r
}\r
break;\r
\r
EndpointTransferRing = AllocateZeroPool(sizeof (TRANSFER_RING));\r
Xhc->UsbDevContext[SlotId].EndpointTransferRing[Dci-1] = (VOID *) EndpointTransferRing;\r
CreateTransferRing(Xhc, TR_RING_TRB_NUMBER, (TRANSFER_RING *)Xhc->UsbDevContext[SlotId].EndpointTransferRing[Dci-1]);\r
+ DEBUG ((DEBUG_INFO, "Endpoint64[%x]: Created BULK ring [%p~%p)\n",\r
+ EpDesc->EndpointAddress,\r
+ EndpointTransferRing->RingSeg0,\r
+ (UINTN) EndpointTransferRing->RingSeg0 + TR_RING_TRB_NUMBER * sizeof (TRB_TEMPLATE)\r
+ ));\r
}\r
\r
break;\r
EndpointTransferRing = AllocateZeroPool(sizeof (TRANSFER_RING));\r
Xhc->UsbDevContext[SlotId].EndpointTransferRing[Dci-1] = (VOID *) EndpointTransferRing;\r
CreateTransferRing(Xhc, TR_RING_TRB_NUMBER, (TRANSFER_RING *)Xhc->UsbDevContext[SlotId].EndpointTransferRing[Dci-1]);\r
+ DEBUG ((DEBUG_INFO, "Endpoint64[%x]: Created INT ring [%p~%p)\n",\r
+ EpDesc->EndpointAddress,\r
+ EndpointTransferRing->RingSeg0,\r
+ (UINTN) EndpointTransferRing->RingSeg0 + TR_RING_TRB_NUMBER * sizeof (TRB_TEMPLATE)\r
+ ));\r
}\r
break;\r
\r
@param Xhc The XHCI Instance.\r
@param SlotId The slot id to be configured.\r
@param Dci The device context index of endpoint.\r
+ @param PendingUrb The pending URB to check completion status when stopping the end point.\r
\r
@retval EFI_SUCCESS Stop endpoint successfully.\r
@retval Others Failed to stop endpoint.\r
XhcStopEndpoint (\r
IN USB_XHCI_INSTANCE *Xhc,\r
IN UINT8 SlotId,\r
- IN UINT8 Dci\r
+ IN UINT8 Dci,\r
+ IN URB *PendingUrb OPTIONAL\r
)\r
{\r
EFI_STATUS Status;\r
\r
DEBUG ((EFI_D_INFO, "XhcStopEndpoint: Slot = 0x%x, Dci = 0x%x\n", SlotId, Dci));\r
\r
+ //\r
+ // When XhcCheckUrbResult waits for the Stop_Endpoint completion, it also checks\r
+ // the PendingUrb completion status, because it's possible that the PendingUrb is\r
+ // finished just before stopping the end point, but after the looping check.\r
+ //\r
+ // The PendingUrb could be passed to XhcCmdTransfer to XhcExecTransfer to XhcCheckUrbResult\r
+ // through function parameter, but That will cause every consumer of XhcCmdTransfer,\r
+ // XhcExecTransfer and XhcCheckUrbResult pass a NULL PendingUrb.\r
+ // But actually only XhcCheckUrbResult is aware of the PendingUrb.\r
+ // So we choose to save the PendingUrb into the USB_XHCI_INSTANCE and use it in XhcCheckUrbResult.\r
+ //\r
+ ASSERT (Xhc->PendingUrb == NULL);\r
+ Xhc->PendingUrb = PendingUrb;\r
+ //\r
+ // Reset the URB result from Timeout to NoError.\r
+ // The USB result will be:\r
+ // changed to Timeout when Stop/StopInvalidLength Transfer Event is received, or\r
+ // remain NoError when Success/ShortPacket Transfer Event is received.\r
+ //\r
+ if (PendingUrb != NULL) {\r
+ PendingUrb->Result = EFI_USB_NOERROR;\r
+ }\r
+\r
//\r
// Send stop endpoint command to transit Endpoint from running to stop state\r
//\r
DEBUG ((EFI_D_ERROR, "XhcStopEndpoint: Stop Endpoint Failed, Status = %r\n", Status));\r
}\r
\r
+ Xhc->PendingUrb = NULL;\r
+\r
return Status;\r
}\r
\r
// XHCI 4.3.6 - Setting Alternate Interfaces\r
// 1) Stop any Running Transfer Rings affected by the Alternate Interface setting.\r
//\r
- Status = XhcStopEndpoint (Xhc, SlotId, Dci);\r
+ Status = XhcStopEndpoint (Xhc, SlotId, Dci, NULL);\r
if (EFI_ERROR (Status)) {\r
return Status;\r
}\r
// XHCI 4.3.6 - Setting Alternate Interfaces\r
// 1) Stop any Running Transfer Rings affected by the Alternate Interface setting.\r
//\r
- Status = XhcStopEndpoint (Xhc, SlotId, Dci);\r
+ Status = XhcStopEndpoint (Xhc, SlotId, Dci, NULL);\r
if (EFI_ERROR (Status)) {\r
return Status;\r
}\r
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