/** @file\r
x64-specifc functionality for DxeLoad.\r
\r
-Copyright (c) 2006 - 2008, Intel Corporation. <BR>\r
-All rights reserved. This program and the accompanying materials\r
-are licensed and made available under the terms and conditions of the BSD License\r
-which accompanies this distribution. The full text of the license may be found at\r
-http://opensource.org/licenses/bsd-license.php\r
-\r
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>\r
+SPDX-License-Identifier: BSD-2-Clause-Patent\r
\r
**/\r
\r
#include "DxeIpl.h"\r
-\r
-\r
+#include "X64/VirtualMemory.h"\r
\r
/**\r
Transfers control to DxeCore.\r
\r
This function performs a CPU architecture specific operations to execute\r
the entry point of DxeCore with the parameters of HobList.\r
- It also intalls EFI_END_OF_PEI_PPI to signal the end of PEI phase.\r
+ It also installs EFI_END_OF_PEI_PPI to signal the end of PEI phase.\r
\r
- @param DxeCoreEntryPoint The entrypoint of DxeCore.\r
+ @param DxeCoreEntryPoint The entry point of DxeCore.\r
@param HobList The start of HobList passed to DxeCore.\r
- @param EndOfPeiSignal The PPI descriptor for EFI_END_OF_PEI_PPI.\r
\r
**/\r
VOID\r
HandOffToDxeCore (\r
- IN EFI_PHYSICAL_ADDRESS DxeCoreEntryPoint,\r
- IN EFI_PEI_HOB_POINTERS HobList,\r
- IN EFI_PEI_PPI_DESCRIPTOR *EndOfPeiSignal\r
+ IN EFI_PHYSICAL_ADDRESS DxeCoreEntryPoint,\r
+ IN EFI_PEI_HOB_POINTERS HobList\r
)\r
{\r
- VOID *BaseOfStack;\r
- VOID *TopOfStack;\r
- EFI_STATUS Status;\r
+ VOID *BaseOfStack;\r
+ VOID *TopOfStack;\r
+ EFI_STATUS Status;\r
+ UINTN PageTables;\r
+ UINT32 Index;\r
+ EFI_VECTOR_HANDOFF_INFO *VectorInfo;\r
+ EFI_PEI_VECTOR_HANDOFF_INFO_PPI *VectorHandoffInfoPpi;\r
+ VOID *GhcbBase;\r
+ UINTN GhcbSize;\r
+\r
+ //\r
+ // Clear page 0 and mark it as allocated if NULL pointer detection is enabled.\r
+ //\r
+ if (IsNullDetectionEnabled ()) {\r
+ ClearFirst4KPage (HobList.Raw);\r
+ BuildMemoryAllocationHob (0, EFI_PAGES_TO_SIZE (1), EfiBootServicesData);\r
+ }\r
+\r
+ //\r
+ // Get Vector Hand-off Info PPI and build Guided HOB\r
+ //\r
+ Status = PeiServicesLocatePpi (\r
+ &gEfiVectorHandoffInfoPpiGuid,\r
+ 0,\r
+ NULL,\r
+ (VOID **)&VectorHandoffInfoPpi\r
+ );\r
+ if (Status == EFI_SUCCESS) {\r
+ DEBUG ((DEBUG_INFO, "Vector Hand-off Info PPI is gotten, GUIDed HOB is created!\n"));\r
+ VectorInfo = VectorHandoffInfoPpi->Info;\r
+ Index = 1;\r
+ while (VectorInfo->Attribute != EFI_VECTOR_HANDOFF_LAST_ENTRY) {\r
+ VectorInfo++;\r
+ Index++;\r
+ }\r
+\r
+ BuildGuidDataHob (\r
+ &gEfiVectorHandoffInfoPpiGuid,\r
+ VectorHandoffInfoPpi->Info,\r
+ sizeof (EFI_VECTOR_HANDOFF_INFO) * Index\r
+ );\r
+ }\r
\r
//\r
// Allocate 128KB for the Stack\r
// Compute the top of the stack we were allocated. Pre-allocate a UINTN\r
// for safety.\r
//\r
- TopOfStack = (VOID *) ((UINTN) BaseOfStack + EFI_SIZE_TO_PAGES (STACK_SIZE) * EFI_PAGE_SIZE - CPU_STACK_ALIGNMENT);\r
+ TopOfStack = (VOID *)((UINTN)BaseOfStack + EFI_SIZE_TO_PAGES (STACK_SIZE) * EFI_PAGE_SIZE - CPU_STACK_ALIGNMENT);\r
TopOfStack = ALIGN_POINTER (TopOfStack, CPU_STACK_ALIGNMENT);\r
\r
//\r
- // End of PEI phase singal\r
+ // Get the address and size of the GHCB pages\r
+ //\r
+ GhcbBase = (VOID *)PcdGet64 (PcdGhcbBase);\r
+ GhcbSize = PcdGet64 (PcdGhcbSize);\r
+\r
+ PageTables = 0;\r
+ if (FeaturePcdGet (PcdDxeIplBuildPageTables)) {\r
+ //\r
+ // Create page table and save PageMapLevel4 to CR3\r
+ //\r
+ PageTables = CreateIdentityMappingPageTables (\r
+ (EFI_PHYSICAL_ADDRESS)(UINTN)BaseOfStack,\r
+ STACK_SIZE,\r
+ (EFI_PHYSICAL_ADDRESS)(UINTN)GhcbBase,\r
+ GhcbSize\r
+ );\r
+ } else {\r
+ //\r
+ // Set NX for stack feature also require PcdDxeIplBuildPageTables be TRUE\r
+ // for the DxeIpl and the DxeCore are both X64.\r
+ //\r
+ ASSERT (PcdGetBool (PcdSetNxForStack) == FALSE);\r
+ ASSERT (PcdGetBool (PcdCpuStackGuard) == FALSE);\r
+ }\r
+\r
+ //\r
+ // End of PEI phase signal\r
//\r
- Status = PeiServicesInstallPpi (EndOfPeiSignal);\r
+ Status = PeiServicesInstallPpi (&gEndOfPeiSignalPpi);\r
ASSERT_EFI_ERROR (Status);\r
\r
+ if (FeaturePcdGet (PcdDxeIplBuildPageTables)) {\r
+ AsmWriteCr3 (PageTables);\r
+ }\r
+\r
//\r
// Update the contents of BSP stack HOB to reflect the real stack info passed to DxeCore.\r
- // \r
- UpdateStackHob ((EFI_PHYSICAL_ADDRESS)(UINTN) BaseOfStack, STACK_SIZE);\r
+ //\r
+ UpdateStackHob ((EFI_PHYSICAL_ADDRESS)(UINTN)BaseOfStack, STACK_SIZE);\r
\r
+ //\r
+ // Transfer the control to the entry point of DxeCore.\r
+ //\r
SwitchStack (\r
(SWITCH_STACK_ENTRY_POINT)(UINTN)DxeCoreEntryPoint,\r
HobList.Raw,\r