/** @file\r
Definition of Pei Core Structures and Services\r
- \r
-Copyright (c) 2006 - 2017, Intel Corporation. All rights reserved.<BR>\r
+\r
+Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution. The full text of the license may be found at\r
INTN LastDispatchedInstall;\r
///\r
/// index of last dispatched notify in Notify link list.\r
- /// \r
+ ///\r
INTN LastDispatchedNotify;\r
///\r
/// Ppi database has the PcdPeiCoreMaxPpiSupported number of entries.\r
\r
/**\r
Function Pointer type for PeiCore function.\r
- @param SecCoreData Points to a data structure containing SEC to PEI handoff data, such as the size \r
+ @param SecCoreData Points to a data structure containing SEC to PEI handoff data, such as the size\r
and location of temporary RAM, the stack location and the BFV location.\r
@param PpiList Points to a list of one or more PPI descriptors to be installed initially by the PEI core.\r
An empty PPI list consists of a single descriptor with the end-tag\r
///\r
struct _PEI_CORE_INSTANCE {\r
UINTN Signature;\r
- \r
+\r
///\r
/// Point to ServiceTableShadow\r
///\r
EFI_PEI_SERVICES *Ps;\r
PEI_PPI_DATABASE PpiData;\r
- \r
+\r
///\r
/// The count of FVs which contains FFS and could be dispatched by PeiCore.\r
///\r
UINTN FvCount;\r
- \r
+\r
///\r
/// Pointer to the buffer with the PcdPeiCoreMaxFvSupported number of entries.\r
/// Each entry is for one FV which contains FFS and could be dispatched by PeiCore.\r
///\r
PEI_CORE_UNKNOW_FORMAT_FV_INFO *UnknownFvInfo;\r
UINTN UnknownFvInfoCount;\r
- \r
+\r
///\r
/// Pointer to the buffer with the PcdPeiCoreMaxPeimPerFv number of entries.\r
///\r
PEICORE_FUNCTION_POINTER ShadowedPeiCore;\r
CACHE_SECTION_DATA CacheSection;\r
//\r
- // For Loading modules at fixed address feature to cache the top address below which the \r
- // Runtime code, boot time code and PEI memory will be placed. Please note that the offset between this field \r
- // and Ps should not be changed since maybe user could get this top address by using the offet to Ps. \r
+ // For Loading modules at fixed address feature to cache the top address below which the\r
+ // Runtime code, boot time code and PEI memory will be placed. Please note that the offset between this field\r
+ // and Ps should not be changed since maybe user could get this top address by using the offet to Ps.\r
//\r
EFI_PHYSICAL_ADDRESS LoadModuleAtFixAddressTopAddress;\r
//\r
// The field is define for Loading modules at fixed address feature to tracker the PEI code\r
// memory range usage. It is a bit mapped array in which every bit indicates the correspoding memory page\r
- // available or not. \r
+ // available or not.\r
//\r
UINT64 *PeiCodeMemoryRangeUsageBitMap;\r
//\r
with the old core data.\r
\r
\r
- @param SecCoreData Points to a data structure containing SEC to PEI handoff data, such as the size \r
+ @param SecCoreData Points to a data structure containing SEC to PEI handoff data, such as the size\r
and location of temporary RAM, the stack location and the BFV location.\r
@param PpiList Points to a list of one or more PPI descriptors to be installed initially by the PEI core.\r
An empty PPI list consists of a single descriptor with the end-tag\r
Initialize PPI services.\r
\r
@param PrivateData Pointer to the PEI Core data.\r
- @param OldCoreData Pointer to old PEI Core data. \r
+ @param OldCoreData Pointer to old PEI Core data.\r
NULL if being run in non-permament memory mode.\r
\r
**/\r
\r
Migrate the Hob list from the temporary memory to PEI installed memory.\r
\r
- @param SecCoreData Points to a data structure containing SEC to PEI handoff data, such as the size \r
+ @param SecCoreData Points to a data structure containing SEC to PEI handoff data, such as the size\r
and location of temporary RAM, the stack location and the BFV location.\r
@param PrivateData Pointer to PeiCore's private data structure.\r
\r
Initialize the memory services.\r
\r
@param PrivateData PeiCore's private data structure\r
- @param SecCoreData Points to a data structure containing SEC to PEI handoff data, such as the size \r
+ @param SecCoreData Points to a data structure containing SEC to PEI handoff data, such as the size\r
and location of temporary RAM, the stack location and the BFV location.\r
@param OldCoreData Pointer to the PEI Core data.\r
NULL if being run in non-permament memory mode.\r
\r
**/\r
EFI_STATUS\r
-EFIAPI \r
+EFIAPI\r
PeiFfsGetFileInfo2 (\r
IN EFI_PEI_FILE_HANDLE FileHandle,\r
OUT EFI_FV_FILE_INFO2 *FileInfo\r
@retval EFI_OUT_OF_RESOURCES Can not allocate page when aligning FV image\r
@retval EFI_SECURITY_VIOLATION Image is illegal\r
@retval Others Can not find EFI_SECTION_FIRMWARE_VOLUME_IMAGE section\r
- \r
+\r
**/\r
EFI_STATUS\r
ProcessFvFile (\r
IN PEI_CORE_FV_HANDLE *ParentFvCoreHandle,\r
IN EFI_PEI_FILE_HANDLE ParentFvFileHandle\r
);\r
- \r
+\r
/**\r
Get instance of PEI_CORE_FV_HANDLE for next volume according to given index.\r
- \r
+\r
This routine also will install FvInfo ppi for FV hob in PI ways.\r
- \r
+\r
@param Private Pointer of PEI_CORE_INSTANCE\r
@param Instance The index of FV want to be searched.\r
- \r
+\r
@return Instance of PEI_CORE_FV_HANDLE.\r
**/\r
PEI_CORE_FV_HANDLE *\r
IN PEI_CORE_INSTANCE *Private,\r
IN UINTN Instance\r
);\r
- \r
+\r
//\r
// Default EFI_PEI_CPU_IO_PPI support for EFI_PEI_SERVICES table when PeiCore initialization.\r
-// \r
+//\r
\r
/**\r
Memory-based read services.\r
- \r
- This function is to perform the Memory Access Read service based on installed \r
- instance of the EFI_PEI_CPU_IO_PPI. \r
- If the EFI_PEI_CPU_IO_PPI is not installed by platform/chipset PEIM, then \r
- return EFI_NOT_YET_AVAILABLE. \r
- \r
+\r
+ This function is to perform the Memory Access Read service based on installed\r
+ instance of the EFI_PEI_CPU_IO_PPI.\r
+ If the EFI_PEI_CPU_IO_PPI is not installed by platform/chipset PEIM, then\r
+ return EFI_NOT_YET_AVAILABLE.\r
+\r
@param PeiServices An indirect pointer to the PEI Services Table\r
published by the PEI Foundation.\r
@param This Pointer to local data for the interface.\r
@param Buffer A pointer to the buffer of data.\r
\r
@retval EFI_SUCCESS The function completed successfully.\r
- @retval EFI_NOT_YET_AVAILABLE The service has not been installed. \r
+ @retval EFI_NOT_YET_AVAILABLE The service has not been installed.\r
**/\r
EFI_STATUS\r
EFIAPI\r
IN UINTN Count,\r
IN OUT VOID *Buffer\r
);\r
- \r
+\r
/**\r
Memory-based write services.\r
- \r
- This function is to perform the Memory Access Write service based on installed \r
- instance of the EFI_PEI_CPU_IO_PPI. \r
- If the EFI_PEI_CPU_IO_PPI is not installed by platform/chipset PEIM, then \r
- return EFI_NOT_YET_AVAILABLE. \r
- \r
+\r
+ This function is to perform the Memory Access Write service based on installed\r
+ instance of the EFI_PEI_CPU_IO_PPI.\r
+ If the EFI_PEI_CPU_IO_PPI is not installed by platform/chipset PEIM, then\r
+ return EFI_NOT_YET_AVAILABLE.\r
+\r
@param PeiServices An indirect pointer to the PEI Services Table\r
published by the PEI Foundation.\r
@param This Pointer to local data for the interface.\r
@param Buffer A pointer to the buffer of data.\r
\r
@retval EFI_SUCCESS The function completed successfully.\r
- @retval EFI_NOT_YET_AVAILABLE The service has not been installed. \r
+ @retval EFI_NOT_YET_AVAILABLE The service has not been installed.\r
**/\r
EFI_STATUS\r
EFIAPI\r
IN UINTN Count,\r
IN OUT VOID *Buffer\r
);\r
- \r
+\r
/**\r
IO-based read services.\r
- \r
+\r
This function is to perform the IO-base read service for the EFI_PEI_CPU_IO_PPI.\r
- If the EFI_PEI_CPU_IO_PPI is not installed by platform/chipset PEIM, then \r
- return EFI_NOT_YET_AVAILABLE. \r
- \r
+ If the EFI_PEI_CPU_IO_PPI is not installed by platform/chipset PEIM, then\r
+ return EFI_NOT_YET_AVAILABLE.\r
+\r
@param PeiServices An indirect pointer to the PEI Services Table\r
published by the PEI Foundation.\r
@param This Pointer to local data for the interface.\r
IN UINTN Count,\r
IN OUT VOID *Buffer\r
);\r
- \r
+\r
/**\r
IO-based write services.\r
- \r
+\r
This function is to perform the IO-base write service for the EFI_PEI_CPU_IO_PPI.\r
- If the EFI_PEI_CPU_IO_PPI is not installed by platform/chipset PEIM, then \r
- return EFI_NOT_YET_AVAILABLE. \r
- \r
+ If the EFI_PEI_CPU_IO_PPI is not installed by platform/chipset PEIM, then\r
+ return EFI_NOT_YET_AVAILABLE.\r
+\r
@param PeiServices An indirect pointer to the PEI Services Table\r
published by the PEI Foundation.\r
@param This Pointer to local data for the interface.\r
IN UINTN Count,\r
IN OUT VOID *Buffer\r
);\r
- \r
+\r
/**\r
8-bit I/O read operations.\r
- \r
- If the EFI_PEI_CPU_IO_PPI is not installed by platform/chipset PEIM, then \r
+\r
+ If the EFI_PEI_CPU_IO_PPI is not installed by platform/chipset PEIM, then\r
return 0.\r
- \r
+\r
@param PeiServices An indirect pointer to the PEI Services Table published by the PEI Foundation.\r
@param This Pointer to local data for the interface.\r
@param Address The physical address of the access.\r
IN CONST EFI_PEI_CPU_IO_PPI *This,\r
IN UINT64 Address\r
);\r
- \r
+\r
/**\r
Reads an 16-bit I/O port.\r
- \r
- If the EFI_PEI_CPU_IO_PPI is not installed by platform/chipset PEIM, then \r
+\r
+ If the EFI_PEI_CPU_IO_PPI is not installed by platform/chipset PEIM, then\r
return 0.\r
- \r
+\r
@param PeiServices An indirect pointer to the PEI Services Table published by the PEI Foundation.\r
@param This Pointer to local data for the interface.\r
@param Address The physical address of the access.\r
IN CONST EFI_PEI_CPU_IO_PPI *This,\r
IN UINT64 Address\r
);\r
- \r
+\r
/**\r
Reads an 32-bit I/O port.\r
- \r
- If the EFI_PEI_CPU_IO_PPI is not installed by platform/chipset PEIM, then \r
+\r
+ If the EFI_PEI_CPU_IO_PPI is not installed by platform/chipset PEIM, then\r
return 0.\r
- \r
+\r
@param PeiServices An indirect pointer to the PEI Services Table published by the PEI Foundation.\r
@param This Pointer to local data for the interface.\r
@param Address The physical address of the access.\r
IN CONST EFI_PEI_CPU_IO_PPI *This,\r
IN UINT64 Address\r
);\r
- \r
+\r
/**\r
Reads an 64-bit I/O port.\r
- \r
- If the EFI_PEI_CPU_IO_PPI is not installed by platform/chipset PEIM, then \r
+\r
+ If the EFI_PEI_CPU_IO_PPI is not installed by platform/chipset PEIM, then\r
return 0.\r
- \r
+\r
@param PeiServices An indirect pointer to the PEI Services Table published by the PEI Foundation.\r
@param This Pointer to local data for the interface.\r
@param Address The physical address of the access.\r
IN CONST EFI_PEI_CPU_IO_PPI *This,\r
IN UINT64 Address\r
);\r
- \r
+\r
/**\r
8-bit I/O write operations.\r
\r
IN UINT64 Address,\r
IN UINT8 Data\r
);\r
- \r
+\r
/**\r
16-bit I/O write operations.\r
\r
IN UINT64 Address,\r
IN UINT16 Data\r
);\r
- \r
+\r
/**\r
32-bit I/O write operations.\r
\r
IN UINT64 Address,\r
IN UINT32 Data\r
);\r
- \r
+\r
/**\r
64-bit I/O write operations.\r
\r
IN UINT64 Address,\r
IN UINT64 Data\r
);\r
- \r
+\r
/**\r
8-bit memory read operations.\r
\r
- If the EFI_PEI_CPU_IO_PPI is not installed by platform/chipset PEIM, then \r
+ If the EFI_PEI_CPU_IO_PPI is not installed by platform/chipset PEIM, then\r
return 0.\r
- \r
+\r
@param PeiServices An indirect pointer to the PEI Services Table published by the PEI Foundation.\r
@param This Pointer to local data for the interface.\r
@param Address The physical address of the access.\r
IN CONST EFI_PEI_CPU_IO_PPI *This,\r
IN UINT64 Address\r
);\r
- \r
+\r
/**\r
16-bit memory read operations.\r
\r
- If the EFI_PEI_CPU_IO_PPI is not installed by platform/chipset PEIM, then \r
+ If the EFI_PEI_CPU_IO_PPI is not installed by platform/chipset PEIM, then\r
return 0.\r
- \r
+\r
@param PeiServices An indirect pointer to the PEI Services Table published by the PEI Foundation.\r
@param This Pointer to local data for the interface.\r
@param Address The physical address of the access.\r
IN CONST EFI_PEI_CPU_IO_PPI *This,\r
IN UINT64 Address\r
);\r
- \r
+\r
/**\r
32-bit memory read operations.\r
\r
- If the EFI_PEI_CPU_IO_PPI is not installed by platform/chipset PEIM, then \r
+ If the EFI_PEI_CPU_IO_PPI is not installed by platform/chipset PEIM, then\r
return 0.\r
- \r
+\r
@param PeiServices An indirect pointer to the PEI Services Table published by the PEI Foundation.\r
@param This Pointer to local data for the interface.\r
@param Address The physical address of the access.\r
IN CONST EFI_PEI_CPU_IO_PPI *This,\r
IN UINT64 Address\r
);\r
- \r
+\r
/**\r
64-bit memory read operations.\r
\r
- If the EFI_PEI_CPU_IO_PPI is not installed by platform/chipset PEIM, then \r
+ If the EFI_PEI_CPU_IO_PPI is not installed by platform/chipset PEIM, then\r
return 0.\r
- \r
+\r
@param PeiServices An indirect pointer to the PEI Services Table published by the PEI Foundation.\r
@param This Pointer to local data for the interface.\r
@param Address The physical address of the access.\r
IN CONST EFI_PEI_CPU_IO_PPI *This,\r
IN UINT64 Address\r
);\r
- \r
+\r
/**\r
8-bit memory write operations.\r
\r
IN UINT64 Address,\r
IN UINT8 Data\r
);\r
- \r
+\r
/**\r
16-bit memory write operations.\r
\r
IN UINT64 Address,\r
IN UINT32 Data\r
);\r
- \r
+\r
/**\r
64-bit memory write operations.\r
\r
IN UINT64 Address,\r
IN UINT64 Data\r
);\r
- \r
-extern EFI_PEI_CPU_IO_PPI gPeiDefaultCpuIoPpi; \r
+\r
+extern EFI_PEI_CPU_IO_PPI gPeiDefaultCpuIoPpi;\r
\r
//\r
// Default EFI_PEI_PCI_CFG2_PPI support for EFI_PEI_SERVICES table when PeiCore initialization.\r
-// \r
+//\r
\r
/**\r
Reads from a given location in the PCI configuration space.\r
\r
- If the EFI_PEI_PCI_CFG2_PPI is not installed by platform/chipset PEIM, then \r
- return EFI_NOT_YET_AVAILABLE. \r
- \r
+ If the EFI_PEI_PCI_CFG2_PPI is not installed by platform/chipset PEIM, then\r
+ return EFI_NOT_YET_AVAILABLE.\r
+\r
@param PeiServices An indirect pointer to the PEI Services Table published by the PEI Foundation.\r
@param This Pointer to local data for the interface.\r
@param Width The width of the access. Enumerated in bytes.\r
@retval EFI_SUCCESS The function completed successfully.\r
@retval EFI_INVALID_PARAMETER The invalid access width.\r
@retval EFI_NOT_YET_AVAILABLE If the EFI_PEI_PCI_CFG2_PPI is not installed by platform/chipset PEIM.\r
- \r
+\r
**/\r
EFI_STATUS\r
EFIAPI\r
IN UINT64 Address,\r
IN OUT VOID *Buffer\r
);\r
- \r
+\r
/**\r
Write to a given location in the PCI configuration space.\r
\r
- If the EFI_PEI_PCI_CFG2_PPI is not installed by platform/chipset PEIM, then \r
- return EFI_NOT_YET_AVAILABLE. \r
- \r
+ If the EFI_PEI_PCI_CFG2_PPI is not installed by platform/chipset PEIM, then\r
+ return EFI_NOT_YET_AVAILABLE.\r
+\r
@param PeiServices An indirect pointer to the PEI Services Table published by the PEI Foundation.\r
@param This Pointer to local data for the interface.\r
@param Width The width of the access. Enumerated in bytes.\r
IN UINT64 Address,\r
IN OUT VOID *Buffer\r
);\r
- \r
+\r
/**\r
This function performs a read-modify-write operation on the contents from a given\r
location in the PCI configuration space.\r
IN UINT64 Address,\r
IN VOID *SetBits,\r
IN VOID *ClearBits\r
- ); \r
- \r
+ );\r
+\r
extern EFI_PEI_PCI_CFG2_PPI gPeiDefaultPciCfg2Ppi;\r
\r
/**\r
After PeiCore image is shadowed into permanent memory, all build-in FvPpi should\r
- be re-installed with the instance in permanent memory and all cached FvPpi pointers in \r
+ be re-installed with the instance in permanent memory and all cached FvPpi pointers in\r
PrivateData->Fv[] array should be fixed up to be pointed to the one in permanent\r
memory.\r
- \r
+\r
@param PrivateData Pointer to PEI_CORE_INSTANCE.\r
-**/ \r
+**/\r
VOID\r
PeiReinitializeFv (\r
IN PEI_CORE_INSTANCE *PrivateData\r
);\r
- \r
+\r
#endif\r
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