# It also provides the defintions(including PPIs/PROTOCOLs/GUIDs and library classes)\r
# and libraries instances, which are used for those modules.\r
#\r
-# Copyright (c) 2007 - 2011, Intel Corporation. All rights reserved.<BR>\r
+# Copyright (c) 2007 - 2013, Intel Corporation. All rights reserved.<BR>\r
# This program and the accompanying materials are licensed and made available under \r
# the terms and conditions of the BSD License that accompanies this distribution. \r
# The full text of the license may be found at\r
DEC_SPECIFICATION = 0x00010005\r
PACKAGE_NAME = MdeModulePkg\r
PACKAGE_GUID = BA0D78D6-2CAF-414b-BD4D-B6762A894288\r
- PACKAGE_VERSION = 0.91\r
+ PACKAGE_VERSION = 0.92\r
\r
[Includes]\r
Include\r
#\r
LockBoxLib|Include/Library/LockBoxLib.h\r
\r
+ ## @libraryclass Provide the CPU exception handler.\r
+ #\r
+ CpuExceptionHandlerLib|Include/Library/CpuExceptionHandlerLib.h\r
+ \r
+ ## @libraryclass Provides platform specific display interface.\r
+ #\r
+ CustomizedDisplayLib|Include/Library/CustomizedDisplayLib.h\r
+\r
[Guids]\r
## MdeModule package token space guid\r
# Include/Guid/MdeModulePkgTokenSpace.h\r
# Include/Guid/PcdDataBaseHobGuid.h\r
gPcdDataBaseHobGuid = { 0xEA296D92, 0x0B69, 0x423C, { 0x8C, 0x28, 0x33, 0xB4, 0xE0, 0xA9, 0x12, 0x68 }}\r
\r
+ ## Guid for PCD DataBase signature.\r
+ # Include/Guid/PcdDataBaseSignatureGuid.h\r
+ gPcdDataBaseSignatureGuid = { 0x3c7d193c, 0x682c, 0x4c14, { 0xa6, 0x8f, 0x55, 0x2d, 0xea, 0x4f, 0x43, 0x7e }}\r
+\r
## Guid for EDKII implementation GUIDed opcodes\r
# Include/Guid/MdeModuleHii.h\r
gEfiIfrTianoGuid = { 0xf0b1735, 0x87a0, 0x4193, {0xb2, 0x66, 0x53, 0x8c, 0x38, 0xaf, 0x48, 0xce }}\r
# Include/Guid/SystemNvDataGuid.h\r
gEfiSystemNvDataFvGuid = { 0xFFF12B8D, 0x7696, 0x4C8B, { 0xA9, 0x85, 0x27, 0x47, 0x07, 0x5B, 0x4F, 0x50 }}\r
\r
+ ## GUID used as the signature of FTW working block header.\r
+ # Include/Guid/SystemNvDataGuid.h\r
+ gEdkiiWorkingBlockSignatureGuid = { 0x9e58292b, 0x7c68, 0x497d, { 0xa0, 0xce, 0x65, 0x0, 0xfd, 0x9f, 0x1b, 0x95 }}\r
+\r
+ ## GUID used to build FTW last write data hob and install PPI to inform the check for FTW last write data has been done.\r
+ # Include/Guid/FaultTolerantWrite.h\r
+ gEdkiiFaultTolerantWriteGuid = { 0x1d3e9cb8, 0x43af, 0x490b, { 0x83, 0xa, 0x35, 0x16, 0xaa, 0x53, 0x20, 0x47 }}\r
+\r
## Guid specify the device is the console out device.\r
# Include/Guid/ConsoleOutDevice.h\r
gEfiConsoleOutDeviceGuid = { 0xD3B36F2C, 0xD551, 0x11D4, { 0x9A, 0x46, 0x00, 0x90, 0x27, 0x3F, 0xC1, 0x4D }}\r
\r
## Performance protocol guid that also acts as the performance HOB guid and performance variable GUID\r
# Include/Guid/Performance.h\r
- gPerformanceProtocolGuid = { 0x76B6BDFA, 0x2ACD, 0x4462, { 0x9E, 0x3F, 0xCB, 0x58, 0xC9, 0x69, 0xD9, 0x37 }}\r
- gSmmPerformanceProtocolGuid = { 0xf866226a, 0xeaa5, 0x4f5a, { 0xa9, 0xa, 0x6c, 0xfb, 0xa5, 0x7c, 0x58, 0x8e } }\r
+ gPerformanceProtocolGuid = { 0x76B6BDFA, 0x2ACD, 0x4462, { 0x9E, 0x3F, 0xCB, 0x58, 0xC9, 0x69, 0xD9, 0x37 } }\r
+ gSmmPerformanceProtocolGuid = { 0xf866226a, 0xeaa5, 0x4f5a, { 0xa9, 0xa, 0x6c, 0xfb, 0xa5, 0x7c, 0x58, 0x8e } }\r
+ gPerformanceExProtocolGuid = { 0x1ea81bec, 0xf01a, 0x4d98, { 0xa2, 0x1, 0x4a, 0x61, 0xce, 0x2f, 0xc0, 0x22 } }\r
+ gSmmPerformanceExProtocolGuid = { 0x931fc048, 0xc71d, 0x4455, { 0x89, 0x30, 0x47, 0x6, 0x30, 0xe3, 0xe, 0xe5 } }\r
\r
## Guid is defined for CRC32 encapsulation scheme.\r
# Include/Guid/Crc32GuidedSectionExtraction.h\r
gRecoveryOnDataCdGuid = { 0x5CAC0099, 0x0DC9, 0x48E5, { 0x80, 0x68, 0xBB, 0x95, 0xF5, 0x40, 0x0A, 0x9F }}\r
\r
## Include/Guid/SmmLockBox.h\r
- gEfiSmmLockBoxCommunicationGuid = { 0x2a3cfebd, 0x27e8, 0x4d0a, { 0x8b, 0x79, 0xd6, 0x88, 0xc2, 0xa3, 0xe1, 0xc0 }}\r
+ gEfiSmmLockBoxCommunicationGuid = { 0x2a3cfebd, 0x27e8, 0x4d0a, { 0x8b, 0x79, 0xd6, 0x88, 0xc2, 0xa3, 0xe1, 0xc0 }}\r
\r
## Include/Guid/AcpiS3Context.h\r
gEfiAcpiVariableGuid = { 0xAF9FFD67, 0xEC10, 0x488A, { 0x9D, 0xFC, 0x6C, 0xBF, 0x5E, 0xE2, 0x2C, 0x2E }}\r
## Include/Guid/MtcVendor.h\r
gMtcVendorGuid = { 0xeb704011, 0x1402, 0x11d3, { 0x8e, 0x77, 0x0, 0xa0, 0xc9, 0x69, 0x72, 0x3b }}\r
\r
+ ## Guid for Firmware Performance Data Table (FPDT) implementation.\r
+ # Include/Guid/FirmwarePerformance.h\r
+ gEfiFirmwarePerformanceGuid = { 0xc095791a, 0x3001, 0x47b2, { 0x80, 0xc9, 0xea, 0xc7, 0x31, 0x9f, 0x2f, 0xa4 }}\r
+ gFirmwarePerformanceS3PointerGuid = { 0xdc65adc, 0xa973, 0x4130, { 0x8d, 0xf0, 0x2a, 0xdb, 0xeb, 0x9e, 0x4a, 0x31 }}\r
+\r
+ ## Include/Guid/ExitBootServiceFailed.h\r
+ gEventExitBootServicesFailedGuid = { 0x4f6c5507, 0x232f, 0x4787, { 0xb9, 0x5e, 0x72, 0xf8, 0x62, 0x49, 0xc, 0xb1 } }\r
+\r
+ ## Include/Guid/ConnectConInEvent.h\r
+ gConnectConInEventGuid = { 0xdb4e8151, 0x57ed, 0x4bed, { 0x88, 0x33, 0x67, 0x51, 0xb5, 0xd1, 0xa8, 0xd7 }}\r
+\r
[Ppis]\r
## Include/Ppi/AtaController.h\r
gPeiAtaControllerPpiGuid = { 0xa45e60d1, 0xc719, 0x44aa, { 0xb0, 0x7a, 0xaa, 0x77, 0x7f, 0x85, 0x90, 0x6d }}\r
# Include/Protocol/SmmVariableProtocol.h\r
gEfiSmmVariableProtocolGuid = { 0xed32d533, 0x99e6, 0x4209, { 0x9c, 0xc0, 0x2d, 0x72, 0xcd, 0xd9, 0x98, 0xa7 }}\r
\r
+ ## This protocol is intended for use as a means to mark a variable read-only after the event EFI_END_OF_DXE_EVENT_GUID is signaled.\r
+ # Include/Protocol/VariableLock.h\r
+ gEdkiiVariableLockProtocolGuid = { 0xcd3d0a05, 0x9e24, 0x437c, { 0xa8, 0x91, 0x1e, 0xe0, 0x53, 0xdb, 0x76, 0x38 }}\r
+\r
## This protocol is similar with DXE FVB protocol and used in the UEFI SMM evvironment.\r
# Include/Protocol/SmmFirmwareVolumeBlock.h\r
gEfiSmmFirmwareVolumeBlockProtocolGuid = { 0xd326d041, 0xbd31, 0x4c01, { 0xb5, 0xa8, 0x62, 0x8b, 0xe8, 0x7f, 0x6, 0x53 }}\r
\r
## Include/Protocol/EbcSimpleDebugger.h\r
gEfiEbcSimpleDebuggerProtocolGuid = { 0x2a72d11e, 0x7376, 0x40f6, { 0x9c, 0x68, 0x23, 0xfa, 0x2f, 0xe3, 0x63, 0xf1 } }\r
+\r
+ ## Include/Protocol/BootLogo.h\r
+ gEfiBootLogoProtocolGuid = { 0xcdea2bd3, 0xfc25, 0x4c1c, { 0xb9, 0x7c, 0xb3, 0x11, 0x86, 0x6, 0x49, 0x90 } }\r
+\r
+ ## Include/Protocol/DisplayProtocol.h\r
+ gEdkiiFormDisplayEngineProtocolGuid = { 0x9bbe29e9, 0xfda1, 0x41ec, { 0xad, 0x52, 0x45, 0x22, 0x13, 0x74, 0x2d, 0x2e } }\r
+\r
+ ## Include/Protocol/FormBrowserEx2.h\r
+ gEdkiiFormBrowserEx2ProtocolGuid = { 0xa770c357, 0xb693, 0x4e6d, { 0xa6, 0xcf, 0xd2, 0x1c, 0x72, 0x8e, 0x55, 0xb } }\r
+\r
[PcdsFeatureFlag]\r
## Indicate whether platform can support update capsule across a system reset\r
gEfiMdeModulePkgTokenSpaceGuid.PcdSupportUpdateCapsuleReset|FALSE|BOOLEAN|0x0001001d\r
# If FALSE, TEXT statement will be set to GrayOut only when GrayOut condition is TRUE.\r
gEfiMdeModulePkgTokenSpaceGuid.PcdBrowserGrayOutTextStatement|FALSE|BOOLEAN|0x0001004f\r
\r
+ ## This PCD specifies whether unselectable menu should be gray out in HII Form Browser.\r
+ # If TRUE, the unselectable menu will be set to GrayOut.\r
+ # If FALSE, the menu will be show as normal menu entry even if it is not selectable.\r
+ gEfiMdeModulePkgTokenSpaceGuid.PcdBrowerGrayOutReadOnlyMenu|FALSE|BOOLEAN|0x00010070\r
+\r
## If TRUE, recovery from IDE disk will be supported.\r
gEfiMdeModulePkgTokenSpaceGuid.PcdRecoveryOnIdeDisk|TRUE|BOOLEAN|0x00010060\r
\r
## If TRUE, recovery from FAT USB disk will be supported.\r
gEfiMdeModulePkgTokenSpaceGuid.PcdRecoveryOnFatUsbDisk|TRUE|BOOLEAN|0x00010063\r
\r
+ ## If TRUE, S3 performance data will be supported in ACPI FPDT table.\r
+ gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwarePerformanceDataTableS3Support|TRUE|BOOLEAN|0x00010064\r
+\r
[PcdsFeatureFlag.IA32, PcdsFeatureFlag.X64]\r
##\r
# This feature flag specifies whether DxeIpl switches to long mode to enter DXE phase.\r
# for a dynamic PCD used in PEI phase.\r
gEfiMdeModulePkgTokenSpaceGuid.PcdMaxPeiPcdCallBackNumberPerPcdEntry|0x08|UINT32|0x0001000f\r
\r
- ## VPD type PCD allow developer point an absoluted physical address PcdVpdBaseAddress\r
- # to store PCD value.\r
- #\r
- gEfiMdeModulePkgTokenSpaceGuid.PcdVpdBaseAddress|0x0|UINT32|0x00010010\r
-\r
## Maximum number of FV is supported by PeiCore's dispatching.\r
gEfiMdeModulePkgTokenSpaceGuid.PcdPeiCoreMaxFvSupported|6|UINT32|0x00010030\r
\r
## The size of volatile buffer. This buffer is used to store VOLATILE attribute variable.\r
gEfiMdeModulePkgTokenSpaceGuid.PcdVariableStoreSize|0x10000|UINT32|0x30000005\r
\r
- ## Size of the FTW spare block range. Note that this value should larger than PcdFlashNvStorageVariableSize\r
+ ## Size of the FTW spare block range. Note that this value should larger than PcdFlashNvStorageVariableSize and block size aligned.\r
# The root cause is that variable driver will use FTW protocol to reclaim variable region.\r
# If the length of variable region is larger than FTW spare size, it means the whole variable region can not\r
# be reflushed through the manner of fault tolerant write.\r
## FFS filename to find the capsule coalesce image.\r
gEfiMdeModulePkgTokenSpaceGuid.PcdCapsuleCoalesceFile|{ 0xA6, 0xE4, 0xFD, 0xF7, 0x4C, 0x29, 0x3c, 0x49, 0xB5, 0x0F, 0x97, 0x34, 0x55, 0x3B, 0xB7, 0x57 }|VOID*|0x30000017\r
\r
- ## Single root I/O virtualization virtual function memory BAR alignment\r
- # BITN set indicates 2 of n+12 power\r
- # BIT0 set indicates 4KB alignment\r
- # BIT1 set indicates 8KB alignment\r
- gEfiMdeModulePkgTokenSpaceGuid.PcdSrIovSystemPageSize|0x1|UINT32|0x10000047\r
- \r
## Flag of enabling/disabling the feature of Loading Module at Fixed Address \r
- # -1: Enable the feature as fixed offset to TOLM\r
- # 0: Disable the feature.\r
- # Positive Value: Enable the feature as fixed absolute address, and the value is the top memory address \r
+ # 0xFFFFFFFFFFFFFFFF: Enable the feature as fixed offset to TOLM\r
+ # 0: Disable the feature\r
+ # Other Value: Enable the feature as fixed absolute address, and the value is the top memory address \r
gEfiMdeModulePkgTokenSpaceGuid.PcdLoadModuleAtFixAddressEnable|0|UINT64|0x30001015\r
- \r
+\r
## Smbios version\r
gEfiMdeModulePkgTokenSpaceGuid.PcdSmbiosVersion|0x0207|UINT16|0x00010055\r
\r
gEfiMdeModulePkgTokenSpaceGuid.PcdProgressCodeS3SuspendEnd|0x03078001|UINT32|0x30001033\r
\r
[PcdsFixedAtBuild,PcdsPatchableInModule]\r
+ ## VPD type PCD allow developer point an absoluted physical address PcdVpdBaseAddress\r
+ # to store PCD value.\r
+ #\r
+ gEfiMdeModulePkgTokenSpaceGuid.PcdVpdBaseAddress|0x0|UINT32|0x00010010\r
+\r
## Maximun number of performance log entries during PEI phase.\r
gEfiMdeModulePkgTokenSpaceGuid.PcdMaxPeiPerformanceLogEntries|40|UINT8|0x0001002f\r
\r
# boundary as close to the top of memory as feasible.\r
#\r
gEfiMdeModulePkgTokenSpaceGuid.PcdMaxEfiSystemTablePointerAddress|0x0|UINT64|0x30001027\r
- \r
+\r
+ ## This PCD specifies whether to shadow PEIM on S3 boot path after memory is ready. \r
+ gEfiMdeModulePkgTokenSpaceGuid.PcdShadowPeimOnS3Boot|FALSE|BOOLEAN|0x30001028\r
+\r
+ ## Default OEM ID for ACPI table creation, its length must be 0x6 bytes to follow ACPI specification.\r
+ gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultOemId|"INTEL "|VOID*|0x30001034\r
+\r
+ ## Default OEM Table ID for ACPI table creation, it is "EDK2 ".\r
+ gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultOemTableId|0x20202020324B4445|UINT64|0x30001035\r
+\r
+ ## Default OEM Revision for ACPI table creation.\r
+ gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultOemRevision|0x00000002|UINT32|0x30001036\r
+\r
+ ## Default Creator ID for ACPI table creation.\r
+ gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultCreatorId|0x20202020|UINT32|0x30001037\r
+\r
+ ## Default Creator Revision for ACPI table creation.\r
+ gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultCreatorRevision|0x01000013|UINT32|0x30001038\r
+\r
[PcdsPatchableInModule, PcdsDynamic, PcdsDynamicEx]\r
- ## This PCD defines the Console output column and the default value is 25 according to UEFI spec\r
+ ## This PCD defines the Console output column and the default value is 25 according to UEFI spec.\r
+ # This PCD could be set to 0 then console output could be at max column and max row.\r
gEfiMdeModulePkgTokenSpaceGuid.PcdConOutRow|25|UINT32|0x40000006\r
\r
- ## This PCD defines the Console output row and the default value is 80 according to UEFI spec\r
+ ## This PCD defines the Console output row and the default value is 80 according to UEFI spec.\r
+ # This PCD could be set to 0 then console output could be at max column and max row.\r
gEfiMdeModulePkgTokenSpaceGuid.PcdConOutColumn|80|UINT32|0x40000007\r
\r
+ ## This PCD defines the video horizontal resolution.\r
+ # This PCD could be set to 0 then video resolution could be at highest resolution.\r
+ gEfiMdeModulePkgTokenSpaceGuid.PcdVideoHorizontalResolution|800|UINT32|0x40000009\r
+\r
+ ## This PCD defines the video vertical resolution.\r
+ # This PCD could be set to 0 then video resolution could be at highest resolution.\r
+ gEfiMdeModulePkgTokenSpaceGuid.PcdVideoVerticalResolution|600|UINT32|0x4000000a\r
+\r
[PcdsFixedAtBuild, PcdsDynamic, PcdsDynamicEx]\r
## Base address of the NV variable range in flash device\r
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase|0x0|UINT32|0x30000001\r
\r
- ## Base address of the FTW spare block range in flash device.\r
+ ## Base address of the FTW spare block range in flash device. Note that this value should be block size aligned.\r
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase|0x0|UINT32|0x30000013\r
\r
## Base address of the FTW working block range in flash device.\r
## 64-bit Base address of the NV variable range in flash device\r
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase64|0x0|UINT64|0x80000001\r
\r
- ## 64-bit Base address of the FTW spare block range in flash device.\r
+ ## 64-bit Base address of the FTW spare block range in flash device. Note that this value should be block size aligned.\r
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase64|0x0|UINT64|0x80000013\r
\r
## 64-bit Base address of the FTW working block range in flash device.\r
gEfiMdeModulePkgTokenSpaceGuid.PcdMrIovSupport|FALSE|BOOLEAN|0x10000046\r
\r
[PcdsFixedAtBuild, PcdsPatchableInModule, PcdsDynamic, PcdsDynamicEx]\r
+ ## Single root I/O virtualization virtual function memory BAR alignment\r
+ # BITN set indicates 2 of n+12 power\r
+ # BIT0 set indicates 4KB alignment\r
+ # BIT1 set indicates 8KB alignment\r
+ gEfiMdeModulePkgTokenSpaceGuid.PcdSrIovSystemPageSize|0x1|UINT32|0x10000047\r
+\r
## This PCD defines the times to print hello world string.\r
# This PCD is a sample to explain FixedAtBuild UINT32 PCD usage.\r
gEfiMdeModulePkgTokenSpaceGuid.PcdHelloWorldPrintTimes|1|UINT32|0x40000005\r
# make sure the memory size is large enough to meet capsule PEI requiremnt in capsule update path.\r
gEfiMdeModulePkgTokenSpaceGuid.PcdCapsulePeiLongModeStackSize|0x8000|UINT32|0x0001005D\r
\r
+ ## This PCD specifies whether 1G page table is enabled.\r
+ gEfiMdeModulePkgTokenSpaceGuid.PcdUse1GPageTable|FALSE|BOOLEAN|0x0001005E\r
+\r
+ ## This PCD specifies the additional pad size in FPDT Basic Boot Performance Table for \r
+ # the extension FPDT boot records got after ReadyToBoot and before ExitBootService.\r
+ gEfiMdeModulePkgTokenSpaceGuid.PcdExtFpdtBootRecordPadSize|0x0|UINT32|0x0001005F\r
+\r
+ ## This PCD specifies whether ConIn device are connected on demand. If TRUE, ConIn\r
+ # device are not connected during BDS and ReadKeyStroke/ReadKeyStrokeEx produced\r
+ # by Consplitter should be called before any real key read operation.\r
+ gEfiMdeModulePkgTokenSpaceGuid.PcdConInConnectOnDemand|FALSE|BOOLEAN|0x10000060\r
+\r
+ ## This PCD specified whether the S.M.A.R.T feature of attached ATA hard disks are enabled.\r
+ gEfiMdeModulePkgTokenSpaceGuid.PcdAtaSmartEnable|TRUE|BOOLEAN|0x00010065\r
+\r
+ ## This PCD specifies whether full PCI enumeration is disabled.\r
+ gEfiMdeModulePkgTokenSpaceGuid.PcdPciDisableBusEnumeration|FALSE|BOOLEAN|0x10000048\r
+\r
[PcdsPatchableInModule]\r
## Specify memory size with page number for PEI code when \r
# the feature of Loading Module at Fixed Address is enabled\r
# default value is set to Zero. And the PCD is assumed ONLY to be accessed in DxeS3BootScriptLib Library.\r
gEfiMdeModulePkgTokenSpaceGuid.PcdS3BootScriptTablePrivateDataPtr|0x0|UINT64|0x00030000\r
\r
+ ## This dynamic PCD hold an address to point to private data structure SMM copy used in DxeS3BootScriptLib library\r
+ # instance which records the S3 boot script table start address, length, etc. To introduce this PCD is\r
+ # only for DxeS3BootScriptLib instance implementation purpose. The platform developer should make sure the\r
+ # default value is set to Zero. And the PCD is assumed ONLY to be accessed in DxeS3BootScriptLib Library.\r
+ gEfiMdeModulePkgTokenSpaceGuid.PcdS3BootScriptTablePrivateSmmDataPtr|0x0|UINT64|0x00030001\r
+\r
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