#define EFI_ACPI_6_4_SECURE_DEVICES_TABLE_REVISION 0x01\r
\r
///\r
-/// Secure Devcice types\r
+/// Secure Device types\r
///\r
-#define EFI_ACPI_6_4_SDEV_TYPE_PCIE_ENDPOINT_DEVICE 0x01\r
#define EFI_ACPI_6_4_SDEV_TYPE_ACPI_NAMESPACE_DEVICE 0x00\r
+#define EFI_ACPI_6_4_SDEV_TYPE_PCIE_ENDPOINT_DEVICE 0x01\r
\r
///\r
-/// Secure Devcice flags\r
+/// Secure Device flags\r
///\r
-#define EFI_ACPI_6_4_SDEV_FLAG_ALLOW_HANDOFF BIT0\r
+#define EFI_ACPI_6_4_SDEV_FLAG_ALLOW_HANDOFF BIT0\r
+#define EFI_ACPI_6_4_SDEV_FLAG_SECURE_ACCESS_COMPONENTS_PRESENT BIT1\r
\r
///\r
/// SDEV Structure Header\r
} EFI_ACPI_6_4_SDEV_STRUCTURE_HEADER;\r
\r
///\r
-/// PCIe Endpoint Device based Secure Device Structure\r
+/// ACPI_NAMESPACE_DEVICE based Secure Device Structure\r
///\r
typedef struct {\r
- UINT8 Type;\r
- UINT8 Flags;\r
- UINT16 Length;\r
- UINT16 PciSegmentNumber;\r
- UINT16 StartBusNumber;\r
- UINT16 PciPathOffset;\r
- UINT16 PciPathLength;\r
- UINT16 VendorSpecificDataOffset;\r
- UINT16 VendorSpecificDataLength;\r
-} EFI_ACPI_6_4_SDEV_STRUCTURE_PCIE_ENDPOINT_DEVICE;\r
+ EFI_ACPI_6_4_SDEV_STRUCTURE_HEADER Header;\r
+ UINT16 DeviceIdentifierOffset;\r
+ UINT16 DeviceIdentifierLength;\r
+ UINT16 VendorSpecificDataOffset;\r
+ UINT16 VendorSpecificDataLength;\r
+ UINT16 SecureAccessComponentsOffset;\r
+ UINT16 SecureAccessComponentsLength;\r
+} EFI_ACPI_6_4_SDEV_STRUCTURE_ACPI_NAMESPACE_DEVICE;\r
\r
///\r
-/// ACPI_NAMESPACE_DEVICE based Secure Device Structure\r
+/// Secure Access Component Types\r
+///\r
+#define EFI_ACPI_6_4_SDEV_SECURE_ACCESS_COMPONENT_TYPE_IDENTIFICATION 0x00\r
+#define EFI_ACPI_6_4_SDEV_SECURE_ACCESS_COMPONENT_TYPE_MEMORY 0x01\r
+\r
+///\r
+/// Identification Based Secure Access Component\r
///\r
typedef struct {\r
- UINT8 Type;\r
- UINT8 Flags;\r
- UINT16 Length;\r
- UINT16 DeviceIdentifierOffset;\r
- UINT16 DeviceIdentifierLength;\r
- UINT16 VendorSpecificDataOffset;\r
- UINT16 VendorSpecificDataLength;\r
-} EFI_ACPI_6_4_SDEV_STRUCTURE_ACPI_NAMESPACE_DEVICE;\r
+ EFI_ACPI_6_4_SDEV_STRUCTURE_HEADER Header;\r
+ UINT16 HardwareIdentifierOffset;\r
+ UINT16 HardwareIdentifierLength;\r
+ UINT16 SubsystemIdentifierOffset;\r
+ UINT16 SubsystemIdentifierLength;\r
+ UINT16 HardwareRevision;\r
+ UINT8 HardwareRevisionPresent;\r
+ UINT8 ClassCodePresent;\r
+ UINT8 PciCompatibleBaseClass;\r
+ UINT8 PciCompatibleSubClass;\r
+ UINT8 PciCompatibleProgrammingInterface;\r
+} EFI_ACPI_6_4_SDEV_SECURE_ACCESS_COMPONENT_IDENTIFICATION_STRUCTURE;\r
+\r
+///\r
+/// Memory-based Secure Access Component\r
+///\r
+typedef struct {\r
+ EFI_ACPI_6_4_SDEV_STRUCTURE_HEADER Header;\r
+ UINT32 Reserved;\r
+ UINT64 MemoryAddressBase;\r
+ UINT64 MemoryLength;\r
+} EFI_ACPI_6_4_SDEV_SECURE_ACCESS_COMPONENT_MEMORY_STRUCTURE;\r
+\r
+///\r
+/// PCIe Endpoint Device based Secure Device Structure\r
+///\r
+typedef struct {\r
+ EFI_ACPI_6_4_SDEV_STRUCTURE_HEADER Header;\r
+ UINT16 PciSegmentNumber;\r
+ UINT16 StartBusNumber;\r
+ UINT16 PciPathOffset;\r
+ UINT16 PciPathLength;\r
+ UINT16 VendorSpecificDataOffset;\r
+ UINT16 VendorSpecificDataLength;\r
+} EFI_ACPI_6_4_SDEV_STRUCTURE_PCIE_ENDPOINT_DEVICE;\r
\r
///\r
/// Boot Error Record Table (BERT)\r