- HPET - High Precision Event Timer\r
- NUMA - Non-uniform Memory Access\r
**/\r
+\r
#ifndef _DMA_REMAPPING_REPORTING_TABLE_H_\r
#define _DMA_REMAPPING_REPORTING_TABLE_H_\r
\r
///\r
/// DMA-Remapping Reporting Structure definitions from section 8.1\r
///@{\r
-#define EFI_ACPI_DMAR_REVISION 0x01\r
+#define EFI_ACPI_DMAR_REVISION 0x01\r
\r
#define EFI_ACPI_DMAR_FLAGS_INTR_REMAP BIT0\r
#define EFI_ACPI_DMAR_FLAGS_X2APIC_OPT_OUT BIT1\r
///\r
/// Remapping Structure Types definitions from section 8.2\r
///@{\r
-#define EFI_ACPI_DMAR_TYPE_DRHD 0x00\r
-#define EFI_ACPI_DMAR_TYPE_RMRR 0x01\r
-#define EFI_ACPI_DMAR_TYPE_ATSR 0x02\r
-#define EFI_ACPI_DMAR_TYPE_RHSA 0x03\r
-#define EFI_ACPI_DMAR_TYPE_ANDD 0x04\r
-#define EFI_ACPI_DMAR_TYPE_SATC 0x05\r
+#define EFI_ACPI_DMAR_TYPE_DRHD 0x00\r
+#define EFI_ACPI_DMAR_TYPE_RMRR 0x01\r
+#define EFI_ACPI_DMAR_TYPE_ATSR 0x02\r
+#define EFI_ACPI_DMAR_TYPE_RHSA 0x03\r
+#define EFI_ACPI_DMAR_TYPE_ANDD 0x04\r
+#define EFI_ACPI_DMAR_TYPE_SATC 0x05\r
///@}\r
\r
///\r
///\r
/// Root Port ATS Capability Reporting Structure definitions from section 8.5\r
///\r
-#define EFI_ACPI_DMAR_ATSR_FLAGS_ALL_PORTS BIT0\r
+#define EFI_ACPI_DMAR_ATSR_FLAGS_ALL_PORTS BIT0\r
\r
///\r
/// Definition for DMA Remapping Structure Header\r
///\r
typedef struct {\r
- UINT16 Type;\r
- UINT16 Length;\r
+ UINT16 Type;\r
+ UINT16 Length;\r
} EFI_ACPI_DMAR_STRUCTURE_HEADER;\r
\r
///\r
/// Definition for DMA-Remapping PCI Path\r
///\r
typedef struct {\r
- UINT8 Device;\r
- UINT8 Function;\r
+ UINT8 Device;\r
+ UINT8 Function;\r
} EFI_ACPI_DMAR_PCI_PATH;\r
\r
///\r
/// Device Scope Structure is defined in section 8.3.1\r
///\r
typedef struct {\r
- UINT8 Type;\r
- UINT8 Length;\r
- UINT16 Reserved2;\r
- UINT8 EnumerationId;\r
- UINT8 StartBusNumber;\r
+ UINT8 Type;\r
+ UINT8 Length;\r
+ UINT16 Reserved2;\r
+ UINT8 EnumerationId;\r
+ UINT8 StartBusNumber;\r
} EFI_ACPI_DMAR_DEVICE_SCOPE_STRUCTURE_HEADER;\r
\r
/**\r
for each PCI segment in the platform.\r
**/\r
typedef struct {\r
- EFI_ACPI_DMAR_STRUCTURE_HEADER Header;\r
+ EFI_ACPI_DMAR_STRUCTURE_HEADER Header;\r
+\r
/**\r
- Bit[0]: INCLUDE_PCI_ALL\r
- If Set, this remapping hardware unit has under its scope all\r
through the DeviceScope field.\r
- Bits[7:1] Reserved.\r
**/\r
- UINT8 Flags;\r
- UINT8 Reserved;\r
+ UINT8 Flags;\r
+ UINT8 Reserved;\r
///\r
/// The PCI Segment associated with this unit.\r
///\r
- UINT16 SegmentNumber;\r
+ UINT16 SegmentNumber;\r
///\r
/// Base address of remapping hardware register-set for this unit.\r
///\r
- UINT64 RegisterBaseAddress;\r
+ UINT64 RegisterBaseAddress;\r
} EFI_ACPI_DMAR_DRHD_HEADER;\r
\r
/**\r
reserved memory region.\r
**/\r
typedef struct {\r
- EFI_ACPI_DMAR_STRUCTURE_HEADER Header;\r
- UINT8 Reserved[2];\r
+ EFI_ACPI_DMAR_STRUCTURE_HEADER Header;\r
+ UINT8 Reserved[2];\r
///\r
/// PCI Segment Number associated with devices identified through\r
/// the Device Scope field.\r
///\r
- UINT16 SegmentNumber;\r
+ UINT16 SegmentNumber;\r
///\r
/// Base address of 4KB-aligned reserved memory region\r
///\r
- UINT64 ReservedMemoryRegionBaseAddress;\r
+ UINT64 ReservedMemoryRegionBaseAddress;\r
+\r
/**\r
Last address of the reserved memory region. Value in this field must be\r
greater than the value in Reserved Memory Region Base Address field.\r
The reserved memory region size (Limit - Base + 1) must be an integer\r
multiple of 4KB.\r
**/\r
- UINT64 ReservedMemoryRegionLimitAddress;\r
+ UINT64 ReservedMemoryRegionLimitAddress;\r
} EFI_ACPI_DMAR_RMRR_HEADER;\r
\r
/**\r
ATS transactions.\r
**/\r
typedef struct {\r
- EFI_ACPI_DMAR_STRUCTURE_HEADER Header;\r
+ EFI_ACPI_DMAR_STRUCTURE_HEADER Header;\r
+\r
/**\r
- Bit[0]: ALL_PORTS:\r
- If Set, indicates all PCI Express Root Ports in the specified\r
Root Ports identified through the Device Scope field.\r
- Bits[7:1] Reserved.\r
**/\r
- UINT8 Flags;\r
- UINT8 Reserved;\r
+ UINT8 Flags;\r
+ UINT8 Reserved;\r
///\r
/// The PCI Segment associated with this ATSR structure\r
///\r
- UINT16 SegmentNumber;\r
+ UINT16 SegmentNumber;\r
} EFI_ACPI_DMAR_ATSR_HEADER;\r
\r
/**\r
reported through DRHD structure.\r
**/\r
typedef struct {\r
- EFI_ACPI_DMAR_STRUCTURE_HEADER Header;\r
- UINT8 Reserved[4];\r
+ EFI_ACPI_DMAR_STRUCTURE_HEADER Header;\r
+ UINT8 Reserved[4];\r
///\r
/// Register Base Address of this Remap hardware unit reported in the\r
/// corresponding DRHD structure.\r
///\r
- UINT64 RegisterBaseAddress;\r
+ UINT64 RegisterBaseAddress;\r
///\r
/// Proximity Domain to which the Remap hardware unit identified by the\r
/// Register Base Address field belongs.\r
///\r
- UINT32 ProximityDomain;\r
+ UINT32 ProximityDomain;\r
} EFI_ACPI_DMAR_RHSA_HEADER;\r
\r
/**\r
with Device-Scope entries of type ACPI_NAMESPACE_DEVICE.\r
**/\r
typedef struct {\r
- EFI_ACPI_DMAR_STRUCTURE_HEADER Header;\r
- UINT8 Reserved[3];\r
+ EFI_ACPI_DMAR_STRUCTURE_HEADER Header;\r
+ UINT8 Reserved[3];\r
+\r
/**\r
Each ACPI device enumerated through an ANDD structure must have a unique\r
value for this field. To report an ACPI device with ACPI Device Number\r
The Start Bus Number and Path fields in the Device-Scope together\r
provides the 16-bit source-id allocated by platform for the ACPI device.\r
**/\r
- UINT8 AcpiDeviceNumber;\r
+ UINT8 AcpiDeviceNumber;\r
} EFI_ACPI_DMAR_ANDD_HEADER;\r
\r
/**\r
defined in section 8.8.\r
**/\r
typedef struct {\r
- EFI_ACPI_DMAR_STRUCTURE_HEADER Header;\r
+ EFI_ACPI_DMAR_STRUCTURE_HEADER Header;\r
+\r
/**\r
- Bit[0]: ATC_REQUIRED:\r
- If Set, indicates that every SoC integrated device enumerated\r
performance or functionality).\r
- Bits[7:1] Reserved.\r
**/\r
- UINT8 Flags;\r
- UINT8 Reserved;\r
+ UINT8 Flags;\r
+ UINT8 Reserved;\r
///\r
/// The PCI Segment associated with this SATC structure. All SoC integrated\r
/// devices within a PCI segment with same value for Flags field must be\r
/// enumerated in the same SATC structure.\r
///\r
- UINT16 SegmentNumber;\r
+ UINT16 SegmentNumber;\r
} EFI_ACPI_DMAR_SATC_HEADER;\r
\r
/**\r
structures of type 1 (RMRR), and so forth.\r
**/\r
typedef struct {\r
- EFI_ACPI_DESCRIPTION_HEADER Header;\r
+ EFI_ACPI_DESCRIPTION_HEADER Header;\r
+\r
/**\r
This field indicates the maximum DMA physical addressability supported by\r
this platform. The system address map reported by the BIOS indicates what\r
For example, for a platform supporting 40 bits of physical addressability,\r
the value of 100111b is reported in this field.\r
**/\r
- UINT8 HostAddressWidth;\r
+ UINT8 HostAddressWidth;\r
+\r
/**\r
- Bit[0]: INTR_REMAP - If Clear, the platform does not support interrupt\r
remapping. If Set, the platform supports interrupt remapping.\r
such as on ExitBootServices().\r
- Bits[7:3] Reserved.\r
**/\r
- UINT8 Flags;\r
- UINT8 Reserved[10];\r
+ UINT8 Flags;\r
+ UINT8 Reserved[10];\r
} EFI_ACPI_DMAR_HEADER;\r
\r
#pragma pack()\r
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