MdePkg: Apply uncrustify changes

[mirror_edk2.git] / MdePkg / Include / IndustryStandard / PciCodeId.h

diff --git a/MdePkg/Include/IndustryStandard/PciCodeId.h b/MdePkg/Include/IndustryStandard/PciCodeId.h
index 492bc9efa16392e9b3fcb491bb1a107930603a60..45f32e66ceedb77ffa8e6015c06fa5d67398b47c 100644 (file)
--- a/MdePkg/Include/IndustryStandard/PciCodeId.h
+++ b/MdePkg/Include/IndustryStandard/PciCodeId.h
@@ -10,70 +10,69 @@
 #ifndef __PCI_CODE_ID_H__\r
 #define __PCI_CODE_ID_H__\r
 \r
-\r
 ///\r
 /// PCI_CLASS_MASS_STORAGE, Base Class 01h.\r
 ///\r
 ///@{\r
-#define   PCI_IF_MASS_STORAGE_SCSI_VENDOR_SPECIFIC          0x00\r
-#define   PCI_IF_MASS_STORAGE_SCSI_DEVICE_PQI               0x11\r
-#define   PCI_IF_MASS_STORAGE_SCSI_CONTROLLER_PQI           0x12\r
-#define   PCI_IF_MASS_STORAGE_SCSI_DEVICE_CONTROLLER_PQI    0x13\r
-#define   PCI_IF_MASS_STORAGE_SCSI_DEVICE_NVM_EXPRESS       0x21\r
-#define   PCI_IF_MASS_STORAGE_SATA_SERIAL_BUS               0x02\r
-#define PCI_CLASS_MASS_STORAGE_SAS                        0x07\r
-#define   PCI_IF_MASS_STORAGE_SAS                           0x00\r
-#define   PCI_IF_MASS_STORAGE_SAS_SERIAL_BUS                0x01\r
-#define PCI_CLASS_MASS_STORAGE_SOLID_STATE                0x08\r
-#define   PCI_IF_MASS_STORAGE_SOLID_STATE                   0x00\r
-#define   PCI_IF_MASS_STORAGE_SOLID_STATE_NVMHCI            0x01\r
-#define   PCI_IF_MASS_STORAGE_SOLID_STATE_ENTERPRISE_NVMHCI 0x02\r
+#define   PCI_IF_MASS_STORAGE_SCSI_VENDOR_SPECIFIC           0x00\r
+#define   PCI_IF_MASS_STORAGE_SCSI_DEVICE_PQI                0x11\r
+#define   PCI_IF_MASS_STORAGE_SCSI_CONTROLLER_PQI            0x12\r
+#define   PCI_IF_MASS_STORAGE_SCSI_DEVICE_CONTROLLER_PQI     0x13\r
+#define   PCI_IF_MASS_STORAGE_SCSI_DEVICE_NVM_EXPRESS        0x21\r
+#define   PCI_IF_MASS_STORAGE_SATA_SERIAL_BUS                0x02\r
+#define PCI_CLASS_MASS_STORAGE_SAS                           0x07\r
+#define   PCI_IF_MASS_STORAGE_SAS                            0x00\r
+#define   PCI_IF_MASS_STORAGE_SAS_SERIAL_BUS                 0x01\r
+#define PCI_CLASS_MASS_STORAGE_SOLID_STATE                   0x08\r
+#define   PCI_IF_MASS_STORAGE_SOLID_STATE                    0x00\r
+#define   PCI_IF_MASS_STORAGE_SOLID_STATE_NVMHCI             0x01\r
+#define   PCI_IF_MASS_STORAGE_SOLID_STATE_ENTERPRISE_NVMHCI  0x02\r
 ///@}\r
 \r
 ///\r
 /// PCI_CLASS_NETWORK, Base Class 02h.\r
 ///\r
 ///@{\r
-#define PCI_CLASS_NETWORK_INFINIBAND   0x07\r
+#define PCI_CLASS_NETWORK_INFINIBAND  0x07\r
 ///@}\r
 \r
 ///\r
 /// PCI_CLASS_MEDIA, Base Class 04h.\r
 ///\r
 ///@{\r
-#define PCI_CLASS_MEDIA_MIXED_MODE   0x03\r
+#define PCI_CLASS_MEDIA_MIXED_MODE  0x03\r
 ///@}\r
 \r
 ///\r
 /// PCI_CLASS_BRIDGE, Base Class 06h.\r
 ///\r
 ///@{\r
-#define PCI_CLASS_BRIDGE_ADVANCED_SWITCHING_TO_PCI      0x0B\r
-#define   PCI_IF_BRIDGE_ADVANCED_SWITCHING_TO_PCI_CUSTOM  0x00\r
-#define   PCI_IF_BRIDGE_ADVANCED_SWITCHING_TO_PCI_ASI_SIG 0x01\r
+#define PCI_CLASS_BRIDGE_ADVANCED_SWITCHING_TO_PCI         0x0B\r
+#define   PCI_IF_BRIDGE_ADVANCED_SWITCHING_TO_PCI_CUSTOM   0x00\r
+#define   PCI_IF_BRIDGE_ADVANCED_SWITCHING_TO_PCI_ASI_SIG  0x01\r
 ///@}\r
 \r
 ///\r
 /// PCI_CLASS_SYSTEM_PERIPHERAL, Base Class 08h.\r
 ///\r
 ///@{\r
-#define   PCI_IF_HPET                 0x03\r
-#define PCI_SUBCLASS_SD_HOST_CONTROLLER 0x05\r
-#define PCI_SUBCLASS_IOMMU              0x06\r
+#define   PCI_IF_HPET                    0x03\r
+#define PCI_SUBCLASS_SD_HOST_CONTROLLER  0x05\r
+#define PCI_SUBCLASS_IOMMU               0x06\r
 ///@}\r
 \r
 ///\r
 /// PCI_CLASS_PROCESSOR, Base Class 0Bh.\r
 ///\r
 ///@{\r
-#define PCI_SUBCLASS_PROC_OTHER 0x80\r
+#define PCI_SUBCLASS_PROC_OTHER  0x80\r
 ///@}\r
 \r
 ///\r
 /// PCI_CLASS_SERIAL, Base Class 0Ch.\r
 ///\r
 ///@{\r
-#define   PCI_IF_XHCI             0x30\r
+#define   PCI_IF_XHCI           0x30\r
 #define PCI_CLASS_SERIAL_OTHER  0x80\r
 ///@}\r
 \r
@@ -81,7 +80,7 @@
 /// PCI_CLASS_SATELLITE, Base Class 0Fh.\r
 ///\r
 ///@{\r
-#define PCI_SUBCLASS_SATELLITE_OTHER 0x80\r
+#define PCI_SUBCLASS_SATELLITE_OTHER  0x80\r
 ///@}\r
 \r
 ///\r