MdePkg/PciExpress21.h: Fix typo in PCI_REG_PCIE_SLOT_CONTROL

[mirror_edk2.git] / MdePkg / Include / IndustryStandard / PciExpress21.h

diff --git a/MdePkg/Include/IndustryStandard/PciExpress21.h b/MdePkg/Include/IndustryStandard/PciExpress21.h
index 175c82c88ee0e06ee163135574a5a773a0428a79..d90b5975ba922a47550121a978075b90625ee7e3 100644 (file)
--- a/MdePkg/Include/IndustryStandard/PciExpress21.h
+++ b/MdePkg/Include/IndustryStandard/PciExpress21.h
@@ -1,7 +1,7 @@
 /** @file\r
   Support for the latest PCI standard.\r
 \r
-  Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.<BR>\r
+  Copyright (c) 2006 - 2017, Intel Corporation. All rights reserved.<BR>\r
   (C) Copyright 2016 Hewlett Packard Enterprise Development LP<BR>  \r
   This program and the accompanying materials                          \r
   are licensed and made available under the terms and conditions of the BSD License         \r
@@ -18,6 +18,23 @@
 \r
 #include <IndustryStandard/Pci30.h>\r
 \r
+/**\r
+  Macro that converts PCI Bus, PCI Device, PCI Function and PCI Register to an\r
+  ECAM (Enhanced Configuration Access Mechanism) address. The unused upper bits\r
+  of Bus, Device, Function and Register are stripped prior to the generation of\r
+  the address.\r
+\r
+  @param  Bus       PCI Bus number. Range 0..255.\r
+  @param  Device    PCI Device number. Range 0..31.\r
+  @param  Function  PCI Function number. Range 0..7.\r
+  @param  Register  PCI Register number. Range 0..4095.\r
+\r
+  @return The encode ECAM address.\r
+\r
+**/\r
+#define PCI_ECAM_ADDRESS(Bus,Device,Function,Offset) \\r
+  (((Offset) & 0xfff) | (((Function) & 0x07) << 12) | (((Device) & 0x1f) << 15) | (((Bus) & 0xff) << 20))\r
+\r
 #pragma pack(1)\r
 ///\r
 /// PCI Express Capability Structure\r
@@ -165,18 +182,18 @@ typedef union {
 \r
 typedef union {\r
   struct {\r
-    UINT32 AttentionButtonPressed : 1;\r
-    UINT32 PowerFaultDetected : 1;\r
-    UINT32 MrlSensorChanged : 1;\r
-    UINT32 PresenceDetectChanged : 1;\r
-    UINT32 CommandCompletedInterrupt : 1;\r
-    UINT32 HotPlugInterrupt : 1;\r
-    UINT32 AttentionIndicator : 2;\r
-    UINT32 PowerIndicator : 2;\r
-    UINT32 PowerController : 1;\r
-    UINT32 ElectromechanicalInterlock : 1;\r
-    UINT32 DataLinkLayerStateChanged : 1;\r
-    UINT32 Reserved : 3;\r
+    UINT16 AttentionButtonPressed : 1;\r
+    UINT16 PowerFaultDetected : 1;\r
+    UINT16 MrlSensorChanged : 1;\r
+    UINT16 PresenceDetectChanged : 1;\r
+    UINT16 CommandCompletedInterrupt : 1;\r
+    UINT16 HotPlugInterrupt : 1;\r
+    UINT16 AttentionIndicator : 2;\r
+    UINT16 PowerIndicator : 2;\r
+    UINT16 PowerController : 1;\r
+    UINT16 ElectromechanicalInterlock : 1;\r
+    UINT16 DataLinkLayerStateChanged : 1;\r
+    UINT16 Reserved : 3;\r
   } Bits;\r
   UINT16   Uint16;\r
 } PCI_REG_PCIE_SLOT_CONTROL;\r