MdePkg IndustryStandard: Add DDR3, DDR4 and LPDDR definition per SPD spec

[mirror_edk2.git] / MdePkg / Include / IndustryStandard / SdramSpd.h

diff --git a/MdePkg/Include/IndustryStandard/SdramSpd.h b/MdePkg/Include/IndustryStandard/SdramSpd.h
index 2b2012be39c82c8fb6d38f31d434c5a9037a34ef..68f90454a565136dde5fe1c45e34f766b5d375d8 100644 (file)
--- a/MdePkg/Include/IndustryStandard/SdramSpd.h
+++ b/MdePkg/Include/IndustryStandard/SdramSpd.h
@@ -1,19 +1,23 @@
 /** @file\r
   This file contains definitions for the SPD fields on an SDRAM.\r
-    \r
-  Copyright (c) 2007 - 2008, Intel Corporation. All rights reserved.<BR>\r
-  This program and the accompanying materials                          \r
-  are licensed and made available under the terms and conditions of the BSD License         \r
-  which accompanies this distribution.  The full text of the license may be found at        \r
-  http://opensource.org/licenses/bsd-license.php                                            \r
 \r
-  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     \r
-  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             \r
+  Copyright (c) 2007 - 2016, Intel Corporation. All rights reserved.<BR>\r
+  This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
 **/\r
 \r
 #ifndef _SDRAM_SPD_H_\r
 #define _SDRAM_SPD_H_\r
 \r
+#include <IndustryStandard/SdramSpdDdr3.h>\r
+#include <IndustryStandard/SdramSpdDdr4.h>\r
+#include <IndustryStandard/SdramSpdLpDdr.h>\r
+\r
 //\r
 // SDRAM SPD field definitions\r
 //\r
@@ -47,9 +51,14 @@
 //\r
 // Memory Type Definitions\r
 //\r
-#define SPD_VAL_SDR_TYPE  4 ///< SDR SDRAM memory\r
-#define SPD_VAL_DDR_TYPE  7 ///< DDR SDRAM memory\r
-#define SPD_VAL_DDR2_TYPE 8 ///< DDR2 SDRAM memory\r
+#define SPD_VAL_SDR_TYPE  4       ///< SDR SDRAM memory\r
+#define SPD_VAL_DDR_TYPE  7       ///< DDR SDRAM memory\r
+#define SPD_VAL_DDR2_TYPE 8       ///< DDR2 SDRAM memory\r
+#define SPD_VAL_DDR3_TYPE 11      ///< DDR3 SDRAM memory\r
+#define SPD_VAL_DDR4_TYPE 12      ///< DDR4 SDRAM memory\r
+#define SPD_VAL_LPDDR3_TYPE 15    ///< LPDDR3 SDRAM memory\r
+#define SPD_VAL_LPDDR4_TYPE 16    ///< LPDDR4 SDRAM memory\r
+\r
 //\r
 // ECC Type Definitions\r
 //\r