Provides string functions, linked list functions, math functions, synchronization\r
functions, file path functions, and CPU architecture-specific functions.\r
\r
-Copyright (c) 2006 - 2017, Intel Corporation. All rights reserved.<BR>\r
+Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>\r
Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
@retval RETURN_INVALID_PARAMETER If Destination is NULL.\r
If Source is NULL.\r
If PcdMaximumUnicodeStringLength is not zero,\r
- and DestMax is greater than \r
+ and DestMax is greater than\r
PcdMaximumUnicodeStringLength.\r
If DestMax is 0.\r
@retval RETURN_ACCESS_DENIED If Source and Destination overlap.\r
@param Length The maximum number of Unicode characters to copy.\r
\r
@retval RETURN_SUCCESS String is copied.\r
- @retval RETURN_BUFFER_TOO_SMALL If DestMax is NOT greater than \r
+ @retval RETURN_BUFFER_TOO_SMALL If DestMax is NOT greater than\r
MIN(StrLen(Source), Length).\r
@retval RETURN_INVALID_PARAMETER If Destination is NULL.\r
If Source is NULL.\r
If PcdMaximumUnicodeStringLength is not zero,\r
- and DestMax is greater than \r
+ and DestMax is greater than\r
PcdMaximumUnicodeStringLength.\r
If DestMax is 0.\r
@retval RETURN_ACCESS_DENIED If Source and Destination overlap.\r
@param Source A pointer to a Null-terminated Unicode string.\r
\r
@retval RETURN_SUCCESS String is appended.\r
- @retval RETURN_BAD_BUFFER_SIZE If DestMax is NOT greater than \r
+ @retval RETURN_BAD_BUFFER_SIZE If DestMax is NOT greater than\r
StrLen(Destination).\r
@retval RETURN_BUFFER_TOO_SMALL If (DestMax - StrLen(Destination)) is NOT\r
greater than StrLen(Source).\r
@retval RETURN_INVALID_PARAMETER If Destination is NULL.\r
If Source is NULL.\r
If PcdMaximumUnicodeStringLength is not zero,\r
- and DestMax is greater than \r
+ and DestMax is greater than\r
PcdMaximumUnicodeStringLength.\r
If DestMax is 0.\r
@retval RETURN_ACCESS_DENIED If Source and Destination overlap.\r
@retval RETURN_INVALID_PARAMETER If Destination is NULL.\r
If Source is NULL.\r
If PcdMaximumUnicodeStringLength is not zero,\r
- and DestMax is greater than \r
+ and DestMax is greater than\r
PcdMaximumUnicodeStringLength.\r
If DestMax is 0.\r
@retval RETURN_ACCESS_DENIED If Source and Destination overlap.\r
@retval RETURN_INVALID_PARAMETER If Destination is NULL.\r
If Source is NULL.\r
If PcdMaximumAsciiStringLength is not zero,\r
- and DestMax is greater than \r
+ and DestMax is greater than\r
PcdMaximumAsciiStringLength.\r
If DestMax is 0.\r
@retval RETURN_ACCESS_DENIED If Source and Destination overlap.\r
@param Length The maximum number of Ascii characters to copy.\r
\r
@retval RETURN_SUCCESS String is copied.\r
- @retval RETURN_BUFFER_TOO_SMALL If DestMax is NOT greater than \r
+ @retval RETURN_BUFFER_TOO_SMALL If DestMax is NOT greater than\r
MIN(StrLen(Source), Length).\r
@retval RETURN_INVALID_PARAMETER If Destination is NULL.\r
If Source is NULL.\r
If PcdMaximumAsciiStringLength is not zero,\r
- and DestMax is greater than \r
+ and DestMax is greater than\r
PcdMaximumAsciiStringLength.\r
If DestMax is 0.\r
@retval RETURN_ACCESS_DENIED If Source and Destination overlap.\r
@param Source A pointer to a Null-terminated Ascii string.\r
\r
@retval RETURN_SUCCESS String is appended.\r
- @retval RETURN_BAD_BUFFER_SIZE If DestMax is NOT greater than \r
+ @retval RETURN_BAD_BUFFER_SIZE If DestMax is NOT greater than\r
StrLen(Destination).\r
@retval RETURN_BUFFER_TOO_SMALL If (DestMax - StrLen(Destination)) is NOT\r
greater than StrLen(Source).\r
@retval RETURN_INVALID_PARAMETER If Destination is NULL.\r
If Source is NULL.\r
If PcdMaximumAsciiStringLength is not zero,\r
- and DestMax is greater than \r
+ and DestMax is greater than\r
PcdMaximumAsciiStringLength.\r
If DestMax is 0.\r
@retval RETURN_ACCESS_DENIED If Source and Destination overlap.\r
@retval RETURN_INVALID_PARAMETER If Destination is NULL.\r
If Source is NULL.\r
If PcdMaximumAsciiStringLength is not zero,\r
- and DestMax is greater than \r
+ and DestMax is greater than\r
PcdMaximumAsciiStringLength.\r
If DestMax is 0.\r
@retval RETURN_ACCESS_DENIED If Source and Destination overlap.\r
/**\r
[ATTENTION] This function is deprecated for security reason.\r
\r
- Copies up to a specified length from one Null-terminated Unicode string to \r
+ Copies up to a specified length from one Null-terminated Unicode string to\r
another Null-terminated Unicode string and returns the new Unicode string.\r
\r
This function copies the contents of the Unicode string Source to the Unicode\r
If Length > 0 and Source is NULL, then ASSERT().\r
If Length > 0 and Source is not aligned on a 16-bit boundary, then ASSERT().\r
If Source and Destination overlap, then ASSERT().\r
- If PcdMaximumUnicodeStringLength is not zero, and Length is greater than \r
+ If PcdMaximumUnicodeStringLength is not zero, and Length is greater than\r
PcdMaximumUnicodeStringLength, then ASSERT().\r
If PcdMaximumUnicodeStringLength is not zero, and Source contains more than\r
PcdMaximumUnicodeStringLength Unicode characters, not including the Null-terminator,\r
Returns the size of a Null-terminated Unicode string in bytes, including the\r
Null terminator.\r
\r
- This function returns the size, in bytes, of the Null-terminated Unicode string \r
+ This function returns the size, in bytes, of the Null-terminated Unicode string\r
specified by String.\r
\r
If String is NULL, then ASSERT().\r
/**\r
Compares up to a specified length the contents of two Null-terminated Unicode strings,\r
and returns the difference between the first mismatched Unicode characters.\r
- \r
+\r
This function compares the Null-terminated Unicode string FirstString to the\r
Null-terminated Unicode string SecondString. At most, Length Unicode\r
characters will be compared. If Length is 0, then 0 is returned. If\r
/**\r
[ATTENTION] This function is deprecated for security reason.\r
\r
- Concatenates up to a specified length one Null-terminated Unicode to the end \r
- of another Null-terminated Unicode string, and returns the concatenated \r
+ Concatenates up to a specified length one Null-terminated Unicode to the end\r
+ of another Null-terminated Unicode string, and returns the concatenated\r
Unicode string.\r
\r
This function concatenates two Null-terminated Unicode strings. The contents\r
If Length > 0 and Source is NULL, then ASSERT().\r
If Length > 0 and Source is not aligned on a 16-bit boundary, then ASSERT().\r
If Source and Destination overlap, then ASSERT().\r
- If PcdMaximumUnicodeStringLength is not zero, and Length is greater than \r
+ If PcdMaximumUnicodeStringLength is not zero, and Length is greater than\r
PcdMaximumUnicodeStringLength, then ASSERT().\r
If PcdMaximumUnicodeStringLength is not zero, and Destination contains more\r
than PcdMaximumUnicodeStringLength Unicode characters, not including the\r
StrDecimalToUint64 (\r
IN CONST CHAR16 *String\r
);\r
- \r
+\r
\r
/**\r
Convert a Null-terminated Unicode hexadecimal string to a value of type UINTN.\r
The function will ignore the pad space, which includes spaces or tab characters,\r
before [zeros], [x] or [hexadecimal digit]. The running zero before [x] or\r
[hexadecimal digit] will be ignored. Then, the decoding starts after [x] or the\r
- first valid hexadecimal digit. Then, the function stops at the first character \r
+ first valid hexadecimal digit. Then, the function stops at the first character\r
that is a not a valid hexadecimal character or NULL, whichever one comes first.\r
\r
If String is NULL, then ASSERT().\r
/**\r
[ATTENTION] This function is deprecated for security reason.\r
\r
- Copies up to a specified length one Null-terminated ASCII string to another \r
+ Copies up to a specified length one Null-terminated ASCII string to another\r
Null-terminated ASCII string and returns the new ASCII string.\r
\r
This function copies the contents of the ASCII string Source to the ASCII\r
If Destination is NULL, then ASSERT().\r
If Source is NULL, then ASSERT().\r
If Source and Destination overlap, then ASSERT().\r
- If PcdMaximumAsciiStringLength is not zero, and Length is greater than \r
+ If PcdMaximumAsciiStringLength is not zero, and Length is greater than\r
PcdMaximumAsciiStringLength, then ASSERT().\r
If PcdMaximumAsciiStringLength is not zero, and Source contains more than\r
PcdMaximumAsciiStringLength ASCII characters, not including the Null-terminator,\r
\r
If Length > 0 and FirstString is NULL, then ASSERT().\r
If Length > 0 and SecondString is NULL, then ASSERT().\r
- If PcdMaximumAsciiStringLength is not zero, and Length is greater than \r
+ If PcdMaximumAsciiStringLength is not zero, and Length is greater than\r
PcdMaximumAsciiStringLength, then ASSERT().\r
If PcdMaximumAsciiStringLength is not zero, and FirstString contains more than\r
PcdMaximumAsciiStringLength ASCII characters, not including the Null-terminator,\r
@param FirstString The pointer to a Null-terminated ASCII string.\r
@param SecondString The pointer to a Null-terminated ASCII string.\r
@param Length The maximum number of ASCII characters for compare.\r
- \r
+\r
@retval ==0 FirstString is identical to SecondString.\r
@retval !=0 FirstString is not identical to SecondString.\r
\r
/**\r
[ATTENTION] This function is deprecated for security reason.\r
\r
- Concatenates up to a specified length one Null-terminated ASCII string to \r
- the end of another Null-terminated ASCII string, and returns the \r
+ Concatenates up to a specified length one Null-terminated ASCII string to\r
+ the end of another Null-terminated ASCII string, and returns the\r
concatenated ASCII string.\r
\r
This function concatenates two Null-terminated ASCII strings. The contents\r
\r
If ListHead is NULL, then ASSERT().\r
If Entry is NULL, then ASSERT().\r
- If ListHead was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or \r
+ If ListHead was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or\r
InitializeListHead(), then ASSERT().\r
If PcdMaximumLinkedListLength is not zero, and prior to insertion the number\r
of nodes in ListHead, including the ListHead node, is greater than or\r
/**\r
Retrieves the first node of a doubly linked list.\r
\r
- Returns the first node of a doubly linked list. List must have been \r
+ Returns the first node of a doubly linked list. List must have been\r
initialized with INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead().\r
If List is empty, then List is returned.\r
\r
If List is NULL, then ASSERT().\r
- If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or \r
+ If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or\r
InitializeListHead(), then ASSERT().\r
If PcdMaximumLinkedListLength is not zero, and the number of nodes\r
in List, including the List node, is greater than or equal to\r
/**\r
Retrieves the next node of a doubly linked list.\r
\r
- Returns the node of a doubly linked list that follows Node. \r
+ Returns the node of a doubly linked list that follows Node.\r
List must have been initialized with INTIALIZE_LIST_HEAD_VARIABLE()\r
or InitializeListHead(). If List is empty, then List is returned.\r
\r
If List is NULL, then ASSERT().\r
If Node is NULL, then ASSERT().\r
- If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or \r
+ If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or\r
InitializeListHead(), then ASSERT().\r
If PcdMaximumLinkedListLength is not zero, and List contains more than\r
PcdMaximumLinkedListLength nodes, then ASSERT().\r
IN CONST LIST_ENTRY *Node\r
);\r
\r
- \r
+\r
/**\r
Retrieves the previous node of a doubly linked list.\r
- \r
- Returns the node of a doubly linked list that precedes Node. \r
+\r
+ Returns the node of a doubly linked list that precedes Node.\r
List must have been initialized with INTIALIZE_LIST_HEAD_VARIABLE()\r
or InitializeListHead(). If List is empty, then List is returned.\r
- \r
+\r
If List is NULL, then ASSERT().\r
If Node is NULL, then ASSERT().\r
- If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or \r
+ If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or\r
InitializeListHead(), then ASSERT().\r
If PcdMaximumLinkedListLength is not zero, and List contains more than\r
PcdMaximumLinkedListLength nodes, then ASSERT().\r
If PcdVerifyNodeInList is TRUE and Node is not a node in List, then ASSERT().\r
- \r
+\r
@param List A pointer to the head node of a doubly linked list.\r
@param Node A pointer to a node in the doubly linked list.\r
- \r
+\r
@return The pointer to the previous node if one exists. Otherwise List is returned.\r
- \r
+\r
**/\r
LIST_ENTRY *\r
EFIAPI\r
IN CONST LIST_ENTRY *Node\r
);\r
\r
- \r
+\r
/**\r
Checks to see if a doubly linked list is empty or not.\r
\r
zero nodes, this function returns TRUE. Otherwise, it returns FALSE.\r
\r
If ListHead is NULL, then ASSERT().\r
- If ListHead was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or \r
+ If ListHead was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or\r
InitializeListHead(), then ASSERT().\r
If PcdMaximumLinkedListLength is not zero, and the number of nodes\r
in List, including the List node, is greater than or equal to\r
\r
If List is NULL, then ASSERT().\r
If Node is NULL, then ASSERT().\r
- If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead(), \r
+ If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead(),\r
then ASSERT().\r
If PcdMaximumLinkedListLength is not zero, and the number of nodes\r
in List, including the List node, is greater than or equal to\r
PcdMaximumLinkedListLength, then ASSERT().\r
- If PcdVerifyNodeInList is TRUE and Node is not a node in List the and Node is not equal \r
+ If PcdVerifyNodeInList is TRUE and Node is not a node in List the and Node is not equal\r
to List, then ASSERT().\r
\r
@param List A pointer to the head node of a doubly linked list.\r
Otherwise, the location of the FirstEntry node is swapped with the location\r
of the SecondEntry node in a doubly linked list. SecondEntry must be in the\r
same double linked list as FirstEntry and that double linked list must have\r
- been initialized with INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead(). \r
+ been initialized with INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead().\r
SecondEntry is returned after the nodes are swapped.\r
\r
If FirstEntry is NULL, then ASSERT().\r
If SecondEntry is NULL, then ASSERT().\r
- If PcdVerifyNodeInList is TRUE and SecondEntry and FirstEntry are not in the \r
+ If PcdVerifyNodeInList is TRUE and SecondEntry and FirstEntry are not in the\r
same linked list, then ASSERT().\r
If PcdMaximumLinkedListLength is not zero, and the number of nodes in the\r
linked list containing the FirstEntry and SecondEntry nodes, including\r
\r
@param FirstEntry A pointer to a node in a linked list.\r
@param SecondEntry A pointer to another node in the same linked list.\r
- \r
+\r
@return SecondEntry.\r
\r
**/\r
function returns the 64-bit signed quotient.\r
\r
It is the caller's responsibility to not call this function with a Divisor of 0.\r
- If Divisor is 0, then the quotient and remainder should be assumed to be \r
+ If Divisor is 0, then the quotient and remainder should be assumed to be\r
the largest negative integer.\r
\r
If Divisor is 0, then ASSERT().\r
bitwise OR, and returns the result.\r
\r
Performs a bitwise AND between the bit field specified by StartBit and EndBit\r
- in Operand and the value specified by AndData, followed by a bitwise \r
+ in Operand and the value specified by AndData, followed by a bitwise\r
OR with value specified by OrData. All other bits in Operand are\r
preserved. The new 8-bit value is returned.\r
\r
bitwise OR, and returns the result.\r
\r
Performs a bitwise AND between the bit field specified by StartBit and EndBit\r
- in Operand and the value specified by AndData, followed by a bitwise \r
+ in Operand and the value specified by AndData, followed by a bitwise\r
OR with value specified by OrData. All other bits in Operand are\r
preserved. The new 16-bit value is returned.\r
\r
bitwise OR, and returns the result.\r
\r
Performs a bitwise AND between the bit field specified by StartBit and EndBit\r
- in Operand and the value specified by AndData, followed by a bitwise \r
+ in Operand and the value specified by AndData, followed by a bitwise\r
OR with value specified by OrData. All other bits in Operand are\r
preserved. The new 32-bit value is returned.\r
\r
bitwise OR, and returns the result.\r
\r
Performs a bitwise AND between the bit field specified by StartBit and EndBit\r
- in Operand and the value specified by AndData, followed by a bitwise \r
+ in Operand and the value specified by AndData, followed by a bitwise\r
OR with value specified by OrData. All other bits in Operand are\r
preserved. The new 64-bit value is returned.\r
\r
IN UINT64 OrData\r
);\r
\r
+/**\r
+ Reads a bit field from a 32-bit value, counts and returns\r
+ the number of set bits.\r
+\r
+ Counts the number of set bits in the bit field specified by\r
+ StartBit and EndBit in Operand. The count is returned.\r
+\r
+ If StartBit is greater than 31, then ASSERT().\r
+ If EndBit is greater than 31, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param Operand Operand on which to perform the bitfield operation.\r
+ @param StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..31.\r
+ @param EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..31.\r
+\r
+ @return The number of bits set between StartBit and EndBit.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+BitFieldCountOnes32 (\r
+ IN UINT32 Operand,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit\r
+ );\r
+\r
+/**\r
+ Reads a bit field from a 64-bit value, counts and returns\r
+ the number of set bits.\r
+\r
+ Counts the number of set bits in the bit field specified by\r
+ StartBit and EndBit in Operand. The count is returned.\r
+\r
+ If StartBit is greater than 63, then ASSERT().\r
+ If EndBit is greater than 63, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param Operand Operand on which to perform the bitfield operation.\r
+ @param StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..63.\r
+ @param EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..63.\r
+\r
+ @return The number of bits set between StartBit and EndBit.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+BitFieldCountOnes64 (\r
+ IN UINT64 Operand,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit\r
+ );\r
+\r
//\r
// Base Library Checksum Functions\r
//\r
\r
If JumpBuffer is NULL, then ASSERT().\r
For Itanium processors, if JumpBuffer is not aligned on a 16-byte boundary, then ASSERT().\r
- \r
+\r
NOTE: The structure BASE_LIBRARY_JUMP_BUFFER is CPU architecture specific.\r
The same structure must never be used for more than one CPU architecture context.\r
- For example, a BASE_LIBRARY_JUMP_BUFFER allocated by an IA-32 module must never be used from an x64 module. \r
- SetJump()/LongJump() is not currently supported for the EBC processor type. \r
+ For example, a BASE_LIBRARY_JUMP_BUFFER allocated by an IA-32 module must never be used from an x64 module.\r
+ SetJump()/LongJump() is not currently supported for the EBC processor type.\r
\r
@param JumpBuffer A pointer to CPU context buffer.\r
\r
function.\r
@param NewStack A pointer to the new stack to use for the EntryPoint\r
function.\r
- @param ... This variable argument list is ignored for IA-32, x64, and \r
- EBC architectures. For Itanium processors, this variable \r
- argument list is expected to contain a single parameter of \r
+ @param ... This variable argument list is ignored for IA-32, x64, and\r
+ EBC architectures. For Itanium processors, this variable\r
+ argument list is expected to contain a single parameter of\r
type VOID * that specifies the new backing store pointer.\r
\r
\r
CpuDeadLoop (\r
VOID\r
);\r
- \r
+\r
#if defined (MDE_CPU_IPF)\r
\r
/**\r
Flush a range of cache lines in the cache coherency domain of the calling\r
CPU.\r
\r
- Flushes the cache lines specified by Address and Length. If Address is not aligned \r
- on a cache line boundary, then entire cache line containing Address is flushed. \r
- If Address + Length is not aligned on a cache line boundary, then the entire cache \r
- line containing Address + Length - 1 is flushed. This function may choose to flush \r
- the entire cache if that is more efficient than flushing the specified range. If \r
- Length is 0, the no cache lines are flushed. Address is returned. \r
+ Flushes the cache lines specified by Address and Length. If Address is not aligned\r
+ on a cache line boundary, then entire cache line containing Address is flushed.\r
+ If Address + Length is not aligned on a cache line boundary, then the entire cache\r
+ line containing Address + Length - 1 is flushed. This function may choose to flush\r
+ the entire cache if that is more efficient than flushing the specified range. If\r
+ Length is 0, the no cache lines are flushed. Address is returned.\r
This function is only available on Itanium processors.\r
\r
If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT().\r
\r
/**\r
Reads the current value of a Processor Identifier Register (CPUID).\r
- \r
- Reads and returns the current value of Processor Identifier Register specified by Index. \r
+\r
+ Reads and returns the current value of Processor Identifier Register specified by Index.\r
The Index of largest implemented CPUID (One less than the number of implemented CPUID\r
registers) is determined by CPUID [3] bits {7:0}.\r
No parameter checking is performed on Index. If the Index value is beyond the\r
\r
/**\r
Reads the current value of 64-bit Kernel Register #0 (KR0).\r
- \r
- Reads and returns the current value of KR0. \r
+\r
+ Reads and returns the current value of KR0.\r
This function is only available on Itanium processors.\r
\r
@return The current value of KR0.\r
/**\r
Reads the current value of 64-bit Kernel Register #1 (KR1).\r
\r
- Reads and returns the current value of KR1. \r
+ Reads and returns the current value of KR1.\r
This function is only available on Itanium processors.\r
\r
@return The current value of KR1.\r
/**\r
Reads the current value of 64-bit Kernel Register #2 (KR2).\r
\r
- Reads and returns the current value of KR2. \r
+ Reads and returns the current value of KR2.\r
This function is only available on Itanium processors.\r
\r
@return The current value of KR2.\r
/**\r
Reads the current value of 64-bit Kernel Register #3 (KR3).\r
\r
- Reads and returns the current value of KR3. \r
+ Reads and returns the current value of KR3.\r
This function is only available on Itanium processors.\r
\r
@return The current value of KR3.\r
/**\r
Reads the current value of 64-bit Kernel Register #4 (KR4).\r
\r
- Reads and returns the current value of KR4. \r
+ Reads and returns the current value of KR4.\r
This function is only available on Itanium processors.\r
- \r
+\r
@return The current value of KR4.\r
\r
**/\r
/**\r
Reads the current value of 64-bit Kernel Register #5 (KR5).\r
\r
- Reads and returns the current value of KR5. \r
+ Reads and returns the current value of KR5.\r
This function is only available on Itanium processors.\r
\r
@return The current value of KR5.\r
/**\r
Reads the current value of 64-bit Kernel Register #6 (KR6).\r
\r
- Reads and returns the current value of KR6. \r
+ Reads and returns the current value of KR6.\r
This function is only available on Itanium processors.\r
\r
@return The current value of KR6.\r
/**\r
Reads the current value of 64-bit Kernel Register #7 (KR7).\r
\r
- Reads and returns the current value of KR7. \r
+ Reads and returns the current value of KR7.\r
This function is only available on Itanium processors.\r
\r
@return The current value of KR7.\r
\r
/**\r
Write the current value of 64-bit Kernel Register #0 (KR0).\r
- \r
- Writes the current value of KR0. The 64-bit value written to \r
+\r
+ Writes the current value of KR0. The 64-bit value written to\r
the KR0 is returned. This function is only available on Itanium processors.\r
\r
@param Value The 64-bit value to write to KR0.\r
/**\r
Write the current value of 64-bit Kernel Register #1 (KR1).\r
\r
- Writes the current value of KR1. The 64-bit value written to \r
+ Writes the current value of KR1. The 64-bit value written to\r
the KR1 is returned. This function is only available on Itanium processors.\r
\r
@param Value The 64-bit value to write to KR1.\r
/**\r
Write the current value of 64-bit Kernel Register #2 (KR2).\r
\r
- Writes the current value of KR2. The 64-bit value written to \r
+ Writes the current value of KR2. The 64-bit value written to\r
the KR2 is returned. This function is only available on Itanium processors.\r
\r
@param Value The 64-bit value to write to KR2.\r
/**\r
Write the current value of 64-bit Kernel Register #3 (KR3).\r
\r
- Writes the current value of KR3. The 64-bit value written to \r
+ Writes the current value of KR3. The 64-bit value written to\r
the KR3 is returned. This function is only available on Itanium processors.\r
\r
@param Value The 64-bit value to write to KR3.\r
/**\r
Write the current value of 64-bit Kernel Register #4 (KR4).\r
\r
- Writes the current value of KR4. The 64-bit value written to \r
+ Writes the current value of KR4. The 64-bit value written to\r
the KR4 is returned. This function is only available on Itanium processors.\r
\r
@param Value The 64-bit value to write to KR4.\r
/**\r
Write the current value of 64-bit Kernel Register #5 (KR5).\r
\r
- Writes the current value of KR5. The 64-bit value written to \r
+ Writes the current value of KR5. The 64-bit value written to\r
the KR5 is returned. This function is only available on Itanium processors.\r
\r
@param Value The 64-bit value to write to KR5.\r
/**\r
Write the current value of 64-bit Kernel Register #6 (KR6).\r
\r
- Writes the current value of KR6. The 64-bit value written to \r
+ Writes the current value of KR6. The 64-bit value written to\r
the KR6 is returned. This function is only available on Itanium processors.\r
\r
@param Value The 64-bit value to write to KR6.\r
/**\r
Write the current value of 64-bit Kernel Register #7 (KR7).\r
\r
- Writes the current value of KR7. The 64-bit value written to \r
+ Writes the current value of KR7. The 64-bit value written to\r
the KR7 is returned. This function is only available on Itanium processors.\r
\r
@param Value The 64-bit value to write to KR7.\r
\r
/**\r
Reads the current value of Interval Timer Counter Register (ITC).\r
- \r
+\r
Reads and returns the current value of ITC.\r
This function is only available on Itanium processors.\r
\r
\r
/**\r
Reads the current value of Interval Timer Vector Register (ITV).\r
- \r
- Reads and returns the current value of ITV. \r
+\r
+ Reads and returns the current value of ITV.\r
This function is only available on Itanium processors.\r
\r
@return The current value of ITV.\r
\r
/**\r
Reads the current value of Interval Timer Match Register (ITM).\r
- \r
+\r
Reads and returns the current value of ITM.\r
This function is only available on Itanium processors.\r
\r
\r
/**\r
Writes the current value of 64-bit Interval Timer Counter Register (ITC).\r
- \r
- Writes the current value of ITC. The 64-bit value written to the ITC is returned. \r
+\r
+ Writes the current value of ITC. The 64-bit value written to the ITC is returned.\r
This function is only available on Itanium processors.\r
\r
@param Value The 64-bit value to write to ITC.\r
\r
/**\r
Writes the current value of 64-bit Interval Timer Match Register (ITM).\r
- \r
- Writes the current value of ITM. The 64-bit value written to the ITM is returned. \r
+\r
+ Writes the current value of ITM. The 64-bit value written to the ITM is returned.\r
This function is only available on Itanium processors.\r
\r
@param Value The 64-bit value to write to ITM.\r
\r
/**\r
Writes the current value of 64-bit Interval Timer Vector Register (ITV).\r
- \r
- Writes the current value of ITV. The 64-bit value written to the ITV is returned. \r
+\r
+ Writes the current value of ITV. The 64-bit value written to the ITV is returned.\r
No parameter checking is performed on Value. All bits of Value corresponding to\r
reserved fields of ITV must be 0 or a Reserved Register/Field fault may occur.\r
The caller must either guarantee that Value is valid, or the caller must set up\r
\r
/**\r
Reads the current value of Default Control Register (DCR).\r
- \r
+\r
Reads and returns the current value of DCR. This function is only available on Itanium processors.\r
\r
@return The current value of DCR.\r
\r
/**\r
Reads the current value of Interruption Vector Address Register (IVA).\r
- \r
+\r
Reads and returns the current value of IVA. This function is only available on Itanium processors.\r
\r
@return The current value of IVA.\r
\r
/**\r
Reads the current value of Page Table Address Register (PTA).\r
- \r
+\r
Reads and returns the current value of PTA. This function is only available on Itanium processors.\r
\r
@return The current value of PTA.\r
\r
/**\r
Writes the current value of 64-bit Default Control Register (DCR).\r
- \r
- Writes the current value of DCR. The 64-bit value written to the DCR is returned. \r
+\r
+ Writes the current value of DCR. The 64-bit value written to the DCR is returned.\r
No parameter checking is performed on Value. All bits of Value corresponding to\r
reserved fields of DCR must be 0 or a Reserved Register/Field fault may occur.\r
The caller must either guarantee that Value is valid, or the caller must set up\r
\r
/**\r
Writes the current value of 64-bit Interruption Vector Address Register (IVA).\r
- \r
- Writes the current value of IVA. The 64-bit value written to the IVA is returned. \r
+\r
+ Writes the current value of IVA. The 64-bit value written to the IVA is returned.\r
The size of vector table is 32 K bytes and is 32 K bytes aligned\r
the low 15 bits of Value is ignored when written.\r
This function is only available on Itanium processors.\r
\r
/**\r
Writes the current value of 64-bit Page Table Address Register (PTA).\r
- \r
- Writes the current value of PTA. The 64-bit value written to the PTA is returned. \r
+\r
+ Writes the current value of PTA. The 64-bit value written to the PTA is returned.\r
No parameter checking is performed on Value. All bits of Value corresponding to\r
reserved fields of DCR must be 0 or a Reserved Register/Field fault may occur.\r
The caller must either guarantee that Value is valid, or the caller must set up\r
\r
/**\r
Reads the current value of Local Interrupt ID Register (LID).\r
- \r
+\r
Reads and returns the current value of LID. This function is only available on Itanium processors.\r
\r
@return The current value of LID.\r
\r
/**\r
Reads the current value of External Interrupt Vector Register (IVR).\r
- \r
- Reads and returns the current value of IVR. This function is only available on Itanium processors. \r
+\r
+ Reads and returns the current value of IVR. This function is only available on Itanium processors.\r
\r
@return The current value of IVR.\r
\r
\r
/**\r
Reads the current value of Task Priority Register (TPR).\r
- \r
- Reads and returns the current value of TPR. This function is only available on Itanium processors. \r
+\r
+ Reads and returns the current value of TPR. This function is only available on Itanium processors.\r
\r
@return The current value of TPR.\r
\r
\r
/**\r
Reads the current value of External Interrupt Request Register #0 (IRR0).\r
- \r
- Reads and returns the current value of IRR0. This function is only available on Itanium processors. \r
+\r
+ Reads and returns the current value of IRR0. This function is only available on Itanium processors.\r
\r
@return The current value of IRR0.\r
\r
\r
/**\r
Reads the current value of External Interrupt Request Register #1 (IRR1).\r
- \r
- Reads and returns the current value of IRR1. This function is only available on Itanium processors. \r
+\r
+ Reads and returns the current value of IRR1. This function is only available on Itanium processors.\r
\r
@return The current value of IRR1.\r
\r
\r
/**\r
Reads the current value of External Interrupt Request Register #2 (IRR2).\r
- \r
+\r
Reads and returns the current value of IRR2. This function is only available on Itanium processors.\r
\r
@return The current value of IRR2.\r
\r
/**\r
Reads the current value of External Interrupt Request Register #3 (IRR3).\r
- \r
- Reads and returns the current value of IRR3. This function is only available on Itanium processors. \r
+\r
+ Reads and returns the current value of IRR3. This function is only available on Itanium processors.\r
\r
@return The current value of IRR3.\r
\r
\r
/**\r
Reads the current value of Performance Monitor Vector Register (PMV).\r
- \r
- Reads and returns the current value of PMV. This function is only available on Itanium processors. \r
+\r
+ Reads and returns the current value of PMV. This function is only available on Itanium processors.\r
\r
@return The current value of PMV.\r
\r
\r
/**\r
Reads the current value of Corrected Machine Check Vector Register (CMCV).\r
- \r
+\r
Reads and returns the current value of CMCV. This function is only available on Itanium processors.\r
\r
@return The current value of CMCV.\r
\r
/**\r
Reads the current value of Local Redirection Register #0 (LRR0).\r
- \r
- Reads and returns the current value of LRR0. This function is only available on Itanium processors. \r
+\r
+ Reads and returns the current value of LRR0. This function is only available on Itanium processors.\r
\r
@return The current value of LRR0.\r
\r
\r
/**\r
Reads the current value of Local Redirection Register #1 (LRR1).\r
- \r
+\r
Reads and returns the current value of LRR1. This function is only available on Itanium processors.\r
\r
@return The current value of LRR1.\r
\r
/**\r
Writes the current value of 64-bit Page Local Interrupt ID Register (LID).\r
- \r
- Writes the current value of LID. The 64-bit value written to the LID is returned. \r
+\r
+ Writes the current value of LID. The 64-bit value written to the LID is returned.\r
No parameter checking is performed on Value. All bits of Value corresponding to\r
reserved fields of LID must be 0 or a Reserved Register/Field fault may occur.\r
The caller must either guarantee that Value is valid, or the caller must set up\r
\r
/**\r
Writes the current value of 64-bit Task Priority Register (TPR).\r
- \r
- Writes the current value of TPR. The 64-bit value written to the TPR is returned. \r
+\r
+ Writes the current value of TPR. The 64-bit value written to the TPR is returned.\r
No parameter checking is performed on Value. All bits of Value corresponding to\r
reserved fields of TPR must be 0 or a Reserved Register/Field fault may occur.\r
The caller must either guarantee that Value is valid, or the caller must set up\r
\r
/**\r
Performs a write operation on End OF External Interrupt Register (EOI).\r
- \r
+\r
Writes a value of 0 to the EOI Register. This function is only available on Itanium processors.\r
\r
**/\r
\r
/**\r
Writes the current value of 64-bit Performance Monitor Vector Register (PMV).\r
- \r
- Writes the current value of PMV. The 64-bit value written to the PMV is returned. \r
+\r
+ Writes the current value of PMV. The 64-bit value written to the PMV is returned.\r
No parameter checking is performed on Value. All bits of Value corresponding\r
to reserved fields of PMV must be 0 or a Reserved Register/Field fault may occur.\r
The caller must either guarantee that Value is valid, or the caller must set up\r
\r
/**\r
Writes the current value of 64-bit Corrected Machine Check Vector Register (CMCV).\r
- \r
- Writes the current value of CMCV. The 64-bit value written to the CMCV is returned. \r
+\r
+ Writes the current value of CMCV. The 64-bit value written to the CMCV is returned.\r
No parameter checking is performed on Value. All bits of Value corresponding\r
to reserved fields of CMCV must be 0 or a Reserved Register/Field fault may occur.\r
The caller must either guarantee that Value is valid, or the caller must set up\r
\r
/**\r
Writes the current value of 64-bit Local Redirection Register #0 (LRR0).\r
- \r
- Writes the current value of LRR0. The 64-bit value written to the LRR0 is returned. \r
+\r
+ Writes the current value of LRR0. The 64-bit value written to the LRR0 is returned.\r
No parameter checking is performed on Value. All bits of Value corresponding\r
to reserved fields of LRR0 must be 0 or a Reserved Register/Field fault may occur.\r
The caller must either guarantee that Value is valid, or the caller must set up\r
\r
/**\r
Writes the current value of 64-bit Local Redirection Register #1 (LRR1).\r
- \r
- Writes the current value of LRR1. The 64-bit value written to the LRR1 is returned. \r
+\r
+ Writes the current value of LRR1. The 64-bit value written to the LRR1 is returned.\r
No parameter checking is performed on Value. All bits of Value corresponding\r
to reserved fields of LRR1 must be 0 or a Reserved Register/Field fault may occur.\r
The caller must either guarantee that Value is valid, or the caller must\r
\r
/**\r
Reads the current value of Instruction Breakpoint Register (IBR).\r
- \r
+\r
The Instruction Breakpoint Registers are used in pairs. The even numbered\r
registers contain breakpoint addresses, and the odd numbered registers contain\r
breakpoint mask conditions. At least four instruction registers pairs are implemented\r
/**\r
Reads a 64-bit control register.\r
\r
- Reads and returns the control register specified by Index. The valid Index valued \r
+ Reads and returns the control register specified by Index. The valid Index valued\r
are defined above in "Related Definitions".\r
- If Index is invalid then 0xFFFFFFFFFFFFFFFF is returned. This function is only \r
+ If Index is invalid then 0xFFFFFFFFFFFFFFFF is returned. This function is only\r
available on Itanium processors.\r
\r
@param Index The index of the control register to read.\r
/**\r
Reads a 64-bit application register.\r
\r
- Reads and returns the application register specified by Index. The valid Index \r
+ Reads and returns the application register specified by Index. The valid Index\r
valued are defined above in "Related Definitions".\r
- If Index is invalid then 0xFFFFFFFFFFFFFFFF is returned. This function is only \r
+ If Index is invalid then 0xFFFFFFFFFFFFFFFF is returned. This function is only\r
available on Itanium processors.\r
\r
@param Index The index of the application register to read.\r
\r
@param Index The 8-bit Machine Specific Register index to read.\r
\r
- @return The current value of the Machine Specific Register specified by Index. \r
+ @return The current value of the Machine Specific Register specified by Index.\r
\r
**/\r
UINT64\r
EFIAPI\r
AsmReadMsr (\r
- IN UINT8 Index \r
+ IN UINT8 Index\r
);\r
\r
\r
@param Index The 8-bit Machine Specific Register index to write.\r
@param Value The 64-bit value to write to the Machine Specific Register.\r
\r
- @return The 64-bit value to write to the Machine Specific Register. \r
+ @return The 64-bit value to write to the Machine Specific Register.\r
\r
**/\r
UINT64\r
EFIAPI\r
AsmWriteMsr (\r
- IN UINT8 Index, \r
- IN UINT64 Value \r
+ IN UINT8 Index,\r
+ IN UINT64 Value\r
);\r
\r
\r
struct {\r
UINT64 Uint64;\r
UINT64 Uint64_1;\r
- } Uint128; \r
+ } Uint128;\r
} IA32_IDT_GATE_DESCRIPTOR;\r
\r
#pragma pack (1)\r
Writes Value to a bit field in the lower 32-bits of a 64-bit MSR. The bit\r
field is specified by the StartBit and the EndBit. All other bits in the\r
destination MSR are preserved. The lower 32-bits of the MSR written is\r
- returned. The caller must either guarantee that Index and the data written \r
- is valid, or the caller must set up exception handlers to catch the exceptions. \r
+ returned. The caller must either guarantee that Index and the data written\r
+ is valid, or the caller must set up exception handlers to catch the exceptions.\r
This function is only available on IA-32 and x64.\r
\r
If StartBit is greater than 31, then ASSERT().\r
\r
\r
/**\r
- Reads a 64-bit MSR, performs a bitwise AND followed by a bitwise \r
+ Reads a 64-bit MSR, performs a bitwise AND followed by a bitwise\r
OR, and writes the result back to the 64-bit MSR.\r
\r
Reads the 64-bit MSR specified by Index, performs a bitwise AND between read\r
\r
Writes Value to a bit field in a 64-bit MSR. The bit field is specified by\r
the StartBit and the EndBit. All other bits in the destination MSR are\r
- preserved. The MSR written is returned. The caller must either guarantee \r
- that Index and the data written is valid, or the caller must set up exception \r
+ preserved. The MSR written is returned. The caller must either guarantee\r
+ that Index and the data written is valid, or the caller must set up exception\r
handlers to catch the exceptions. This function is only available on IA-32 and x64.\r
\r
If StartBit is greater than 63, then ASSERT().\r
in ExtraStackSize. If parameters are passed to the 16-bit real mode code,\r
then the actual minimum stack size is ExtraStackSize plus the maximum number\r
of bytes that need to be passed to the 16-bit real mode code.\r
- \r
+\r
If RealModeBufferSize is NULL, then ASSERT().\r
If ExtraStackSize is NULL, then ASSERT().\r
\r
Prepares all structures a code required to use AsmThunk16().\r
\r
Prepares all structures and code required to use AsmThunk16().\r
- \r
+\r
This interface is limited to be used in either physical mode or virtual modes with paging enabled where the\r
virtual to physical mappings for ThunkContext.RealModeBuffer is mapped 1:1.\r
\r
AsmPrepareThunk16() must be called with ThunkContext before this function is used.\r
This function must be called with interrupts disabled.\r
\r
- The register state from the RealModeState field of ThunkContext is restored just prior \r
- to calling the 16-bit real mode entry point. This includes the EFLAGS field of RealModeState, \r
+ The register state from the RealModeState field of ThunkContext is restored just prior\r
+ to calling the 16-bit real mode entry point. This includes the EFLAGS field of RealModeState,\r
which is used to set the interrupt state when a 16-bit real mode entry point is called.\r
Control is transferred to the 16-bit real mode entry point specified by the CS and Eip fields of RealModeState.\r
- The stack is initialized to the SS and ESP fields of RealModeState. Any parameters passed to \r
- the 16-bit real mode code must be populated by the caller at SS:ESP prior to calling this function. \r
+ The stack is initialized to the SS and ESP fields of RealModeState. Any parameters passed to\r
+ the 16-bit real mode code must be populated by the caller at SS:ESP prior to calling this function.\r
The 16-bit real mode entry point is invoked with a 16-bit CALL FAR instruction,\r
- so when accessing stack contents, the 16-bit real mode code must account for the 16-bit segment \r
- and 16-bit offset of the return address that were pushed onto the stack. The 16-bit real mode entry \r
- point must exit with a RETF instruction. The register state is captured into RealModeState immediately \r
+ so when accessing stack contents, the 16-bit real mode code must account for the 16-bit segment\r
+ and 16-bit offset of the return address that were pushed onto the stack. The 16-bit real mode entry\r
+ point must exit with a RETF instruction. The register state is captured into RealModeState immediately\r
after the RETF instruction is executed.\r
- \r
- If EFLAGS specifies interrupts enabled, or any of the 16-bit real mode code enables interrupts, \r
- or any of the 16-bit real mode code makes a SW interrupt, then the caller is responsible for making sure \r
- the IDT at address 0 is initialized to handle any HW or SW interrupts that may occur while in 16-bit real mode. \r
- \r
- If EFLAGS specifies interrupts enabled, or any of the 16-bit real mode code enables interrupts, \r
- then the caller is responsible for making sure the 8259 PIC is in a state compatible with 16-bit real mode. \r
+\r
+ If EFLAGS specifies interrupts enabled, or any of the 16-bit real mode code enables interrupts,\r
+ or any of the 16-bit real mode code makes a SW interrupt, then the caller is responsible for making sure\r
+ the IDT at address 0 is initialized to handle any HW or SW interrupts that may occur while in 16-bit real mode.\r
+\r
+ If EFLAGS specifies interrupts enabled, or any of the 16-bit real mode code enables interrupts,\r
+ then the caller is responsible for making sure the 8259 PIC is in a state compatible with 16-bit real mode.\r
This includes the base vectors, the interrupt masks, and the edge/level trigger mode.\r
- \r
- If THUNK_ATTRIBUTE_BIG_REAL_MODE is set in the ThunkAttributes field of ThunkContext, then the user code \r
+\r
+ If THUNK_ATTRIBUTE_BIG_REAL_MODE is set in the ThunkAttributes field of ThunkContext, then the user code\r
is invoked in big real mode. Otherwise, the user code is invoked in 16-bit real mode with 64KB segment limits.\r
- \r
- If neither THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 nor THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL are set in \r
- ThunkAttributes, then it is assumed that the user code did not enable the A20 mask, and no attempt is made to \r
+\r
+ If neither THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 nor THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL are set in\r
+ ThunkAttributes, then it is assumed that the user code did not enable the A20 mask, and no attempt is made to\r
disable the A20 mask.\r
- \r
- If THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 is set and THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL is clear in \r
- ThunkAttributes, then attempt to use the INT 15 service to disable the A20 mask. If this INT 15 call fails, \r
+\r
+ If THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 is set and THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL is clear in\r
+ ThunkAttributes, then attempt to use the INT 15 service to disable the A20 mask. If this INT 15 call fails,\r
then attempt to disable the A20 mask by directly accessing the 8042 keyboard controller I/O ports.\r
- \r
- If THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 is clear and THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL is set in \r
+\r
+ If THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 is clear and THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL is set in\r
ThunkAttributes, then attempt to disable the A20 mask by directly accessing the 8042 keyboard controller I/O ports.\r
- \r
+\r
If ThunkContext is NULL, then ASSERT().\r
If AsmPrepareThunk16() was not previously called with ThunkContext, then ASSERT().\r
- If both THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 and THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL are set in \r
+ If both THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 and THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL are set in\r
ThunkAttributes, then ASSERT().\r
\r
This interface is limited to be used in either physical mode or virtual modes with paging enabled where the\r
projects / mirror_edk2.git / blobdiff