MdePkg/BaseLib: add PatchInstructionX86()

[mirror_edk2.git] / MdePkg / Include / Library / BaseLib.h

diff --git a/MdePkg/Include/Library/BaseLib.h b/MdePkg/Include/Library/BaseLib.h
index e4455e71d5c3fab916ec14ab760204355b9c1c86..eb2899f8524e7a8e1856d68f0c25ced58c4253fb 100644 (file)
--- a/MdePkg/Include/Library/BaseLib.h
+++ b/MdePkg/Include/Library/BaseLib.h
@@ -6881,6 +6881,20 @@ typedef struct {
 #define THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15   0x00000002\r
 #define THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL 0x00000004\r
 \r
+///\r
+/// Type definition for representing labels in NASM source code that allow for\r
+/// the patching of immediate operands of IA32 and X64 instructions.\r
+///\r
+/// While the type is technically defined as a function type (note: not a\r
+/// pointer-to-function type), such labels in NASM source code never stand for\r
+/// actual functions, and identifiers declared with this function type should\r
+/// never be called. This is also why the EFIAPI calling convention specifier\r
+/// is missing from the typedef, and why the typedef does not follow the usual\r
+/// edk2 coding style for function (or pointer-to-function) typedefs. The VOID\r
+/// return type and the VOID argument list are merely artifacts.\r
+///\r
+typedef VOID (X86_ASSEMBLY_PATCH_LABEL) (VOID);\r
+\r
 /**\r
   Retrieves CPUID information.\r
 \r
@@ -9068,5 +9082,47 @@ AsmWriteTr (
   IN UINT16 Selector\r
   );\r
 \r
+/**\r
+  Patch the immediate operand of an IA32 or X64 instruction such that the byte,\r
+  word, dword or qword operand is encoded at the end of the instruction's\r
+  binary representation.\r
+\r
+  This function should be used to update object code that was compiled with\r
+  NASM from assembly source code. Example:\r
+\r
+  NASM source code:\r
+\r
+        mov     eax, strict dword 0 ; the imm32 zero operand will be patched\r
+    ASM_PFX(gPatchCr3):\r
+        mov     cr3, eax\r
+\r
+  C source code:\r
+\r
+    X86_ASSEMBLY_PATCH_LABEL gPatchCr3;\r
+    PatchInstructionX86 (gPatchCr3, AsmReadCr3 (), 4);\r
+\r
+  @param[out] InstructionEnd  Pointer right past the instruction to patch. The\r
+                              immediate operand to patch is expected to\r
+                              comprise the trailing bytes of the instruction.\r
+                              If InstructionEnd is closer to address 0 than\r
+                              ValueSize permits, then ASSERT().\r
+\r
+  @param[in] PatchValue       The constant to write to the immediate operand.\r
+                              The caller is responsible for ensuring that\r
+                              PatchValue can be represented in the byte, word,\r
+                              dword or qword operand (as indicated through\r
+                              ValueSize); otherwise ASSERT().\r
+\r
+  @param[in] ValueSize        The size of the operand in bytes; must be 1, 2,\r
+                              4, or 8. ASSERT() otherwise.\r
+**/\r
+VOID\r
+EFIAPI\r
+PatchInstructionX86 (\r
+  OUT X86_ASSEMBLY_PATCH_LABEL *InstructionEnd,\r
+  IN  UINT64                   PatchValue,\r
+  IN  UINTN                    ValueSize\r
+  );\r
+\r
 #endif // defined (MDE_CPU_IA32) || defined (MDE_CPU_X64)\r
 #endif // !defined (__BASE_LIB__)\r