MdePkg/PciSegmentLib: Fix typo in function header comments

[mirror_edk2.git] / MdePkg / Include / Library / PciSegmentLib.h

diff --git a/MdePkg/Include/Library/PciSegmentLib.h b/MdePkg/Include/Library/PciSegmentLib.h
index 5175e0760646aac453fcd73482f0a32a834e8672..6e4fecb0b1c94be8e074ba3365ea655a1e1b1edf 100644 (file)
--- a/MdePkg/Include/Library/PciSegmentLib.h
+++ b/MdePkg/Include/Library/PciSegmentLib.h
@@ -23,7 +23,7 @@
   access method.  Modules will typically use the PCI Segment Library for its PCI configuration \r
   accesses when PCI Segments other than Segment #0 must be accessed.  \r
 \r
   access method.  Modules will typically use the PCI Segment Library for its PCI configuration \r
   accesses when PCI Segments other than Segment #0 must be accessed.  \r
 \r

-Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.<BR>\r
+Copyright (c) 2006 - 2017, Intel Corporation. All rights reserved.<BR>\r

 This program and the accompanying materials\r
 are licensed and made available under the terms and conditions of the BSD License\r
 which accompanies this distribution.  The full text of the license may be found at\r
 This program and the accompanying materials\r
 are licensed and made available under the terms and conditions of the BSD License\r
 which accompanies this distribution.  The full text of the license may be found at\r


@@ -99,9 +99,9 @@ PciSegmentRegisterForRuntimeAccess (
 \r
   Reads and returns the 8-bit PCI configuration register specified by Address.\r
   This function must guarantee that all PCI read and write operations are serialized.\r
 \r
   Reads and returns the 8-bit PCI configuration register specified by Address.\r
   This function must guarantee that all PCI read and write operations are serialized.\r

-  \r
+\r

   If any reserved bits in Address are set, then ASSERT().\r
   If any reserved bits in Address are set, then ASSERT().\r

-  \r
+\r

   @param  Address   Address that encodes the PCI Segment, Bus, Device, Function, and Register.\r
 \r
   @return The 8-bit PCI configuration register specified by Address.\r
   @param  Address   Address that encodes the PCI Segment, Bus, Device, Function, and Register.\r
 \r
   @return The 8-bit PCI configuration register specified by Address.\r


@@ -118,7 +118,7 @@ PciSegmentRead8 (
 \r
   Writes the 8-bit PCI configuration register specified by Address with the value specified by Value.\r
   Value is returned.  This function must guarantee that all PCI read and write operations are serialized.\r
 \r
   Writes the 8-bit PCI configuration register specified by Address with the value specified by Value.\r
   Value is returned.  This function must guarantee that all PCI read and write operations are serialized.\r

-  \r
+\r

   If any reserved bits in Address are set, then ASSERT().\r
 \r
   @param  Address     Address that encodes the PCI Segment, Bus, Device, Function, and Register.\r
   If any reserved bits in Address are set, then ASSERT().\r
 \r
   @param  Address     Address that encodes the PCI Segment, Bus, Device, Function, and Register.\r


@@ -142,7 +142,7 @@ PciSegmentWrite8 (
   and writes the result to the 8-bit PCI configuration register specified by Address.\r
   The value written to the PCI configuration register is returned.\r
   This function must guarantee that all PCI read and write operations are serialized.\r
   and writes the result to the 8-bit PCI configuration register specified by Address.\r
   The value written to the PCI configuration register is returned.\r
   This function must guarantee that all PCI read and write operations are serialized.\r

-  \r
+\r

   If any reserved bits in Address are set, then ASSERT().\r
 \r
   @param  Address   Address that encodes the PCI Segment, Bus, Device, Function, and Register.\r
   If any reserved bits in Address are set, then ASSERT().\r
 \r
   @param  Address   Address that encodes the PCI Segment, Bus, Device, Function, and Register.\r


@@ -184,18 +184,18 @@ PciSegmentAnd8 (
 /**\r
   Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit value,\r
   followed a  bitwise OR with another 8-bit value.\r
 /**\r
   Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit value,\r
   followed a  bitwise OR with another 8-bit value.\r

-  \r
+\r

   Reads the 8-bit PCI configuration register specified by Address,\r
   performs a bitwise AND between the read result and the value specified by AndData,\r
   performs a bitwise OR between the result of the AND operation and the value specified by OrData,\r
   and writes the result to the 8-bit PCI configuration register specified by Address.\r
   The value written to the PCI configuration register is returned.\r
   This function must guarantee that all PCI read and write operations are serialized.\r
   Reads the 8-bit PCI configuration register specified by Address,\r
   performs a bitwise AND between the read result and the value specified by AndData,\r
   performs a bitwise OR between the result of the AND operation and the value specified by OrData,\r
   and writes the result to the 8-bit PCI configuration register specified by Address.\r
   The value written to the PCI configuration register is returned.\r
   This function must guarantee that all PCI read and write operations are serialized.\r

-  \r
+\r

   If any reserved bits in Address are set, then ASSERT().\r
 \r
   @param  Address   Address that encodes the PCI Segment, Bus, Device, Function, and Register.\r
   If any reserved bits in Address are set, then ASSERT().\r
 \r
   @param  Address   Address that encodes the PCI Segment, Bus, Device, Function, and Register.\r

-  @param  AndData    The value to AND with the PCI configuration register.\r
+  @param  AndData   The value to AND with the PCI configuration register.\r

   @param  OrData    The value to OR with the PCI configuration register.\r
 \r
   @return The value written to the PCI configuration register.\r
   @param  OrData    The value to OR with the PCI configuration register.\r
 \r
   @return The value written to the PCI configuration register.\r


@@ -345,8 +345,7 @@ PciSegmentBitFieldAnd8 (
 \r
 /**\r
   Reads a bit field in an 8-bit port, performs a bitwise AND followed by a\r
 \r
 /**\r
   Reads a bit field in an 8-bit port, performs a bitwise AND followed by a\r

-  bitwise OR, and writes the result back to the bit field in the\r
-  8-bit port.\r
+  bitwise OR, and writes the result back to the bit field in the 8-bit port.\r

 \r
   Reads the 8-bit PCI configuration register specified by Address, performs a\r
   bitwise AND followed by a bitwise OR between the read result and\r
 \r
   Reads the 8-bit PCI configuration register specified by Address, performs a\r
   bitwise AND followed by a bitwise OR between the read result and\r


@@ -389,10 +388,10 @@ PciSegmentBitFieldAndThenOr8 (
 \r
   Reads and returns the 16-bit PCI configuration register specified by Address.\r
   This function must guarantee that all PCI read and write operations are serialized.\r
 \r
   Reads and returns the 16-bit PCI configuration register specified by Address.\r
   This function must guarantee that all PCI read and write operations are serialized.\r

-  \r
+\r

   If any reserved bits in Address are set, then ASSERT().\r
   If Address is not aligned on a 16-bit boundary, then ASSERT().\r
   If any reserved bits in Address are set, then ASSERT().\r
   If Address is not aligned on a 16-bit boundary, then ASSERT().\r

-  \r
+\r

   @param  Address   Address that encodes the PCI Segment, Bus, Device, Function, and Register.\r
 \r
   @return The 16-bit PCI configuration register specified by Address.\r
   @param  Address   Address that encodes the PCI Segment, Bus, Device, Function, and Register.\r
 \r
   @return The 16-bit PCI configuration register specified by Address.\r


@@ -409,7 +408,7 @@ PciSegmentRead16 (
 \r
   Writes the 16-bit PCI configuration register specified by Address with the value specified by Value.\r
   Value is returned.  This function must guarantee that all PCI read and write operations are serialized.\r
 \r
   Writes the 16-bit PCI configuration register specified by Address with the value specified by Value.\r
   Value is returned.  This function must guarantee that all PCI read and write operations are serialized.\r

-  \r
+\r

   If any reserved bits in Address are set, then ASSERT().\r
   If Address is not aligned on a 16-bit boundary, then ASSERT().\r
 \r
   If any reserved bits in Address are set, then ASSERT().\r
   If Address is not aligned on a 16-bit boundary, then ASSERT().\r
 \r


@@ -431,11 +430,10 @@ PciSegmentWrite16 (
   a 16-bit value.\r
 \r
   Reads the 16-bit PCI configuration register specified by Address, performs a\r
   a 16-bit value.\r
 \r
   Reads the 16-bit PCI configuration register specified by Address, performs a\r

-  bitwise OR between the read result and the value specified by\r
-  OrData, and writes the result to the 16-bit PCI configuration register\r
-  specified by Address. The value written to the PCI configuration register is\r
-  returned. This function must guarantee that all PCI read and write operations\r
-  are serialized.\r
+  bitwise OR between the read result and the value specified by OrData, and\r
+  writes the result to the 16-bit PCI configuration register specified by Address.\r
+  The value written to the PCI configuration register is returned. This function\r
+  must guarantee that all PCI read and write operations are serialized.\r

 \r
   If any reserved bits in Address are set, then ASSERT().\r
   If Address is not aligned on a 16-bit boundary, then ASSERT().\r
 \r
   If any reserved bits in Address are set, then ASSERT().\r
   If Address is not aligned on a 16-bit boundary, then ASSERT().\r


@@ -462,10 +460,10 @@ PciSegmentOr16 (
   and writes the result to the 16-bit PCI configuration register specified by Address.\r
   The value written to the PCI configuration register is returned.\r
   This function must guarantee that all PCI read and write operations are serialized.\r
   and writes the result to the 16-bit PCI configuration register specified by Address.\r
   The value written to the PCI configuration register is returned.\r
   This function must guarantee that all PCI read and write operations are serialized.\r

-  \r
+\r

   If any reserved bits in Address are set, then ASSERT().\r
   If Address is not aligned on a 16-bit boundary, then ASSERT().\r
   If any reserved bits in Address are set, then ASSERT().\r
   If Address is not aligned on a 16-bit boundary, then ASSERT().\r

-  \r
+\r

   @param  Address   Address that encodes the PCI Segment, Bus, Device, Function, and Register.\r
   @param  AndData   The value to AND with the PCI configuration register.\r
 \r
   @param  Address   Address that encodes the PCI Segment, Bus, Device, Function, and Register.\r
   @param  AndData   The value to AND with the PCI configuration register.\r
 \r


@@ -482,19 +480,19 @@ PciSegmentAnd16 (
 /**\r
   Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit value,\r
   followed a  bitwise OR with another 16-bit value.\r
 /**\r
   Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit value,\r
   followed a  bitwise OR with another 16-bit value.\r

-  \r
+\r

   Reads the 16-bit PCI configuration register specified by Address,\r
   performs a bitwise AND between the read result and the value specified by AndData,\r
   performs a bitwise OR between the result of the AND operation and the value specified by OrData,\r
   and writes the result to the 16-bit PCI configuration register specified by Address.\r
   The value written to the PCI configuration register is returned.\r
   This function must guarantee that all PCI read and write operations are serialized.\r
   Reads the 16-bit PCI configuration register specified by Address,\r
   performs a bitwise AND between the read result and the value specified by AndData,\r
   performs a bitwise OR between the result of the AND operation and the value specified by OrData,\r
   and writes the result to the 16-bit PCI configuration register specified by Address.\r
   The value written to the PCI configuration register is returned.\r
   This function must guarantee that all PCI read and write operations are serialized.\r

-  \r
+\r

   If any reserved bits in Address are set, then ASSERT().\r
   If Address is not aligned on a 16-bit boundary, then ASSERT().\r
 \r
   @param  Address   Address that encodes the PCI Segment, Bus, Device, Function, and Register.\r
   If any reserved bits in Address are set, then ASSERT().\r
   If Address is not aligned on a 16-bit boundary, then ASSERT().\r
 \r
   @param  Address   Address that encodes the PCI Segment, Bus, Device, Function, and Register.\r

-  @param  AndData    The value to AND with the PCI configuration register.\r
+  @param  AndData   The value to AND with the PCI configuration register.\r

   @param  OrData    The value to OR with the PCI configuration register.\r
 \r
   @return The value written to the PCI configuration register.\r
   @param  OrData    The value to OR with the PCI configuration register.\r
 \r
   @return The value written to the PCI configuration register.\r


@@ -573,9 +571,15 @@ PciSegmentBitFieldWrite16 (
   );\r
 \r
 /**\r
   );\r
 \r
 /**\r

-  Reads the 16-bit PCI configuration register specified by Address,\r
-  performs a bitwise OR between the read result and the value specified by OrData,\r
-  and writes the result to the 16-bit PCI configuration register specified by Address. \r
+  Reads a bit field in a 16-bit PCI configuration, performs a bitwise OR, writes\r
+  the result back to the bit field in the 16-bit port.\r
+\r
+  Reads the 16-bit PCI configuration register specified by Address, performs a\r
+  bitwise OR between the read result and the value specified by\r
+  OrData, and writes the result to the 16-bit PCI configuration register\r
+  specified by Address. The value written to the PCI configuration register is\r
+  returned. This function must guarantee that all PCI read and write operations\r
+  are serialized. Extra left bits in OrData are stripped.\r

 \r
   If any reserved bits in Address are set, then ASSERT().\r
   If Address is not aligned on a 16-bit boundary, then ASSERT().\r
 \r
   If any reserved bits in Address are set, then ASSERT().\r
   If Address is not aligned on a 16-bit boundary, then ASSERT().\r


@@ -604,31 +608,31 @@ PciSegmentBitFieldOr16 (
   );\r
 \r
 /**\r
   );\r
 \r
 /**\r

-  Reads a bit field in a 16-bit PCI configuration, performs a bitwise OR,\r
-  and writes the result back to the bit field in the 16-bit port.\r
+  Reads a bit field in a 16-bit PCI configuration register, performs a bitwise\r
+  AND, writes the result back to the bit field in the 16-bit register.\r
+\r
+  Reads the 16-bit PCI configuration register specified by Address, performs a\r
+  bitwise AND between the read result and the value specified by AndData, and\r
+  writes the result to the 16-bit PCI configuration register specified by\r
+  Address. The value written to the PCI configuration register is returned.\r
+  This function must guarantee that all PCI read and write operations are\r
+  serialized. Extra left bits in AndData are stripped.\r

 \r
 \r

-  Reads the 16-bit PCI configuration register specified by Address,\r
-  performs a bitwise OR between the read result and the value specified by OrData,\r
-  and writes the result to the 16-bit PCI configuration register specified by Address.\r
-  The value written to the PCI configuration register is returned.\r
-  This function must guarantee that all PCI read and write operations are serialized.\r
-  Extra left bits in OrData are stripped.\r
-  \r

   If any reserved bits in Address are set, then ASSERT().\r
   If Address is not aligned on a 16-bit boundary, then ASSERT().\r
   If any reserved bits in Address are set, then ASSERT().\r
   If Address is not aligned on a 16-bit boundary, then ASSERT().\r

-  If StartBit is greater than 7, then ASSERT().\r
-  If EndBit is greater than 7, then ASSERT().\r
+  If StartBit is greater than 15, then ASSERT().\r
+  If EndBit is greater than 15, then ASSERT().\r

   If EndBit is less than StartBit, then ASSERT().\r
   If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r
 \r
   @param  Address   Address that encodes the PCI Segment, Bus, Device, Function, and Register.\r
   @param  StartBit  The ordinal of the least significant bit in the bit field.\r
   If EndBit is less than StartBit, then ASSERT().\r
   If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r
 \r
   @param  Address   Address that encodes the PCI Segment, Bus, Device, Function, and Register.\r
   @param  StartBit  The ordinal of the least significant bit in the bit field.\r

-                    The ordinal of the least significant bit in a byte is bit 0.\r
+                    Range 0..15.\r

   @param  EndBit    The ordinal of the most significant bit in the bit field.\r
   @param  EndBit    The ordinal of the most significant bit in the bit field.\r

-                    The ordinal of the most significant bit in a byte is bit 7.\r
-  @param  AndData   The value to AND with the read value from the PCI configuration register.\r
+                    Range 0..15.\r
+  @param  AndData   The value to AND with the PCI configuration register.\r

 \r
 \r

-  @return The value written to the PCI configuration register.\r
+  @return The value written back to the PCI configuration register.\r

 \r
 **/\r
 UINT16\r
 \r
 **/\r
 UINT16\r


@@ -686,7 +690,7 @@ PciSegmentBitFieldAndThenOr16 (
 \r
   Reads and returns the 32-bit PCI configuration register specified by Address.\r
   This function must guarantee that all PCI read and write operations are serialized.\r
 \r
   Reads and returns the 32-bit PCI configuration register specified by Address.\r
   This function must guarantee that all PCI read and write operations are serialized.\r

-  \r
+\r

   If any reserved bits in Address are set, then ASSERT().\r
   If Address is not aligned on a 32-bit boundary, then ASSERT().\r
 \r
   If any reserved bits in Address are set, then ASSERT().\r
   If Address is not aligned on a 32-bit boundary, then ASSERT().\r
 \r


@@ -706,7 +710,7 @@ PciSegmentRead32 (
 \r
   Writes the 32-bit PCI configuration register specified by Address with the value specified by Value.\r
   Value is returned.  This function must guarantee that all PCI read and write operations are serialized.\r
 \r
   Writes the 32-bit PCI configuration register specified by Address with the value specified by Value.\r
   Value is returned.  This function must guarantee that all PCI read and write operations are serialized.\r

-  \r
+\r

   If any reserved bits in Address are set, then ASSERT().\r
   If Address is not aligned on a 32-bit boundary, then ASSERT().\r
 \r
   If any reserved bits in Address are set, then ASSERT().\r
   If Address is not aligned on a 32-bit boundary, then ASSERT().\r
 \r


@@ -731,7 +735,7 @@ PciSegmentWrite32 (
   and writes the result to the 32-bit PCI configuration register specified by Address.\r
   The value written to the PCI configuration register is returned.\r
   This function must guarantee that all PCI read and write operations are serialized.\r
   and writes the result to the 32-bit PCI configuration register specified by Address.\r
   The value written to the PCI configuration register is returned.\r
   This function must guarantee that all PCI read and write operations are serialized.\r

-  \r
+\r

   If any reserved bits in Address are set, then ASSERT().\r
   If Address is not aligned on a 32-bit boundary, then ASSERT().\r
 \r
   If any reserved bits in Address are set, then ASSERT().\r
   If Address is not aligned on a 32-bit boundary, then ASSERT().\r
 \r


@@ -756,7 +760,7 @@ PciSegmentOr32 (
   and writes the result to the 32-bit PCI configuration register specified by Address.\r
   The value written to the PCI configuration register is returned.\r
   This function must guarantee that all PCI read and write operations are serialized.\r
   and writes the result to the 32-bit PCI configuration register specified by Address.\r
   The value written to the PCI configuration register is returned.\r
   This function must guarantee that all PCI read and write operations are serialized.\r

-  \r
+\r

   If any reserved bits in Address are set, then ASSERT().\r
   If Address is not aligned on a 32-bit boundary, then ASSERT().\r
 \r
   If any reserved bits in Address are set, then ASSERT().\r
   If Address is not aligned on a 32-bit boundary, then ASSERT().\r
 \r


@@ -776,14 +780,14 @@ PciSegmentAnd32 (
 /**\r
   Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit value,\r
   followed a  bitwise OR with another 32-bit value.\r
 /**\r
   Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit value,\r
   followed a  bitwise OR with another 32-bit value.\r

-  \r
+\r

   Reads the 32-bit PCI configuration register specified by Address,\r
   performs a bitwise AND between the read result and the value specified by AndData,\r
   performs a bitwise OR between the result of the AND operation and the value specified by OrData,\r
   and writes the result to the 32-bit PCI configuration register specified by Address.\r
   The value written to the PCI configuration register is returned.\r
   This function must guarantee that all PCI read and write operations are serialized.\r
   Reads the 32-bit PCI configuration register specified by Address,\r
   performs a bitwise AND between the read result and the value specified by AndData,\r
   performs a bitwise OR between the result of the AND operation and the value specified by OrData,\r
   and writes the result to the 32-bit PCI configuration register specified by Address.\r
   The value written to the PCI configuration register is returned.\r
   This function must guarantee that all PCI read and write operations are serialized.\r

-  \r
+\r

   If any reserved bits in Address are set, then ASSERT().\r
   If Address is not aligned on a 32-bit boundary, then ASSERT().\r
 \r
   If any reserved bits in Address are set, then ASSERT().\r
   If Address is not aligned on a 32-bit boundary, then ASSERT().\r
 \r


@@ -906,7 +910,7 @@ PciSegmentBitFieldOr32 (
   Reads a bit field in a 32-bit PCI configuration register, performs a bitwise\r
   AND, and writes the result back to the bit field in the 32-bit register.\r
 \r
   Reads a bit field in a 32-bit PCI configuration register, performs a bitwise\r
   AND, and writes the result back to the bit field in the 32-bit register.\r
 \r

-  \r
+\r

   Reads the 32-bit PCI configuration register specified by Address, performs a bitwise\r
   AND between the read result and the value specified by AndData, and writes the result\r
   to the 32-bit PCI configuration register specified by Address. The value written to\r
   Reads the 32-bit PCI configuration register specified by Address, performs a bitwise\r
   AND between the read result and the value specified by AndData, and writes the result\r
   to the 32-bit PCI configuration register specified by Address. The value written to\r


@@ -919,7 +923,7 @@ PciSegmentBitFieldOr32 (
   If EndBit is less than StartBit, then ASSERT().\r
   If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r
 \r
   If EndBit is less than StartBit, then ASSERT().\r
   If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r
 \r

-  @param  Address   PCI configuration register to write.\r
+  @param  Address   Address that encodes the PCI Segment, Bus, Device, Function, and Register.\r

   @param  StartBit  The ordinal of the least significant bit in the bit field.\r
                     Range 0..31.\r
   @param  EndBit    The ordinal of the most significant bit in the bit field.\r
   @param  StartBit  The ordinal of the least significant bit in the bit field.\r
                     Range 0..31.\r
   @param  EndBit    The ordinal of the most significant bit in the bit field.\r