the legacy mode mask and the protected mode mask. The base address for the 8259\r
is different for legacy and protected mode, so two masks are required.\r
\r
- @param This Protocol instance pointer.\r
- @param MasterBase The base vector for the Master PIC in the 8259 controller\r
- @param Slavebase The base vector for the Master PIC in the 8259 controller\r
+ @param This Protocol instance pointer.\r
+ @param MasterBase The base vector for the Master PIC in the 8259 controller\r
+ @param Slavebase The base vector for the Master PIC in the 8259 controller\r
\r
- @retval EFI_SUCCESS The new bases were programmed\r
- @retval EFI_DEVICE_ERROR A device erro occured programming the vector bases\r
+ @retval EFI_SUCCESS The new bases were programmed\r
+ @retval EFI_DEVICE_ERROR A device erro occured programming the vector bases\r
\r
**/\r
typedef\r
the legacy mode mask and the protected mode mask. The base address for the 8259\r
is different for legacy and protected mode, so two masks are required.\r
\r
- @param This Protocol instance pointer.\r
- @param LegacyMask Bit 0 is Irq0 - Bit 15 is Irq15\r
- @param LegacyEdgeLevel Bit 0 is Irq0 - Bit 15 is Irq15\r
- @param ProtectedMask Bit 0 is Irq0 - Bit 15 is Irq15\r
- @param ProtectedEdgeLevel Bit 0 is Irq0 - Bit 15 is Irq15\r
+ @param This Protocol instance pointer.\r
+ @param LegacyMask Bit 0 is Irq0 - Bit 15 is Irq15\r
+ @param LegacyEdgeLevel Bit 0 is Irq0 - Bit 15 is Irq15\r
+ @param ProtectedMask Bit 0 is Irq0 - Bit 15 is Irq15\r
+ @param ProtectedEdgeLevel Bit 0 is Irq0 - Bit 15 is Irq15\r
\r
- @retval EFI_SUCCESS 8259 status returned\r
- @retval EFI_DEVICE_ERROR Error reading 8259\r
+ @retval EFI_SUCCESS 8259 status returned\r
+ @retval EFI_DEVICE_ERROR Error reading 8259\r
\r
**/\r
typedef\r
is different for legacy and protected mode, so two masks are required.\r
Also set the edge/level masks.\r
\r
- @param This Protocol instance pointer.\r
- @param LegacyMask Bit 0 is Irq0 - Bit 15 is Irq15\r
- @param LegacyEdgeLevel Bit 0 is Irq0 - Bit 15 is Irq15\r
- @param ProtectedMask Bit 0 is Irq0 - Bit 15 is Irq15\r
- @param ProtectedEdgeLevel Bit 0 is Irq0 - Bit 15 is Irq15\r
+ @param This Protocol instance pointer.\r
+ @param LegacyMask Bit 0 is Irq0 - Bit 15 is Irq15\r
+ @param LegacyEdgeLevel Bit 0 is Irq0 - Bit 15 is Irq15\r
+ @param ProtectedMask Bit 0 is Irq0 - Bit 15 is Irq15\r
+ @param ProtectedEdgeLevel Bit 0 is Irq0 - Bit 15 is Irq15\r
\r
- @retval EFI_SUCCESS 8259 status returned\r
- @retval EFI_DEVICE_ERROR Error reading 8259\r
+ @retval EFI_SUCCESS 8259 status returned\r
+ @retval EFI_DEVICE_ERROR Error reading 8259\r
\r
**/\r
typedef\r
mask for the new mode is Mask, or if Mask does not exist the previously saved\r
mask is used.\r
\r
- @param This Protocol instance pointer.\r
- @param Mode Mode of operation. i.e. real mode or protected mode\r
- @param Mask Optional interupt mask for the new mode.\r
- @param EdgeLevel Optional trigger mask for the new mode.\r
+ @param This Protocol instance pointer.\r
+ @param Mode Mode of operation. i.e. real mode or protected mode\r
+ @param Mask Optional interupt mask for the new mode.\r
+ @param EdgeLevel Optional trigger mask for the new mode.\r
\r
- @retval EFI_SUCCESS 8259 programmed\r
- @retval EFI_DEVICE_ERROR Error writting to 8259\r
+ @retval EFI_SUCCESS 8259 programmed\r
+ @retval EFI_DEVICE_ERROR Error writting to 8259\r
\r
**/\r
typedef\r
/**\r
Convert from IRQ to processor interrupt vector number.\r
\r
- @param This Protocol instance pointer.\r
- @param Irq 8259 IRQ0 - IRQ15\r
- @param Vector Processor vector number that matches Irq\r
+ @param This Protocol instance pointer.\r
+ @param Irq 8259 IRQ0 - IRQ15\r
+ @param Vector Processor vector number that matches Irq\r
\r
- @retval EFI_SUCCESS The Vector matching Irq is returned\r
- @retval EFI_INVALID_PARAMETER Irq not valid\r
+ @retval EFI_SUCCESS The Vector matching Irq is returned\r
+ @retval EFI_INVALID_PARAMETER Irq not valid\r
\r
**/\r
typedef\r
/**\r
Enable Irq by unmasking interrupt in 8259\r
\r
- @param This Protocol instance pointer.\r
- @param Irq 8259 IRQ0 - IRQ15\r
- @param LevelTriggered TRUE if level triggered. FALSE if edge triggered.\r
+ @param This Protocol instance pointer.\r
+ @param Irq 8259 IRQ0 - IRQ15\r
+ @param LevelTriggered TRUE if level triggered. FALSE if edge triggered.\r
\r
- @retval EFI_SUCCESS Irq enabled on 8259\r
- @retval EFI_INVALID_PARAMETER Irq not valid\r
+ @retval EFI_SUCCESS Irq enabled on 8259\r
+ @retval EFI_INVALID_PARAMETER Irq not valid\r
\r
**/\r
typedef\r
/**\r
Disable Irq by masking interrupt in 8259\r
\r
- @param This Protocol instance pointer.\r
- @param Irq 8259 IRQ0 - IRQ15\r
+ @param This Protocol instance pointer.\r
+ @param Irq 8259 IRQ0 - IRQ15\r
\r
- @retval EFI_SUCCESS Irq disabled on 8259\r
- @retval EFI_INVALID_PARAMETER Irq not valid\r
+ @retval EFI_SUCCESS Irq disabled on 8259\r
+ @retval EFI_INVALID_PARAMETER Irq not valid\r
\r
**/\r
typedef\r
that is programmed into the Interrupt Line (from the PCI config space)\r
register.\r
\r
- @param This Protocol instance pointer.\r
- @param PciHandle PCI function to return vector for\r
- @param Vector Vector for fucntion that matches\r
+ @param This Protocol instance pointer.\r
+ @param PciHandle PCI function to return vector for\r
+ @param Vector Vector for fucntion that matches\r
\r
- @retval EFI_SUCCESS A valid Vector is returned\r
- @retval EFI_INVALID_PARAMETER PciHandle not valid\r
+ @retval EFI_SUCCESS A valid Vector is returned\r
+ @retval EFI_INVALID_PARAMETER PciHandle not valid\r
\r
**/\r
typedef\r
/**\r
Send an EOI to 8259\r
\r
- @param This Protocol instance pointer.\r
- @param Irq 8259 IRQ0 - IRQ15\r
+ @param This Protocol instance pointer.\r
+ @param Irq 8259 IRQ0 - IRQ15\r
\r
- @retval EFI_SUCCESS EOI successfully sent to 8259\r
- @retval EFI_INVALID_PARAMETER Irq not valid\r
+ @retval EFI_SUCCESS EOI successfully sent to 8259\r
+ @retval EFI_INVALID_PARAMETER Irq not valid\r
\r
**/\r
typedef\r