/** @file\r
GCC inline implementation of BaseLib processor specific functions.\r
\r
- Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>\r
+ Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>\r
Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
IN VOID *LinearAddress\r
)\r
{\r
+ UINT32 RegEdx;\r
+\r
+ //\r
+ // If the CPU does not support CLFLUSH instruction, \r
+ // then promote flush range to flush entire cache.\r
+ //\r
+ AsmCpuid (0x01, NULL, NULL, NULL, &RegEdx);\r
+ if ((RegEdx & BIT19) == 0) {\r
+ __asm__ __volatile__ ("wbinvd":::"memory");\r
+ return LinearAddress;\r
+ }\r
+\r
+\r
__asm__ __volatile__ (\r
"clflush (%0)"\r
: "+a" (LinearAddress) \r
: "memory"\r
);\r
\r
- return LinearAddress;\r
+ return LinearAddress;\r
}\r
\r
\r