\r
**/\r
\r
-\r
#include "BaseLibInternals.h"\r
#include <Library/RegisterFilterLib.h>\r
\r
__asm__ __volatile__ ("sti"::: "memory");\r
}\r
\r
-\r
/**\r
Disables CPU interrupts.\r
\r
UINT64\r
EFIAPI\r
AsmReadMsr64 (\r
- IN UINT32 Index\r
+ IN UINT32 Index\r
)\r
{\r
- UINT64 Data;\r
- BOOLEAN Flag;\r
+ UINT64 Data;\r
+ BOOLEAN Flag;\r
\r
Flag = FilterBeforeMsrRead (Index, &Data);\r
if (Flag) {\r
"rdmsr"\r
: "=A" (Data) // %0\r
: "c" (Index) // %1\r
- );\r
+ );\r
}\r
+\r
FilterAfterMsrRead (Index, &Data);\r
\r
return Data;\r
UINT64\r
EFIAPI\r
AsmWriteMsr64 (\r
- IN UINT32 Index,\r
- IN UINT64 Value\r
+ IN UINT32 Index,\r
+ IN UINT64 Value\r
)\r
{\r
BOOLEAN Flag;\r
:\r
: "c" (Index),\r
"A" (Value)\r
- );\r
+ );\r
}\r
+\r
FilterAfterMsrWrite (Index, &Value);\r
\r
return Value;\r
VOID\r
)\r
{\r
- UINTN Data;\r
+ UINTN Data;\r
\r
__asm__ __volatile__ (\r
"movl %%cr0,%0"\r
: "=a" (Data)\r
- );\r
+ );\r
\r
return Data;\r
}\r
\r
-\r
/**\r
Reads the current value of the Control Register 2 (CR2).\r
\r
VOID\r
)\r
{\r
- UINTN Data;\r
+ UINTN Data;\r
\r
__asm__ __volatile__ (\r
"movl %%cr2, %0"\r
: "=r" (Data)\r
- );\r
+ );\r
\r
return Data;\r
}\r
VOID\r
)\r
{\r
- UINTN Data;\r
+ UINTN Data;\r
\r
__asm__ __volatile__ (\r
"movl %%cr3, %0"\r
: "=r" (Data)\r
- );\r
+ );\r
\r
return Data;\r
}\r
\r
-\r
/**\r
Reads the current value of the Control Register 4 (CR4).\r
\r
VOID\r
)\r
{\r
- UINTN Data;\r
+ UINTN Data;\r
\r
__asm__ __volatile__ (\r
"movl %%cr4, %0"\r
: "=a" (Data)\r
- );\r
+ );\r
\r
return Data;\r
}\r
\r
-\r
/**\r
Writes a value to Control Register 0 (CR0).\r
\r
"movl %0, %%cr0"\r
:\r
: "r" (Cr0)\r
- );\r
+ );\r
return Cr0;\r
}\r
\r
-\r
/**\r
Writes a value to Control Register 2 (CR2).\r
\r
"movl %0, %%cr2"\r
:\r
: "r" (Cr2)\r
- );\r
+ );\r
return Cr2;\r
}\r
\r
-\r
/**\r
Writes a value to Control Register 3 (CR3).\r
\r
"movl %0, %%cr3"\r
:\r
: "r" (Cr3)\r
- );\r
+ );\r
return Cr3;\r
}\r
\r
-\r
/**\r
Writes a value to Control Register 4 (CR4).\r
\r
"movl %0, %%cr4"\r
:\r
: "r" (Cr4)\r
- );\r
+ );\r
return Cr4;\r
}\r
\r
-\r
/**\r
Reads the current value of Debug Register 0 (DR0).\r
\r
VOID\r
)\r
{\r
- UINTN Data;\r
+ UINTN Data;\r
\r
__asm__ __volatile__ (\r
"movl %%dr0, %0"\r
: "=r" (Data)\r
- );\r
+ );\r
\r
return Data;\r
}\r
\r
-\r
/**\r
Reads the current value of Debug Register 1 (DR1).\r
\r
VOID\r
)\r
{\r
- UINTN Data;\r
+ UINTN Data;\r
\r
__asm__ __volatile__ (\r
"movl %%dr1, %0"\r
: "=r" (Data)\r
- );\r
+ );\r
\r
return Data;\r
}\r
\r
-\r
/**\r
Reads the current value of Debug Register 2 (DR2).\r
\r
VOID\r
)\r
{\r
- UINTN Data;\r
+ UINTN Data;\r
\r
__asm__ __volatile__ (\r
"movl %%dr2, %0"\r
: "=r" (Data)\r
- );\r
+ );\r
\r
return Data;\r
}\r
\r
-\r
/**\r
Reads the current value of Debug Register 3 (DR3).\r
\r
VOID\r
)\r
{\r
- UINTN Data;\r
+ UINTN Data;\r
\r
__asm__ __volatile__ (\r
"movl %%dr3, %0"\r
: "=r" (Data)\r
- );\r
+ );\r
\r
return Data;\r
}\r
\r
-\r
/**\r
Reads the current value of Debug Register 4 (DR4).\r
\r
VOID\r
)\r
{\r
- UINTN Data;\r
+ UINTN Data;\r
\r
__asm__ __volatile__ (\r
"movl %%dr4, %0"\r
: "=r" (Data)\r
- );\r
+ );\r
\r
return Data;\r
}\r
\r
-\r
/**\r
Reads the current value of Debug Register 5 (DR5).\r
\r
VOID\r
)\r
{\r
- UINTN Data;\r
+ UINTN Data;\r
\r
__asm__ __volatile__ (\r
"movl %%dr5, %0"\r
: "=r" (Data)\r
- );\r
+ );\r
\r
return Data;\r
}\r
\r
-\r
/**\r
Reads the current value of Debug Register 6 (DR6).\r
\r
VOID\r
)\r
{\r
- UINTN Data;\r
+ UINTN Data;\r
\r
__asm__ __volatile__ (\r
"movl %%dr6, %0"\r
: "=r" (Data)\r
- );\r
+ );\r
\r
return Data;\r
}\r
\r
-\r
/**\r
Reads the current value of Debug Register 7 (DR7).\r
\r
VOID\r
)\r
{\r
- UINTN Data;\r
+ UINTN Data;\r
\r
__asm__ __volatile__ (\r
"movl %%dr7, %0"\r
: "=r" (Data)\r
- );\r
+ );\r
\r
return Data;\r
}\r
\r
-\r
/**\r
Writes a value to Debug Register 0 (DR0).\r
\r
"movl %0, %%dr0"\r
:\r
: "r" (Dr0)\r
- );\r
+ );\r
return Dr0;\r
}\r
\r
-\r
/**\r
Writes a value to Debug Register 1 (DR1).\r
\r
"movl %0, %%dr1"\r
:\r
: "r" (Dr1)\r
- );\r
+ );\r
return Dr1;\r
}\r
\r
-\r
/**\r
Writes a value to Debug Register 2 (DR2).\r
\r
"movl %0, %%dr2"\r
:\r
: "r" (Dr2)\r
- );\r
+ );\r
return Dr2;\r
}\r
\r
-\r
/**\r
Writes a value to Debug Register 3 (DR3).\r
\r
"movl %0, %%dr3"\r
:\r
: "r" (Dr3)\r
- );\r
+ );\r
return Dr3;\r
}\r
\r
-\r
/**\r
Writes a value to Debug Register 4 (DR4).\r
\r
"movl %0, %%dr4"\r
:\r
: "r" (Dr4)\r
- );\r
+ );\r
return Dr4;\r
}\r
\r
-\r
/**\r
Writes a value to Debug Register 5 (DR5).\r
\r
"movl %0, %%dr5"\r
:\r
: "r" (Dr5)\r
- );\r
+ );\r
return Dr5;\r
}\r
\r
-\r
/**\r
Writes a value to Debug Register 6 (DR6).\r
\r
"movl %0, %%dr6"\r
:\r
: "r" (Dr6)\r
- );\r
+ );\r
return Dr6;\r
}\r
\r
-\r
/**\r
Writes a value to Debug Register 7 (DR7).\r
\r
"movl %0, %%dr7"\r
:\r
: "r" (Dr7)\r
- );\r
+ );\r
return Dr7;\r
}\r
\r
-\r
/**\r
Reads the current value of Code Segment Register (CS).\r
\r
__asm__ __volatile__ (\r
"mov %%cs, %0"\r
:"=a" (Data)\r
- );\r
+ );\r
\r
return Data;\r
}\r
\r
-\r
/**\r
Reads the current value of Data Segment Register (DS).\r
\r
__asm__ __volatile__ (\r
"mov %%ds, %0"\r
:"=a" (Data)\r
- );\r
+ );\r
\r
return Data;\r
}\r
\r
-\r
/**\r
Reads the current value of Extra Segment Register (ES).\r
\r
__asm__ __volatile__ (\r
"mov %%es, %0"\r
:"=a" (Data)\r
- );\r
+ );\r
\r
return Data;\r
}\r
\r
-\r
/**\r
Reads the current value of FS Data Segment Register (FS).\r
\r
__asm__ __volatile__ (\r
"mov %%fs, %0"\r
:"=a" (Data)\r
- );\r
+ );\r
\r
return Data;\r
}\r
\r
-\r
/**\r
Reads the current value of GS Data Segment Register (GS).\r
\r
__asm__ __volatile__ (\r
"mov %%gs, %0"\r
:"=a" (Data)\r
- );\r
+ );\r
\r
return Data;\r
}\r
\r
-\r
/**\r
Reads the current value of Stack Segment Register (SS).\r
\r
__asm__ __volatile__ (\r
"mov %%ss, %0"\r
:"=a" (Data)\r
- );\r
+ );\r
\r
return Data;\r
}\r
\r
-\r
/**\r
Reads the current value of Task Register (TR).\r
\r
__asm__ __volatile__ (\r
"str %0"\r
: "=a" (Data)\r
- );\r
+ );\r
\r
return Data;\r
}\r
\r
-\r
/**\r
Reads the current Global Descriptor Table Register(GDTR) descriptor.\r
\r
VOID\r
EFIAPI\r
InternalX86ReadGdtr (\r
- OUT IA32_DESCRIPTOR *Gdtr\r
+ OUT IA32_DESCRIPTOR *Gdtr\r
)\r
{\r
__asm__ __volatile__ (\r
"sgdt %0"\r
: "=m" (*Gdtr)\r
- );\r
+ );\r
}\r
\r
-\r
/**\r
Writes the current Global Descriptor Table Register (GDTR) descriptor.\r
\r
VOID\r
EFIAPI\r
InternalX86WriteGdtr (\r
- IN CONST IA32_DESCRIPTOR *Gdtr\r
+ IN CONST IA32_DESCRIPTOR *Gdtr\r
)\r
{\r
__asm__ __volatile__ (\r
"lgdt %0"\r
:\r
: "m" (*Gdtr)\r
- );\r
-\r
+ );\r
}\r
\r
-\r
/**\r
Reads the current Interrupt Descriptor Table Register(GDTR) descriptor.\r
\r
VOID\r
EFIAPI\r
InternalX86ReadIdtr (\r
- OUT IA32_DESCRIPTOR *Idtr\r
+ OUT IA32_DESCRIPTOR *Idtr\r
)\r
{\r
__asm__ __volatile__ (\r
"sidt %0"\r
: "=m" (*Idtr)\r
- );\r
+ );\r
}\r
\r
-\r
/**\r
Writes the current Interrupt Descriptor Table Register(GDTR) descriptor.\r
\r
VOID\r
EFIAPI\r
InternalX86WriteIdtr (\r
- IN CONST IA32_DESCRIPTOR *Idtr\r
+ IN CONST IA32_DESCRIPTOR *Idtr\r
)\r
{\r
__asm__ __volatile__ (\r
"lidt %0"\r
:\r
: "m" (*Idtr)\r
- );\r
+ );\r
}\r
\r
-\r
/**\r
Reads the current Local Descriptor Table Register(LDTR) selector.\r
\r
__asm__ __volatile__ (\r
"sldt %0"\r
: "=g" (Data) // %0\r
- );\r
+ );\r
\r
return Data;\r
}\r
\r
-\r
/**\r
Writes the current Local Descriptor Table Register (GDTR) selector.\r
\r
VOID\r
EFIAPI\r
AsmWriteLdtr (\r
- IN UINT16 Ldtr\r
+ IN UINT16 Ldtr\r
)\r
{\r
__asm__ __volatile__ (\r
"lldtw %0"\r
:\r
: "g" (Ldtr) // %0\r
- );\r
+ );\r
}\r
\r
/**\r
UINT64\r
EFIAPI\r
AsmReadPmc (\r
- IN UINT32 Index\r
+ IN UINT32 Index\r
)\r
{\r
UINT64 Data;\r
"rdpmc"\r
: "=A" (Data)\r
: "c" (Index)\r
- );\r
+ );\r
\r
return Data;\r
}\r
)\r
{\r
__asm__ __volatile__ ("invd":::"memory");\r
-\r
}\r
\r
-\r
/**\r
Flushes a cache line from all the instruction and data caches within the\r
coherency domain of the CPU.\r
VOID *\r
EFIAPI\r
AsmFlushCacheLine (\r
- IN VOID *LinearAddress\r
+ IN VOID *LinearAddress\r
)\r
{\r
UINT32 RegEdx;\r
return LinearAddress;\r
}\r
\r
-\r
__asm__ __volatile__ (\r
"clflush (%0)"\r
: "+a" (LinearAddress)\r
:\r
: "memory"\r
- );\r
+ );\r
\r
return LinearAddress;\r
}\r