MdePkg: Clean up source files

[mirror_edk2.git] / MdePkg / Library / BaseLib / X64 / Thunk16.S

diff --git a/MdePkg/Library/BaseLib/X64/Thunk16.S b/MdePkg/Library/BaseLib/X64/Thunk16.S
index f592a2868c261dc4bdc90dc1b1ebcc6d6864bfc7..fd03b97b567e0cc75dea165dd2927239993b93b4 100644 (file)
--- a/MdePkg/Library/BaseLib/X64/Thunk16.S
+++ b/MdePkg/Library/BaseLib/X64/Thunk16.S
@@ -1,6 +1,6 @@
 #------------------------------------------------------------------------------\r
 #\r
-# Copyright (c) 2006 - 2013, Intel Corporation. All rights reserved.<BR>\r
+# Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>\r
 # This program and the accompanying materials\r
 # are licensed and made available under the terms and conditions of the BSD License\r
 # which accompanies this distribution.  The full text of the license may be found at\r
@@ -49,7 +49,7 @@ ASM_GLOBAL ASM_PFX(InternalAsmThunk16)
 .set  IA32_REGS_SIZE, 56\r
 \r
     .data\r
-    \r
+\r
 .set Lm16Size, ASM_PFX(InternalAsmThunk16) - ASM_PFX(m16Start)\r
 ASM_PFX(m16Size):         .word      Lm16Size\r
 .set  LmThunk16Attr, L_ThunkAttr - ASM_PFX(m16Start)\r
@@ -85,7 +85,7 @@ ASM_PFX(BackFromUserCode):
     .byte 0xe                           # push cs\r
     .byte 0x66\r
     call    L_Base                       # push eip\r
-L_Base: \r
+L_Base:\r
     .byte 0x66\r
     pushq   $0                          # reserved high order 32 bits of EFlags\r
     .byte 0x66, 0x9c                    # pushfd actually\r
@@ -102,13 +102,13 @@ L_ThunkAttr:  .space  4
     movl    $0x15cd2401,%eax            # mov ax, 2401h & int 15h\r
     cli                                 # disable interrupts\r
     jnc     L_2\r
-L_1: \r
+L_1:\r
     testb   $THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL, %dl\r
     jz      L_2\r
     inb     $0x92,%al\r
     orb     $2,%al\r
     outb    %al, $0x92                   # deactivate A20M#\r
-L_2: \r
+L_2:\r
     xorw    %ax, %ax                     # xor eax, eax\r
     movl    %ss, %eax                    # mov ax, ss\r
     lea     IA32_REGS_SIZE(%esp), %bp\r
@@ -180,13 +180,13 @@ ASM_PFX(ToUserCode):
     movw    %bx,%sp                     # set up 16-bit stack pointer\r
     .byte 0x66                          # make the following call 32-bit\r
     call    L_Base1                       # push eip\r
-L_Base1: \r
+L_Base1:\r
     popw    %bp                         # ebp <- address of L_Base1\r
     pushq   (IA32_REGS_SIZE + 2)(%esp)\r
     lea     0x0c(%rsi), %eax\r
     pushq   %rax\r
     lret                                # execution begins at next instruction\r
-L_RealMode: \r
+L_RealMode:\r
     .byte 0x66,0x2e                     # CS and operand size override\r
     lidt    (_16Idtr - L_Base1)(%rsi)\r
     .byte 0x66,0x61                     # popad\r
@@ -243,7 +243,7 @@ ASM_PFX(InternalAsmThunk16):
     pushq   %rbx\r
     pushq   %rsi\r
     pushq   %rdi\r
-    \r
+\r
     movl    %ds, %ebx\r
     pushq   %rbx      # Save ds segment register on the stack\r
     movl    %es, %ebx\r
@@ -257,7 +257,7 @@ ASM_PFX(InternalAsmThunk16):
     movzwl  _SS(%rsi), %r8d\r
     movl    _ESP(%rsi), %edi\r
     lea     -(IA32_REGS_SIZE + 4)(%edi), %rdi\r
-    imul    $16, %r8d, %eax \r
+    imul    $16, %r8d, %eax\r
     movl    %edi,%ebx                   # ebx <- stack for 16-bit code\r
     pushq   $(IA32_REGS_SIZE / 4)\r
     addl    %eax,%edi                   # edi <- linear address of 16-bit stack\r
@@ -268,26 +268,26 @@ ASM_PFX(InternalAsmThunk16):
     movl    %edx,%eax                   # eax <- transition code address\r
     andl    $0xf,%edx\r
     shll    $12,%eax                    # segment address in high order 16 bits\r
-    .set LBackFromUserCodeDelta, ASM_PFX(BackFromUserCode) - ASM_PFX(m16Start) \r
+    .set LBackFromUserCodeDelta, ASM_PFX(BackFromUserCode) - ASM_PFX(m16Start)\r
     lea     (LBackFromUserCodeDelta)(%rdx), %ax\r
     stosl                               # [edi] <- return address of user code\r
     sgdt    0x60(%rsp)                  # save GDT stack in argument space\r
-    movzwq  0x60(%rsp), %r10            # r10 <- GDT limit \r
-    lea     ((ASM_PFX(InternalAsmThunk16) - L_SavedCr4) + 0xf)(%rcx), %r11 \r
-    andq    $0xfffffffffffffff0, %r11   # r11 <- 16-byte aligned shadowed GDT table in real mode buffer      \r
-    \r
+    movzwq  0x60(%rsp), %r10            # r10 <- GDT limit\r
+    lea     ((ASM_PFX(InternalAsmThunk16) - L_SavedCr4) + 0xf)(%rcx), %r11\r
+    andq    $0xfffffffffffffff0, %r11   # r11 <- 16-byte aligned shadowed GDT table in real mode buffer\r
+\r
     movw    %r10w, (SavedGdt - L_SavedCr4)(%rcx)       # save the limit of shadowed GDT table\r
     movq    %r11, (SavedGdt - L_SavedCr4 + 0x2)(%rcx)  # save the base address of shadowed GDT table\r
-    \r
+\r
     movq    0x62(%rsp) ,%rsi            # rsi <- the original GDT base address\r
-    xchg   %r10, %rcx                   # save rcx to r10 and initialize rcx to be the limit of GDT table \r
+    xchg   %r10, %rcx                   # save rcx to r10 and initialize rcx to be the limit of GDT table\r
     incq   %rcx                         # rcx <- the size of memory to copy\r
     xchg   %r11, %rdi                   # save rdi to r11 and initialize rdi to the base address of shadowed GDT table\r
     rep\r
     movsb                               # perform memory copy to shadow GDT table\r
     movq   %r10, %rcx                   # restore the orignal rcx before memory copy\r
     movq   %r11, %rdi                   # restore the original rdi before memory copy\r
-       \r
+\r
     sidt    0x50(%rsp)\r
     movq    %cr0, %rax\r
     .set LSavedCrDelta, L_SavedCr0 - L_SavedCr4\r
@@ -311,21 +311,21 @@ ASM_PFX(InternalAsmThunk16):
     .byte   0xff, 0x69                  #  jmp (_EntryPoint - L_SavedCr4)(%rcx)\r
     .set    Ltemp1, _EntryPoint - L_SavedCr4\r
     .byte   Ltemp1\r
-L_RetFromRealMode: \r
+L_RetFromRealMode:\r
     popfq\r
     lgdt    0x60(%rsp)                  # restore protected mode GDTR\r
     lidt    0x50(%rsp)                  # restore protected mode IDTR\r
     lea     -IA32_REGS_SIZE(%rbp), %eax\r
     .byte 0x0f, 0xa9                    # pop gs\r
     .byte 0x0f, 0xa1                    # pop fs\r
-    \r
+\r
     popq     %rbx\r
     movl     %ebx, %ss\r
     popq     %rbx\r
     movl     %ebx, %es\r
     popq     %rbx\r
     movl     %ebx, %ds\r
-    \r
+\r
     popq    %rdi\r
     popq    %rsi\r
     popq    %rbx\r