/** @file\r
Implementation of synchronization functions.\r
\r
- Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.<BR>\r
+ Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>\r
Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
#include "BaseSynchronizationLibInternals.h"\r
\r
//\r
-// GCC inline assembly for Read Write Barrier \r
+// GCC inline assembly for Read Write Barrier\r
//\r
#define _ReadWriteBarrier() do { __asm__ __volatile__ ("": : : "memory"); } while(0)\r
\r
optimal spin lock performance.\r
\r
This function retrieves the spin lock alignment requirements for optimal\r
- performance on a given CPU architecture. The spin lock alignment is byte alignment. \r
+ performance on a given CPU architecture. The spin lock alignment is byte alignment.\r
It must be a power of two and is returned by this function. If there are no alignment\r
requirements, then 1 must be returned. The spin lock synchronization\r
functions must function correctly if the spin lock size and alignment values\r
{\r
SPIN_LOCK LockValue;\r
VOID *Result;\r
- \r
+\r
ASSERT (SpinLock != NULL);\r
\r
LockValue = *SpinLock;\r