@param M Additional bits to assert to be zero.\r
\r
**/\r
-#define ASSERT_INVALID_PCI_ADDRESS(A,M) \\r
+#define ASSERT_INVALID_PCI_ADDRESS(A, M) \\r
ASSERT (((A) & (~0xfffffff | (M))) == 0)\r
\r
/**\r
//\r
// Global varible to cache pointer to PCI Root Bridge I/O protocol.\r
//\r
-EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *mPciRootBridgeIo = NULL;\r
+EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *mPciRootBridgeIo = NULL;\r
\r
/**\r
The constructor function caches the pointer to PCI Root Bridge I/O protocol.\r
EFI_STATUS\r
EFIAPI\r
PciLibConstructor (\r
- IN EFI_HANDLE ImageHandle,\r
- IN EFI_SYSTEM_TABLE *SystemTable\r
+ IN EFI_HANDLE ImageHandle,\r
+ IN EFI_SYSTEM_TABLE *SystemTable\r
)\r
{\r
EFI_STATUS Status;\r
\r
- Status = gBS->LocateProtocol (&gEfiPciRootBridgeIoProtocolGuid, NULL, (VOID**) &mPciRootBridgeIo);\r
+ Status = gBS->LocateProtocol (&gEfiPciRootBridgeIoProtocolGuid, NULL, (VOID **)&mPciRootBridgeIo);\r
ASSERT_EFI_ERROR (Status);\r
ASSERT (mPciRootBridgeIo != NULL);\r
\r
UINT8\r
EFIAPI\r
PciRead8 (\r
- IN UINTN Address\r
+ IN UINTN Address\r
)\r
{\r
ASSERT_INVALID_PCI_ADDRESS (Address, 0);\r
\r
- return (UINT8) DxePciLibPciRootBridgeIoReadWorker (Address, EfiPciWidthUint8);\r
+ return (UINT8)DxePciLibPciRootBridgeIoReadWorker (Address, EfiPciWidthUint8);\r
}\r
\r
/**\r
UINT8\r
EFIAPI\r
PciWrite8 (\r
- IN UINTN Address,\r
- IN UINT8 Value\r
+ IN UINTN Address,\r
+ IN UINT8 Value\r
)\r
{\r
ASSERT_INVALID_PCI_ADDRESS (Address, 0);\r
\r
- return (UINT8) DxePciLibPciRootBridgeIoWriteWorker (Address, EfiPciWidthUint8, Value);\r
+ return (UINT8)DxePciLibPciRootBridgeIoWriteWorker (Address, EfiPciWidthUint8, Value);\r
}\r
\r
/**\r
UINT8\r
EFIAPI\r
PciOr8 (\r
- IN UINTN Address,\r
- IN UINT8 OrData\r
+ IN UINTN Address,\r
+ IN UINT8 OrData\r
)\r
{\r
- return PciWrite8 (Address, (UINT8) (PciRead8 (Address) | OrData));\r
+ return PciWrite8 (Address, (UINT8)(PciRead8 (Address) | OrData));\r
}\r
\r
/**\r
UINT8\r
EFIAPI\r
PciAnd8 (\r
- IN UINTN Address,\r
- IN UINT8 AndData\r
+ IN UINTN Address,\r
+ IN UINT8 AndData\r
)\r
{\r
- return PciWrite8 (Address, (UINT8) (PciRead8 (Address) & AndData));\r
+ return PciWrite8 (Address, (UINT8)(PciRead8 (Address) & AndData));\r
}\r
\r
/**\r
UINT8\r
EFIAPI\r
PciAndThenOr8 (\r
- IN UINTN Address,\r
- IN UINT8 AndData,\r
- IN UINT8 OrData\r
+ IN UINTN Address,\r
+ IN UINT8 AndData,\r
+ IN UINT8 OrData\r
)\r
{\r
- return PciWrite8 (Address, (UINT8) ((PciRead8 (Address) & AndData) | OrData));\r
+ return PciWrite8 (Address, (UINT8)((PciRead8 (Address) & AndData) | OrData));\r
}\r
\r
/**\r
UINT8\r
EFIAPI\r
PciBitFieldRead8 (\r
- IN UINTN Address,\r
- IN UINTN StartBit,\r
- IN UINTN EndBit\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit\r
)\r
{\r
return BitFieldRead8 (PciRead8 (Address), StartBit, EndBit);\r
UINT8\r
EFIAPI\r
PciBitFieldWrite8 (\r
- IN UINTN Address,\r
- IN UINTN StartBit,\r
- IN UINTN EndBit,\r
- IN UINT8 Value\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT8 Value\r
)\r
{\r
return PciWrite8 (\r
UINT8\r
EFIAPI\r
PciBitFieldOr8 (\r
- IN UINTN Address,\r
- IN UINTN StartBit,\r
- IN UINTN EndBit,\r
- IN UINT8 OrData\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT8 OrData\r
)\r
{\r
return PciWrite8 (\r
UINT8\r
EFIAPI\r
PciBitFieldAnd8 (\r
- IN UINTN Address,\r
- IN UINTN StartBit,\r
- IN UINTN EndBit,\r
- IN UINT8 AndData\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT8 AndData\r
)\r
{\r
return PciWrite8 (\r
UINT8\r
EFIAPI\r
PciBitFieldAndThenOr8 (\r
- IN UINTN Address,\r
- IN UINTN StartBit,\r
- IN UINTN EndBit,\r
- IN UINT8 AndData,\r
- IN UINT8 OrData\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT8 AndData,\r
+ IN UINT8 OrData\r
)\r
{\r
return PciWrite8 (\r
UINT16\r
EFIAPI\r
PciRead16 (\r
- IN UINTN Address\r
+ IN UINTN Address\r
)\r
{\r
ASSERT_INVALID_PCI_ADDRESS (Address, 1);\r
\r
- return (UINT16) DxePciLibPciRootBridgeIoReadWorker (Address, EfiPciWidthUint16);\r
+ return (UINT16)DxePciLibPciRootBridgeIoReadWorker (Address, EfiPciWidthUint16);\r
}\r
\r
/**\r
UINT16\r
EFIAPI\r
PciWrite16 (\r
- IN UINTN Address,\r
- IN UINT16 Value\r
+ IN UINTN Address,\r
+ IN UINT16 Value\r
)\r
{\r
ASSERT_INVALID_PCI_ADDRESS (Address, 1);\r
\r
- return (UINT16) DxePciLibPciRootBridgeIoWriteWorker (Address, EfiPciWidthUint16, Value);\r
+ return (UINT16)DxePciLibPciRootBridgeIoWriteWorker (Address, EfiPciWidthUint16, Value);\r
}\r
\r
/**\r
UINT16\r
EFIAPI\r
PciOr16 (\r
- IN UINTN Address,\r
- IN UINT16 OrData\r
+ IN UINTN Address,\r
+ IN UINT16 OrData\r
)\r
{\r
- return PciWrite16 (Address, (UINT16) (PciRead16 (Address) | OrData));\r
+ return PciWrite16 (Address, (UINT16)(PciRead16 (Address) | OrData));\r
}\r
\r
/**\r
UINT16\r
EFIAPI\r
PciAnd16 (\r
- IN UINTN Address,\r
- IN UINT16 AndData\r
+ IN UINTN Address,\r
+ IN UINT16 AndData\r
)\r
{\r
- return PciWrite16 (Address, (UINT16) (PciRead16 (Address) & AndData));\r
+ return PciWrite16 (Address, (UINT16)(PciRead16 (Address) & AndData));\r
}\r
\r
/**\r
UINT16\r
EFIAPI\r
PciAndThenOr16 (\r
- IN UINTN Address,\r
- IN UINT16 AndData,\r
- IN UINT16 OrData\r
+ IN UINTN Address,\r
+ IN UINT16 AndData,\r
+ IN UINT16 OrData\r
)\r
{\r
- return PciWrite16 (Address, (UINT16) ((PciRead16 (Address) & AndData) | OrData));\r
+ return PciWrite16 (Address, (UINT16)((PciRead16 (Address) & AndData) | OrData));\r
}\r
\r
/**\r
UINT16\r
EFIAPI\r
PciBitFieldRead16 (\r
- IN UINTN Address,\r
- IN UINTN StartBit,\r
- IN UINTN EndBit\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit\r
)\r
{\r
return BitFieldRead16 (PciRead16 (Address), StartBit, EndBit);\r
UINT16\r
EFIAPI\r
PciBitFieldWrite16 (\r
- IN UINTN Address,\r
- IN UINTN StartBit,\r
- IN UINTN EndBit,\r
- IN UINT16 Value\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT16 Value\r
)\r
{\r
return PciWrite16 (\r
UINT16\r
EFIAPI\r
PciBitFieldOr16 (\r
- IN UINTN Address,\r
- IN UINTN StartBit,\r
- IN UINTN EndBit,\r
- IN UINT16 OrData\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT16 OrData\r
)\r
{\r
return PciWrite16 (\r
UINT16\r
EFIAPI\r
PciBitFieldAnd16 (\r
- IN UINTN Address,\r
- IN UINTN StartBit,\r
- IN UINTN EndBit,\r
- IN UINT16 AndData\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT16 AndData\r
)\r
{\r
return PciWrite16 (\r
UINT16\r
EFIAPI\r
PciBitFieldAndThenOr16 (\r
- IN UINTN Address,\r
- IN UINTN StartBit,\r
- IN UINTN EndBit,\r
- IN UINT16 AndData,\r
- IN UINT16 OrData\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT16 AndData,\r
+ IN UINT16 OrData\r
)\r
{\r
return PciWrite16 (\r
UINT32\r
EFIAPI\r
PciRead32 (\r
- IN UINTN Address\r
+ IN UINTN Address\r
)\r
{\r
ASSERT_INVALID_PCI_ADDRESS (Address, 3);\r
UINT32\r
EFIAPI\r
PciWrite32 (\r
- IN UINTN Address,\r
- IN UINT32 Value\r
+ IN UINTN Address,\r
+ IN UINT32 Value\r
)\r
{\r
ASSERT_INVALID_PCI_ADDRESS (Address, 3);\r
UINT32\r
EFIAPI\r
PciOr32 (\r
- IN UINTN Address,\r
- IN UINT32 OrData\r
+ IN UINTN Address,\r
+ IN UINT32 OrData\r
)\r
{\r
return PciWrite32 (Address, PciRead32 (Address) | OrData);\r
UINT32\r
EFIAPI\r
PciAnd32 (\r
- IN UINTN Address,\r
- IN UINT32 AndData\r
+ IN UINTN Address,\r
+ IN UINT32 AndData\r
)\r
{\r
return PciWrite32 (Address, PciRead32 (Address) & AndData);\r
UINT32\r
EFIAPI\r
PciAndThenOr32 (\r
- IN UINTN Address,\r
- IN UINT32 AndData,\r
- IN UINT32 OrData\r
+ IN UINTN Address,\r
+ IN UINT32 AndData,\r
+ IN UINT32 OrData\r
)\r
{\r
return PciWrite32 (Address, (PciRead32 (Address) & AndData) | OrData);\r
UINT32\r
EFIAPI\r
PciBitFieldRead32 (\r
- IN UINTN Address,\r
- IN UINTN StartBit,\r
- IN UINTN EndBit\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit\r
)\r
{\r
return BitFieldRead32 (PciRead32 (Address), StartBit, EndBit);\r
UINT32\r
EFIAPI\r
PciBitFieldWrite32 (\r
- IN UINTN Address,\r
- IN UINTN StartBit,\r
- IN UINTN EndBit,\r
- IN UINT32 Value\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT32 Value\r
)\r
{\r
return PciWrite32 (\r
UINT32\r
EFIAPI\r
PciBitFieldOr32 (\r
- IN UINTN Address,\r
- IN UINTN StartBit,\r
- IN UINTN EndBit,\r
- IN UINT32 OrData\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT32 OrData\r
)\r
{\r
return PciWrite32 (\r
UINT32\r
EFIAPI\r
PciBitFieldAnd32 (\r
- IN UINTN Address,\r
- IN UINTN StartBit,\r
- IN UINTN EndBit,\r
- IN UINT32 AndData\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT32 AndData\r
)\r
{\r
return PciWrite32 (\r
UINT32\r
EFIAPI\r
PciBitFieldAndThenOr32 (\r
- IN UINTN Address,\r
- IN UINTN StartBit,\r
- IN UINTN EndBit,\r
- IN UINT32 AndData,\r
- IN UINT32 OrData\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT32 AndData,\r
+ IN UINT32 OrData\r
)\r
{\r
return PciWrite32 (\r
UINTN\r
EFIAPI\r
PciReadBuffer (\r
- IN UINTN StartAddress,\r
- IN UINTN Size,\r
- OUT VOID *Buffer\r
+ IN UINTN StartAddress,\r
+ IN UINTN Size,\r
+ OUT VOID *Buffer\r
)\r
{\r
- UINTN ReturnValue;\r
+ UINTN ReturnValue;\r
\r
ASSERT_INVALID_PCI_ADDRESS (StartAddress, 0);\r
ASSERT (((StartAddress & 0xFFF) + Size) <= 0x1000);\r
// Read a byte if StartAddress is byte aligned\r
//\r
*(volatile UINT8 *)Buffer = PciRead8 (StartAddress);\r
- StartAddress += sizeof (UINT8);\r
- Size -= sizeof (UINT8);\r
- Buffer = (UINT8*)Buffer + 1;\r
+ StartAddress += sizeof (UINT8);\r
+ Size -= sizeof (UINT8);\r
+ Buffer = (UINT8 *)Buffer + 1;\r
}\r
\r
- if (Size >= sizeof (UINT16) && (StartAddress & BIT1) != 0) {\r
+ if ((Size >= sizeof (UINT16)) && ((StartAddress & BIT1) != 0)) {\r
//\r
// Read a word if StartAddress is word aligned\r
//\r
WriteUnaligned16 (Buffer, PciRead16 (StartAddress));\r
StartAddress += sizeof (UINT16);\r
- Size -= sizeof (UINT16);\r
- Buffer = (UINT16*)Buffer + 1;\r
+ Size -= sizeof (UINT16);\r
+ Buffer = (UINT16 *)Buffer + 1;\r
}\r
\r
while (Size >= sizeof (UINT32)) {\r
//\r
WriteUnaligned32 (Buffer, PciRead32 (StartAddress));\r
StartAddress += sizeof (UINT32);\r
- Size -= sizeof (UINT32);\r
- Buffer = (UINT32*)Buffer + 1;\r
+ Size -= sizeof (UINT32);\r
+ Buffer = (UINT32 *)Buffer + 1;\r
}\r
\r
if (Size >= sizeof (UINT16)) {\r
//\r
WriteUnaligned16 (Buffer, PciRead16 (StartAddress));\r
StartAddress += sizeof (UINT16);\r
- Size -= sizeof (UINT16);\r
- Buffer = (UINT16*)Buffer + 1;\r
+ Size -= sizeof (UINT16);\r
+ Buffer = (UINT16 *)Buffer + 1;\r
}\r
\r
if (Size >= sizeof (UINT8)) {\r
UINTN\r
EFIAPI\r
PciWriteBuffer (\r
- IN UINTN StartAddress,\r
- IN UINTN Size,\r
- IN VOID *Buffer\r
+ IN UINTN StartAddress,\r
+ IN UINTN Size,\r
+ IN VOID *Buffer\r
)\r
{\r
- UINTN ReturnValue;\r
+ UINTN ReturnValue;\r
\r
ASSERT_INVALID_PCI_ADDRESS (StartAddress, 0);\r
ASSERT (((StartAddress & 0xFFF) + Size) <= 0x1000);\r
//\r
// Write a byte if StartAddress is byte aligned\r
//\r
- PciWrite8 (StartAddress, *(UINT8*)Buffer);\r
+ PciWrite8 (StartAddress, *(UINT8 *)Buffer);\r
StartAddress += sizeof (UINT8);\r
- Size -= sizeof (UINT8);\r
- Buffer = (UINT8*)Buffer + 1;\r
+ Size -= sizeof (UINT8);\r
+ Buffer = (UINT8 *)Buffer + 1;\r
}\r
\r
- if (Size >= sizeof (UINT16) && (StartAddress & BIT1) != 0) {\r
+ if ((Size >= sizeof (UINT16)) && ((StartAddress & BIT1) != 0)) {\r
//\r
// Write a word if StartAddress is word aligned\r
//\r
PciWrite16 (StartAddress, ReadUnaligned16 (Buffer));\r
StartAddress += sizeof (UINT16);\r
- Size -= sizeof (UINT16);\r
- Buffer = (UINT16*)Buffer + 1;\r
+ Size -= sizeof (UINT16);\r
+ Buffer = (UINT16 *)Buffer + 1;\r
}\r
\r
while (Size >= sizeof (UINT32)) {\r
//\r
PciWrite32 (StartAddress, ReadUnaligned32 (Buffer));\r
StartAddress += sizeof (UINT32);\r
- Size -= sizeof (UINT32);\r
- Buffer = (UINT32*)Buffer + 1;\r
+ Size -= sizeof (UINT32);\r
+ Buffer = (UINT32 *)Buffer + 1;\r
}\r
\r
if (Size >= sizeof (UINT16)) {\r
//\r
PciWrite16 (StartAddress, ReadUnaligned16 (Buffer));\r
StartAddress += sizeof (UINT16);\r
- Size -= sizeof (UINT16);\r
- Buffer = (UINT16*)Buffer + 1;\r
+ Size -= sizeof (UINT16);\r
+ Buffer = (UINT16 *)Buffer + 1;\r
}\r
\r
if (Size >= sizeof (UINT8)) {\r
//\r
// Write the last remaining byte if exist\r
//\r
- PciWrite8 (StartAddress, *(UINT8*)Buffer);\r
+ PciWrite8 (StartAddress, *(UINT8 *)Buffer);\r
}\r
\r
return ReturnValue;\r