# This Package provides all definitions(including functions, MACROs, structures and library classes)\r
# and libraries instances, which are defined in MDE Specification.\r
# It also provides the definitions(including PPIs/PROTOCOLs/GUIDs) of\r
-# EFI1.10/UEFI2.3/PI1.2 and some Industry Standards.\r
+# EFI1.10/UEFI2.3.1/PI1.2 and some Industry Standards.\r
#\r
-# Copyright (c) 2007 - 2011, Intel Corporation. All rights reserved.<BR>\r
+# Copyright (c) 2007 - 2013, Intel Corporation. All rights reserved.<BR>\r
# Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r
#\r
# This program and the accompanying materials are licensed and made available under\r
DEC_SPECIFICATION = 0x00010005\r
PACKAGE_NAME = MdePkg\r
PACKAGE_GUID = 1E73767F-8F52-4603-AEB4-F29B510B6766\r
- PACKAGE_VERSION = 1.02\r
+ PACKAGE_VERSION = 1.03\r
\r
\r
[Includes]\r
[Includes.ARM]\r
Include/Arm\r
\r
+[Includes.AARCH64]\r
+ Include/AArch64\r
+\r
[LibraryClasses]\r
## @libraryclass Provides most usb APIs to support the Hid requests defined in Usb Hid 1.1 spec\r
# and the standard requests defined in Usb 1.1 spec.\r
##\r
SynchronizationLib|Include/Library/SynchronizationLib.h\r
\r
+ ## @libraryclass Defines library APIs used by modules to save S3 Boot\r
+ # Script Opcodes. These OpCode will be restored by S3\r
+ # related modules.\r
+ S3BootScriptLib|Include/Library/S3BootScriptLib.h\r
+ \r
+ ## @libraryclass I/O and MMIO Library Services that do I/O and also enable\r
+ # the I/O operatation to be replayed during an S3 resume.\r
+ # This library class maps directly on top of the IoLib class.\r
+ S3IoLib|Include/Library/S3IoLib.h\r
+\r
+ ## @libraryclass PCI configuration Library Services that do PCI configuration\r
+ # and also enable the PCI operations to be replayed during an\r
+ # S3 resume. This library class maps directly on top of the\r
+ # PciLib class.\r
+ S3PciLib|Include/Library/S3PciLib.h\r
+\r
+ ## @libraryclass Smbus Library Services that do SMBus transactions and also\r
+ # enable the operatation to be replayed during an S3 resume.\r
+ # This library class maps directly on top of the SmbusLib class.\r
+ S3SmbusLib|Include/Library/S3SmbusLib.h\r
+\r
+ ## @libraryclass Stall Services that do stall and also enable the Stall\r
+ # operatation to be replayed during an S3 resume. This\r
+ # library class maps directly on top of the Timer class.\r
+ S3StallLib|Include/Library/S3StallLib.h\r
+ \r
+ ## @libraryclass Defines library APIs used by modules to get/set print error level.\r
+ DebugPrintErrorLevelLib|Include/Library/DebugPrintErrorLevelLib.h\r
+\r
[LibraryClasses.IA32, LibraryClasses.X64]\r
## @libraryclass Abstracts both S/W SMI generation and detection.\r
##\r
## Include/Guid/WinCertificate.h\r
gEfiCertTypeRsa2048Sha256Guid = { 0xa7717414, 0xc616, 0x4977, {0x94, 0x20, 0x84, 0x47, 0x12, 0xa7, 0x35, 0xbf }}\r
\r
+ ## Include/Guid/Cper.h\r
+ gEfiEventNotificationTypeCmcGuid = { 0x2DCE8BB1, 0xBDD7, 0x450e, { 0xB9, 0xAD, 0x9C, 0xF4, 0xEB, 0xD4, 0xF8, 0x90 }}\r
+\r
+ ## Include/Guid/Cper.h\r
+ gEfiEventNotificationTypeCpeGuid = { 0x4E292F96, 0xD843, 0x4a55, { 0xA8, 0xC2, 0xD4, 0x81, 0xF2, 0x7E, 0xBE, 0xEE }}\r
+\r
+ ## Include/Guid/Cper.h\r
+ gEfiEventNotificationTypeMceGuid = { 0xE8F56FFE, 0x919C, 0x4cc5, { 0xBA, 0x88, 0x65, 0xAB, 0xE1, 0x49, 0x13, 0xBB }}\r
+\r
+ ## Include/Guid/Cper.h\r
+ gEfiEventNotificationTypePcieGuid = { 0xCF93C01F, 0x1A16, 0x4dfc, { 0xB8, 0xBC, 0x9C, 0x4D, 0xAF, 0x67, 0xC1, 0x04 }}\r
+\r
+ ## Include/Guid/Cper.h\r
+ gEfiEventNotificationTypeInitGuid = { 0xCC5263E8, 0x9308, 0x454a, { 0x89, 0xD0, 0x34, 0x0B, 0xD3, 0x9B, 0xC9, 0x8E }}\r
+\r
+ ## Include/Guid/Cper.h\r
+ gEfiEventNotificationTypeNmiGuid = { 0x5BAD89FF, 0xB7E6, 0x42c9, { 0x81, 0x4A, 0xCF, 0x24, 0x85, 0xD6, 0xE9, 0x8A }}\r
+\r
+ ## Include/Guid/Cper.h\r
+ gEfiEventNotificationTypeBootGuid = { 0x3D61A466, 0xAB40, 0x409a, { 0xA6, 0x98, 0xF3, 0x62, 0xD4, 0x64, 0xB3, 0x8F }}\r
+\r
+ ## Include/Guid/Cper.h\r
+ gEfiEventNotificationTypeDmarGuid = { 0x667DD791, 0xC6B3, 0x4c27, { 0x8A, 0x6B, 0x0F, 0x8E, 0x72, 0x2D, 0xEB, 0x41 }}\r
+\r
+ ## Include/Guid/Cper.h\r
+ gEfiProcessorGenericErrorSectionGuid = { 0x9876ccad, 0x47b4, 0x4bdb, { 0xb6, 0x5e, 0x16, 0xf1, 0x93, 0xc4, 0xf3, 0xdb }}\r
+\r
+ ## Include/Guid/Cper.h\r
+ gEfiProcessorSpecificErrorSectionGuid = { 0xdc3ea0b0, 0xa144, 0x4797, { 0xb9, 0x5b, 0x53, 0xfa, 0x24, 0x2b, 0x6e, 0x1d }}\r
+\r
+ ## Include/Guid/Cper.h\r
+ gEfiPlatformMemoryErrorSectionGuid = { 0xa5bc1114, 0x6f64, 0x4ede, { 0xb8, 0x63, 0x3e, 0x83, 0xed, 0x7c, 0x83, 0xb1 }}\r
+\r
+ ## Include/Guid/Cper.h\r
+ gEfiPcieErrorSectionGuid = { 0xd995e954, 0xbbc1, 0x430f, { 0xad, 0x91, 0xb4, 0x4d, 0xcb, 0x3c, 0x6f, 0x35 }}\r
+\r
+ ## Include/Guid/Cper.h\r
+ gEfiFirmwareErrorSectionGuid = { 0x81212a96, 0x09ed, 0x4996, { 0x94, 0x71, 0x8d, 0x72, 0x9c, 0x8e, 0x69, 0xed }}\r
+\r
+ ## Include/Guid/Cper.h\r
+ gEfiPciBusErrorSectionGuid = { 0xc5753963, 0x3b84, 0x4095, { 0xbf, 0x78, 0xed, 0xda, 0xd3, 0xf9, 0xc9, 0xdd }}\r
+\r
+ ## Include/Guid/Cper.h\r
+ gEfiPciDevErrorSectionGuid = { 0xeb5e4685, 0xca66, 0x4769, { 0xb6, 0xa2, 0x26, 0x06, 0x8b, 0x00, 0x13, 0x26 }}\r
+\r
+ ## Include/Guid/Cper.h\r
+ gEfiDMArGenericErrorSectionGuid = { 0x5b51fef7, 0xc79d, 0x4434, { 0x8f, 0x1b, 0xaa, 0x62, 0xde, 0x3e, 0x2c, 0x64 }}\r
+\r
+ ## Include/Guid/Cper.h\r
+ gEfiDirectedIoDMArErrorSectionGuid = { 0x71761d37, 0x32b2, 0x45cd, { 0xa7, 0xd0, 0xb0, 0xfe, 0xdd, 0x93, 0xe8, 0xcf }}\r
+\r
+ ## Include/Guid/Cper.h\r
+ gEfiIommuDMArErrorSectionGuid = { 0x036f84e1, 0x7f37, 0x428c, { 0xa7, 0x9e, 0x57, 0x5f, 0xdf, 0xaa, 0x84, 0xec }}\r
+\r
#\r
# GUID defined in UEFI2.2\r
#\r
gEfiCertSha224Guid = { 0xb6e5233, 0xa65c, 0x44c9, {0x94, 0x7, 0xd9, 0xab, 0x83, 0xbf, 0xc8, 0xbd }}\r
gEfiCertSha384Guid = { 0xff3e5307, 0x9fd0, 0x48c9, {0x85, 0xf1, 0x8a, 0xd5, 0x6c, 0x70, 0x1e, 0x1 }}\r
gEfiCertSha512Guid = { 0x93e0fae, 0xa6c4, 0x4f50, {0x9f, 0x1b, 0xd4, 0x1e, 0x2b, 0x89, 0xc1, 0x9a }}\r
+ gEfiCertPkcs7Guid = { 0x4aafd29d, 0x68df, 0x49ee, {0x8a, 0xa9, 0x34, 0x7d, 0x37, 0x56, 0x65, 0xa7 }}\r
+\r
+ ## Include/Protocol/Hash.h\r
+ gEfiHashAlgorithmSha1NoPadGuid = { 0x24c5dc2f, 0x53e2, 0x40ca, { 0x9e, 0xd6, 0xa5, 0xd9, 0xa4, 0x9f, 0x46, 0x3b }}\r
+ gEfiHashAlgorithmSha256NoPadGuid = { 0x8628752a, 0x6cb7, 0x4814, { 0x96, 0xfc, 0x24, 0xa8, 0x15, 0xac, 0x22, 0x26 }}\r
\r
#\r
# GUID defined in PI1.0\r
## Include/Guid/FirmwareFileSystem3.h\r
gEfiFirmwareFileSystem3Guid = { 0x5473c07a, 0x3dcb, 0x4dca, { 0xbd, 0x6f, 0x1e, 0x96, 0x89, 0xe7, 0x34, 0x9a }}\r
\r
+ #\r
+ # GUID defined in PI1.2.1\r
+ #\r
+ ## Include/Guid/EventGroup.h\r
+ gEfiEndOfDxeEventGroupGuid = { 0x2ce967a, 0xdd7e, 0x4ffc, { 0x9e, 0xe7, 0x81, 0xc, 0xf0, 0x47, 0x8, 0x80 }}\r
+\r
+[Guids.IA32, Guids.X64]\r
+ ## Include/Guid/Cper.h\r
+ gEfiIa32X64ErrorTypeCacheCheckGuid = { 0xA55701F5, 0xE3EF, 0x43de, { 0xAC, 0x72, 0x24, 0x9B, 0x57, 0x3F, 0xAD, 0x2C }}\r
+\r
+ ## Include/Guid/Cper.h\r
+ gEfiIa32X64ErrorTypeTlbCheckGuid = { 0xFC06B535, 0x5E1F, 0x4562, { 0x9F, 0x25, 0x0A, 0x3B, 0x9A, 0xDB, 0x63, 0xC3 }}\r
+\r
+ ## Include/Guid/Cper.h\r
+ gEfiIa32X64ErrorTypeBusCheckGuid = { 0x1CF3F8B3, 0xC5B1, 0x49a2, { 0xAA, 0x59, 0x5E, 0xEF, 0x92, 0xFF, 0xA6, 0x3C }}\r
+\r
+ ## Include/Guid/Cper.h\r
+ gEfiIa32X64ErrorTypeMsCheckGuid = { 0x48AB7F57, 0xDC34, 0x4f6c, { 0xA7, 0xD3, 0xB0, 0xB5, 0xB0, 0xA7, 0x43, 0x14 }} \r
+\r
[Ppis]\r
## Include/Ppi/MasterBootMode.h\r
gEfiPeiMasterBootModePpiGuid = { 0x7408d748, 0xfc8c, 0x4ee6, {0x92, 0x88, 0xc4, 0xbe, 0xc0, 0x92, 0xa4, 0x10 } }\r
## Include/Ppi/PiPcd.h\r
gEfiPeiPcdPpiGuid = { 0x1f34d25, 0x4de2, 0x23ad, { 0x3f, 0xf3, 0x36, 0x35, 0x3f, 0xf3, 0x23, 0xf1 } }\r
\r
+ #\r
+ # PPIs defined in PI 1.3.\r
+ #\r
+ \r
+ ## Include/Ppi/I2cMaster.h\r
+ gEfiPeiI2cMasterPpiGuid = { 0xb3bfab9b, 0x9f9c, 0x4e8b, { 0xad, 0x37, 0x7f, 0x8c, 0x51, 0xfc, 0x62, 0x80 }}\r
+\r
[Protocols]\r
#\r
# Protocols defined in PI1.0.\r
gEfiExtendedSalCacheServicesProtocolGuid = { 0xedc9494, 0x2743, 0x4ba5, { 0x88, 0x18, 0x0a, 0xef, 0x52, 0x13, 0xf1, 0x88 } }\r
gEfiExtendedSalMcaLogServicesProtocolGuid = { 0xcb3fd86e, 0x38a3, 0x4c03, {0x9a, 0x5c, 0x90, 0xcf, 0xa3, 0xa2, 0xab, 0x7a } }\r
\r
+ #\r
+ # Protocols defined in PI1.2.1\r
+ #\r
+ ## Include/Protocol/Security2.h\r
+ gEfiSecurity2ArchProtocolGuid = { 0x94ab2f58, 0x1438, 0x4ef1, {0x91, 0x52, 0x18, 0x94, 0x1a, 0x3a, 0x0e, 0x68 } }\r
+\r
+ #\r
+ # Protocols defined in PI 1.2.1\r
+ #\r
+\r
+ ## Include/Protocol/SmmEndOfDxe.h\r
+ gEfiSmmEndOfDxeProtocolGuid = { 0x24e70042, 0xd5c5, 0x4260, { 0x8c, 0x39, 0xa, 0xd3, 0xaa, 0x32, 0xe9, 0x3d }}\r
+\r
+ #\r
+ # Protocols defined in PI 1.3.\r
+ #\r
+\r
+ ## Include/Protocol/I2cMaster.h\r
+ gEfiI2cMasterProtocolGuid = { 0xcd72881f, 0x45b5, 0x4feb, { 0x98, 0xc8, 0x31, 0x3d, 0xa8, 0x11, 0x74, 0x62 }}\r
+\r
+ ## Include/Protocol/I2cIo.h\r
+ gEfiI2cIoProtocolGuid = { 0xb60a3e6b, 0x18c4, 0x46e5, { 0xa2, 0x9a, 0xc9, 0xa1, 0x06, 0x65, 0xa2, 0x8e }}\r
+\r
+ ## Include/Protocol/I2cEnumerate.h\r
+ gEfiI2cEnumerateProtocolGuid = { 0xda8cd7c4, 0x1c00, 0x49e2, { 0x80, 0x3e, 0x52, 0x14, 0xe7, 0x01, 0x89, 0x4c }}\r
+\r
+ ## Include/Protocol/I2cHost.h\r
+ gEfiI2cHostProtocolGuid = { 0xa5aab9e3, 0xc727, 0x48cd, { 0x8b, 0xbf, 0x42, 0x72, 0x33, 0x85, 0x49, 0x48 }}\r
+\r
+ ## Include/Protocol/I2cBusConfigurationManagement.h\r
+ gEfiI2cBusConfigurationManagementProtocolGuid = { 0x55b71fb5, 0x17c6, 0x410e, { 0xb5, 0xbd, 0x5f, 0xa2, 0xe3, 0xd4, 0x46, 0x6b }}\r
+\r
#\r
# Protocols defined in UEFI2.1/UEFI2.0/EFI1.1\r
#\r
gEfiPlatformDriverOverrideProtocolGuid = { 0x6b30c738, 0xa391, 0x11d4, {0x9a, 0x3b, 0x00, 0x90, 0x27, 0x3f, 0xc1, 0x4d } }\r
\r
## Include/Protocol/DriverFamilyOverride.h\r
- gEfiDriverFamilyOverrideProtocolGuid = {0x6b30c738, 0xa391, 0x11d4, {0x9a, 0x3b, 0x00, 0x90, 0x27, 0x3f, 0xc1, 0x4d }}\r
+ gEfiDriverFamilyOverrideProtocolGuid = { 0xb1ee129e, 0xda36, 0x4181, { 0x91, 0xf8, 0x4, 0xa4, 0x92, 0x37, 0x66, 0xa7 }}\r
\r
## Include/Protocol/BusSpecificDriverOverride.h\r
gEfiBusSpecificDriverOverrideProtocolGuid = { 0x3BC1B285, 0x8A15, 0x4A82, { 0xAA, 0xBF, 0x4D, 0x7D, 0x13, 0xFB, 0x32, 0x65 }}\r
gEfiBlockIo2ProtocolGuid = { 0xa77b2472, 0xe282, 0x4e9f, {0xa2, 0x45, 0xc2, 0xc0, 0xe2, 0x7b, 0xbc, 0xc1 }}\r
\r
## Include/Protocol/StorageSecurityCommand.h\r
- gEfiStorageSecurityCommandProtocolGuid = { 0xc88b0b6d, 0x0dfc, 0x49a7, {0x9c, 0xb4, 0x49, 0x7, 0x4b, 0x4c, 0x3a, 0x78 }}\r
+ gEfiStorageSecurityCommandProtocolGuid = { 0xc88b0b6d, 0x0dfc, 0x49a7, {0x9c, 0xb4, 0x49, 0x7, 0x4b, 0x4c, 0x3a, 0x78 }}\r
+\r
+ ## Include/Protocol/UserCredential2.h\r
+ gEfiUserCredential2ProtocolGuid = { 0xe98adb03, 0xb8b9, 0x4af8, {0xba, 0x20, 0x26, 0xe9, 0x11, 0x4c, 0xbc, 0xe5 }}\r
+\r
+ #\r
+ # Protocols defined in UEFI2.4\r
+ #\r
+ ## Include/Protocol/DiskIo2.h\r
+ gEfiDiskIo2ProtocolGuid = { 0x151c8eae, 0x7f2c, 0x472c, { 0x9e, 0x54, 0x98, 0x28, 0x19, 0x4f, 0x6a, 0x88 }}\r
\r
[PcdsFeatureFlag]\r
## If TRUE, the component name protocol will not be installed.\r
## Indicates the maximum node number of linked list\r
gEfiMdePkgTokenSpaceGuid.PcdMaximumLinkedListLength|1000000|UINT32|0x00000003\r
\r
+ ## Indicates the maximum node number of device path\r
+ gEfiMdePkgTokenSpaceGuid.PcdMaximumDevicePathNodeCount|0|UINT32|0x00000029\r
+\r
## Indicates the timeout tick of holding spin lock\r
gEfiMdePkgTokenSpaceGuid.PcdSpinLockTimeout|10000000|UINT32|0x00000004\r
\r
projects / mirror_edk2.git / blobdiff