]> git.proxmox.com Git - mirror_edk2.git/blobdiff - MdePkg/MdePkg.dec
BaseTools/BinToPcd: Fix Python 2.7.x compatibility issue
[mirror_edk2.git] / MdePkg / MdePkg.dec
index 7d74b69769584da81e37956b07c6a48ac3b67e1e..94ad814dc9d62eae14dd20e78de728bf21523c81 100644 (file)
@@ -2,10 +2,11 @@
 # This Package provides all definitions, library classes and libraries instances.\r
 #\r
 # It also provides the definitions(including PPIs/PROTOCOLs/GUIDs) of\r
-# EFI1.10/UEFI2.5/PI1.4 and some Industry Standards.\r
+# EFI1.10/UEFI2.7/PI1.6 and some Industry Standards.\r
 #\r
-# Copyright (c) 2007 - 2015, Intel Corporation. All rights reserved.<BR>\r
+# Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.<BR>\r
 # Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r
+# (C) Copyright 2016 Hewlett Packard Enterprise Development LP<BR>\r
 #\r
 # This program and the accompanying materials are licensed and made available under\r
 # the terms and conditions of the BSD License which accompanies this distribution.\r
@@ -23,7 +24,7 @@
   PACKAGE_NAME                   = MdePkg\r
   PACKAGE_UNI_FILE               = MdePkg.uni\r
   PACKAGE_GUID                   = 1E73767F-8F52-4603-AEB4-F29B510B6766\r
-  PACKAGE_VERSION                = 1.05\r
+  PACKAGE_VERSION                = 1.08\r
 \r
 \r
 [Includes]\r
   ##  @libraryclass  Provides a service to retrieve the PE/COFF entry point from a PE/COFF image.\r
   PeCoffGetEntryPointLib|Include/Library/PeCoffGetEntryPointLib.h\r
 \r
+  ##  @libraryclass  Provides services to return the PCI segment information.\r
+  PciSegmentInfoLib|Include/Library/PciSegmentInfoLib.h\r
+\r
   ##  @libraryclass  Provides services to access PCI Configuration Space on a platform with multiple PCI segments.\r
   PciSegmentLib|Include/Library/PciSegmentLib.h\r
 \r
+  ##  @libraryclass  The multiple segments PCI configuration Library Services that carry out\r
+  ##                 PCI configuration and enable the PCI operations to be replayed during an\r
+  ##                 S3 resume. This library class maps directly on top of the PciSegmentLib class.\r
+  S3PciSegmentLib|Include/Library/PciSegmentLib.h\r
+\r
   ##  @libraryclass  Provides services to access PCI Configuration Space.\r
   PciLib|Include/Library/PciLib.h\r
 \r
   ##  @libraryclass  provides EFI_FILE_HANDLE services\r
   FileHandleLib|Include/Library/FileHandleLib.h\r
 \r
+  ## @libraryclass provides helper functions to prevent integer overflow during\r
+  #                type conversion, addition, subtraction, and multiplication.\r
+  ##\r
+  SafeIntLib|Include/Library/SafeIntLib.h\r
+\r
 [LibraryClasses.IA32, LibraryClasses.X64]\r
   ##  @libraryclass  Abstracts both S/W SMI generation and detection.\r
   ##\r
   #\r
   SmmMemLib|Include/Library/SmmMemLib.h\r
 \r
+  ##  @libraryclass  Provides services for Smm IO Operation.\r
+  #\r
+  SmmIoLib|Include/Library/SmmIoLib.h\r
+\r
   ##  @libraryclass  Provides services to enable/disable periodic SMI handlers.\r
   #\r
   SmmPeriodicSmiLib|Include/Library/SmmPeriodicSmiLib.h\r
 \r
+  ##  @libraryclass  Provides services to generate random number.\r
+  #\r
+  RngLib|Include/Library/RngLib.h\r
+\r
+  ##  @libraryclass  Provides services to log the SMI handler registration.\r
+  SmiHandlerProfileLib|Include/Library/SmiHandlerProfileLib.h\r
+\r
 [LibraryClasses.IPF]\r
   ##  @libraryclass  The SAL Library provides a service to make a SAL CALL.\r
   SalLib|Include/Library/SalLib.h\r
 \r
   ## Include/Guid/MemoryOverwriteControl.h\r
   gEfiMemoryOverwriteControlDataGuid = { 0xe20939be, 0x32d4, 0x41be, {0xa1, 0x50, 0x89, 0x7f, 0x85, 0xd4, 0x98, 0x29 }}\r
-  \r
+\r
   ## Include/IndustryStandard/MemoryOverwriteRequestControlLock.h\r
   gEfiMemoryOverwriteRequestControlLockGuid = { 0xBB983CCF, 0x151D, 0x40E1, {0xA0, 0x7B, 0x4A, 0x17, 0xBE, 0x16, 0x82, 0x92}}\r
 \r
   ## Include/Guid/Cper.h\r
   gEfiProcessorSpecificErrorSectionGuid = { 0xdc3ea0b0, 0xa144, 0x4797, { 0xb9, 0x5b, 0x53, 0xfa, 0x24, 0x2b, 0x6e, 0x1d }}\r
 \r
+  ## Include/Guid/Cper.h\r
+  gEfiIa32X64ProcessorErrorSectionGuid  = { 0xdc3ea0b0, 0xa144, 0x4797, { 0xb9, 0x5b, 0x53, 0xfa, 0x24, 0x2b, 0x6e, 0x1d }}\r
+\r
   ## Include/Guid/Cper.h\r
   gEfiPlatformMemoryErrorSectionGuid = { 0xa5bc1114, 0x6f64, 0x4ede, { 0xb8, 0x63, 0x3e, 0x83, 0xed, 0x7c, 0x83, 0xb1 }}\r
 \r
   gEfiPersistentVirtualDiskGuid  = { 0x5CEA02C9, 0x4D07, 0x69D3, {0x26, 0x9F ,0x44, 0x96, 0xFB, 0xE0, 0x96, 0xF9 }}\r
   gEfiPersistentVirtualCdGuid    = { 0x08018188, 0x42CD, 0xBB48, {0x10, 0x0F, 0x53, 0x87, 0xD5, 0x3D, 0xED, 0x3D }}\r
 \r
+  #\r
+  # GUIDs defined in UEFI2.6\r
+  #\r
+\r
+  ## Include/Guid/MemoryAttributesTable.h\r
+  gEfiMemoryAttributesTableGuid        = { 0xdcfa911d, 0x26eb, 0x469f, {0xa2, 0x20, 0x38, 0xb7, 0xdc, 0x46, 0x12, 0x20}}\r
+\r
+  ## Include/Guid/Cper.h\r
+  gEfiArmProcessorErrorSectionGuid     = { 0xe19e3d16, 0xbc11, 0x11e4, { 0x9c, 0xaa, 0xc2, 0x05, 0x1d, 0x5d, 0x46, 0xb0 }}\r
+\r
+  ## Guid for Image decoder\r
+  ## Include/Protocol/ImageDecoder.h\r
+  gEfiHiiImageDecoderNameJpegGuid           = { 0xefefd093, 0x0d9b, 0x46eb, { 0xa8, 0x56, 0x48, 0x35, 0x07, 0x00, 0xc9, 0x08 }}\r
+  gEfiHiiImageDecoderNamePngGuid            = { 0xaf060190, 0x5e3a, 0x4025, { 0xaf, 0xbd, 0xe1, 0xf9, 0x05, 0xbf, 0xaa, 0x4c }}\r
+\r
+  #\r
+  # GUIDs defined in UEFI2.7\r
+  #\r
+  ## Include/Guid/Btt.h\r
+  gEfiBttAbstractionGuid         = { 0x18633bfc, 0x1735, 0x4217, { 0x8a, 0xc9, 0x17, 0x23, 0x92, 0x82, 0xd3, 0xf8 }}\r
+\r
   #\r
   # GUID defined in PI1.0\r
   #\r
   ## Include/Protocol/DiskInfo.h\r
   gEfiDiskInfoUfsInterfaceGuid   = { 0x4b3029cc, 0x6b98, 0x47fb, { 0xbc, 0x96, 0x76, 0xdc, 0xb8, 0x4, 0x41, 0xf0 }}\r
 \r
+  #\r
+  # GUID defined in PI1.5\r
+  #\r
+  ## Include/Guid/GraphicsInfoHob.h\r
+  gEfiGraphicsDeviceInfoHobGuid     = { 0xe5cb2ac9, 0xd35d, 0x4430, { 0x93, 0x6e, 0x1d, 0xe3, 0x32, 0x47, 0x8d, 0xe7 }}\r
+\r
+  #\r
+  # GUID defined in PI1.6\r
+  #\r
+  ## Include/Guid/DiskInfo.h\r
+  gEfiDiskInfoSdMmcInterfaceGuid  = { 0x8deec992, 0xd39c, 0x4a5c, { 0xab, 0x6b, 0x98, 0x6e, 0x14, 0x24, 0x2b, 0x9d }}\r
+\r
   #\r
   # GUID defined in Windows UEFI Firmware Update Platform doc\r
   #\r
   ## Include/Ppi/SecPlatformInformation.h\r
   gEfiSecPlatformInformation2PpiGuid = { 0x9e9f374b, 0x8f16, 0x4230, {0x98, 0x24, 0x58, 0x46, 0xee, 0x76, 0x6a, 0x97 } }\r
 \r
+  #\r
+  # PPIs defined in PI 1.5.\r
+  #\r
+\r
+  ## Include/Ppi/SecHobData.h\r
+  gEfiSecHobDataPpiGuid = { 0x3ebdaf20, 0x6667, 0x40d8, {0xb4, 0xee, 0xf5, 0x99, 0x9a, 0xc1, 0xb7, 0x1f } }\r
+\r
 [Protocols]\r
   ## Include/Protocol/Pcd.h\r
   gPcdProtocolGuid               = { 0x11B34006, 0xD85B, 0x4D0A, { 0xA2, 0x90, 0xD5, 0xA5, 0x71, 0x31, 0x0E, 0xF7 }}\r
   ## Include/Protocol/I2cBusConfigurationManagement.h\r
   gEfiI2cBusConfigurationManagementProtocolGuid = { 0x55b71fb5, 0x17c6, 0x410e, { 0xb5, 0xbd, 0x5f, 0xa2, 0xe3, 0xd4, 0x46, 0x6b }}\r
 \r
+  #\r
+  # Protocols defined in PI 1.5.\r
+  #\r
+\r
+  ## Include/Protocol/MmEndOfDxe.h\r
+  gEfiMmEndOfDxeProtocolGuid = { 0x24e70042, 0xd5c5, 0x4260, { 0x8c, 0x39, 0xa, 0xd3, 0xaa, 0x32, 0xe9, 0x3d }}\r
+\r
+  ## Include/Protocol/MmIoTrapDispatch.h\r
+  gEfiMmIoTrapDispatchProtocolGuid = { 0x58dc368d, 0x7bfa, 0x4e77, {0xab, 0xbc, 0xe, 0x29, 0x41, 0x8d, 0xf9, 0x30 }}\r
+\r
+  ## Include/Protocol/MmPowerButtonDispatch.h\r
+  gEfiMmPowerButtonDispatchProtocolGuid = { 0x1b1183fa, 0x1823, 0x46a7, {0x88, 0x72, 0x9c, 0x57, 0x87, 0x55, 0x40, 0x9d }}\r
+\r
+  ## Include/Protocol/MmStandbyButtonDispatch.h\r
+  gEfiMmStandbyButtonDispatchProtocolGuid = { 0x7300c4a1, 0x43f2, 0x4017, {0xa5, 0x1b, 0xc8, 0x1a, 0x7f, 0x40, 0x58, 0x5b }}\r
+\r
+  ## Include/Protocol/MmGpiDispatch.h\r
+  gEfiMmGpiDispatchProtocolGuid = { 0x25566b03, 0xb577, 0x4cbf, {0x95, 0x8c, 0xed, 0x66, 0x3e, 0xa2, 0x43, 0x80 }}\r
+\r
+  ## Include/Protocol/MmUsbDispatch.h\r
+  gEfiMmUsbDispatchProtocolGuid = { 0xee9b8d90, 0xc5a6, 0x40a2, {0xbd, 0xe2, 0x52, 0x55, 0x8d, 0x33, 0xcc, 0xa1 }}\r
+\r
+  ## Include/Protocol/MmPeriodicTimerDispatch.h\r
+  gEfiMmPeriodicTimerDispatchProtocolGuid = { 0x4cec368e, 0x8e8e, 0x4d71, {0x8b, 0xe1, 0x95, 0x8c, 0x45, 0xfc, 0x8a, 0x53 }}\r
+\r
+  ## Include/Protocol/MmSxDispatch.h\r
+  gEfiMmSxDispatchProtocolGuid  = { 0x456d2859, 0xa84b, 0x4e47, {0xa2, 0xee, 0x32, 0x76, 0xd8, 0x86, 0x99, 0x7d }}\r
+\r
+  ## Include/Protocol/MmSwDispatch.h\r
+  gEfiMmSwDispatchProtocolGuid  = { 0x18a3c6dc, 0x5eea, 0x48c8, {0xa1, 0xc1, 0xb5, 0x33, 0x89, 0xf9, 0x89, 0x99 }}\r
+\r
+  ## Include/Protocol/MmPciRootBridgeIo.h\r
+  gEfiMmPciRootBridgeIoProtocolGuid = { 0x8bc1714d, 0xffcb, 0x41c3, { 0x89, 0xdc, 0x6c, 0x74, 0xd0, 0x6d, 0x98, 0xea }}\r
+\r
+  ## Include/Protocol/MmCpu.h\r
+  gEfiMmCpuProtocolGuid          = { 0xeb346b97, 0x975f, 0x4a9f, { 0x8b, 0x22, 0xf8, 0xe9, 0x2b, 0xb3, 0xd5, 0x69 }}\r
+\r
+  ## Include/Protocol/MmStatusCode.h\r
+  gEfiMmStatusCodeProtocolGuid   = { 0x6afd2b77, 0x98c1, 0x4acd, { 0xa6, 0xf9, 0x8a, 0x94, 0x39, 0xde, 0xf, 0xb1}}\r
+\r
+  ## Include/Protocol/DxeMmReadyToLock.h\r
+  gEfiDxeMmReadyToLockProtocolGuid = { 0x60ff8964, 0xe906, 0x41d0, { 0xaf, 0xed, 0xf2, 0x41, 0xe9, 0x74, 0xe0, 0x8e }}\r
+\r
+  ## Include/Protocol/MmConfiguration.h\r
+  gEfiMmConfigurationProtocolGuid= { 0x26eeb3de, 0xb689, 0x492e, { 0x80, 0xf0, 0xbe, 0x8b, 0xd7, 0xda, 0x4b, 0xa7 }}\r
+\r
+  ## Include/Protocol/MmReadyToLock.h\r
+  gEfiMmReadyToLockProtocolGuid  = { 0x47b7fa8c, 0xf4bd, 0x4af6, { 0x82, 0x00, 0x33, 0x30, 0x86, 0xf0, 0xd2, 0xc8 }}\r
+\r
+  ## Include/Protocol/MmControl.h\r
+  gEfiMmControlProtocolGuid     = { 0x843dc720, 0xab1e, 0x42cb, { 0x93, 0x57, 0x8a, 0x0, 0x78, 0xf3, 0x56, 0x1b}}\r
+\r
+  ## Include/Protocol/MmAccess.h\r
+  gEfiMmAccessProtocolGuid      = { 0xc2702b74, 0x800c, 0x4131, { 0x87, 0x46, 0x8f, 0xb5, 0xb8, 0x9c, 0xe4, 0xac }}\r
+\r
+  ## Include/Protocol/MmBase.h\r
+  gEfiMmBaseProtocolGuid        = { 0xf4ccbfb7, 0xf6e0, 0x47fd, { 0x9d, 0xd4, 0x10, 0xa8, 0xf1, 0x50, 0xc1, 0x91 }}\r
+\r
+  ## Include/Protocol/MmCpuIo.h\r
+  gEfiMmCpuIoProtocolGuid        = { 0x3242a9d8, 0xce70, 0x4aa0, { 0x95, 0x5d, 0x5e, 0x7b, 0x14, 0x0d, 0xe4, 0xd2 }}\r
+\r
+  ## Include/Protocol/MmReportStatusCodeHandler.h\r
+  gEfiMmRscHandlerProtocolGuid   = { 0x2ff29fa7, 0x5e80, 0x4ed9, { 0xb3, 0x80, 0x1, 0x7d, 0x3c, 0x55, 0x4f, 0xf4 }}\r
+\r
+  ## Include/Protocol/MmCommunication.h\r
+  gEfiMmCommunicationProtocolGuid  = { 0xc68ed8e2, 0x9dc6, 0x4cbd, { 0x9d, 0x94, 0xdb, 0x65, 0xac, 0xc5, 0xc3, 0x32 }}\r
+\r
+  #\r
+  # Protocols defined in PI 1.6.\r
+  #\r
+\r
+  ## Include/Protocol/LegacySpiController.h\r
+  gEfiLegacySpiControllerProtocolGuid    = { 0x39136fc7, 0x1a11, 0x49de, { 0xbf, 0x35, 0x0e, 0x78, 0xdd, 0xb5, 0x24, 0xfc }}\r
+\r
+  ## Include/Protocol/LegacySpiFlash.h\r
+  gEfiLegacySpiFlashProtocolGuid         = { 0xf01bed57, 0x04bc, 0x4f3f, { 0x96, 0x60, 0xd6, 0xf2, 0xea, 0x22, 0x82, 0x59 }}\r
+\r
+  ## Include/Protocol/LegacySpiSmmController.h\r
+  gEfiLegacySpiSmmControllerProtocolGuid = { 0x62331b78, 0xd8d0, 0x4c8c, { 0x8c, 0xcb, 0xd2, 0x7d, 0xfe, 0x32, 0xdb, 0x9b }}\r
+\r
+  ## Include/Protocol/LegacySpiSmmFlash.h\r
+  gEfiLegacySpiSmmFlashProtocolGuid      = { 0x5e3848d4, 0x0db5, 0x4fc0, { 0x97, 0x29, 0x3f, 0x35, 0x3d, 0x4f, 0x87, 0x9f }}\r
+\r
+  ## Include/Protocol/SpiConfiguration.h\r
+  gEfiSpiConfigurationProtocolGuid       = { 0x85a6d3e6, 0xb65b, 0x4afc, { 0xb3, 0x8f, 0xc6, 0xd5, 0x4a, 0xf6, 0xdd, 0xc8 }}\r
+\r
+  ## Include/Protocol/SpiHc.h\r
+  gEfiSpiHcProtocolGuid                  = { 0xc74e5db2, 0xfa96, 0x4ae2, { 0xb3, 0x99, 0x15, 0x97, 0x7f, 0xe3, 0x0, 0x2d }}\r
+\r
+  ## Include/Protocol/SpiNorFlash.h\r
+  gEfiSpiNorFlashProtocolGuid            = { 0xb57ec3fe, 0xf833, 0x4ba6, { 0x85, 0x78, 0x2a, 0x7d, 0x6a, 0x87, 0x44, 0x4b }}\r
+\r
+  ## Include/Protocol/SpiSmmConfiguration.h\r
+  gEfiSpiSmmConfigurationProtocolGuid    = { 0x995c6eca, 0x171b, 0x45fd, { 0xa3, 0xaa, 0xfd, 0x4c, 0x9c, 0x9d, 0xef, 0x59 }}\r
+\r
+  ## Include/Protocol/SpiSmmHc.h\r
+  gEfiSpiSmmHcProtocolGuid               = { 0xe9f02217, 0x2093, 0x4470, { 0x8a, 0x54, 0x5c, 0x2c, 0xff, 0xe7, 0x3e, 0xcb }}\r
+\r
+  ## Include/Protocol/SpiSmmNorFlash.h\r
+  gEfiSpiSmmNorFlashProtocolGuid         = { 0xaab18f19, 0xfe14, 0x4666, { 0x86, 0x04, 0x87, 0xff, 0x6d, 0x66, 0x2c, 0x9a }}\r
+\r
   #\r
   # Protocols defined in UEFI2.1/UEFI2.0/EFI1.1\r
   #\r
   ## Include/Protocol/TrEEProtocol.h\r
   gEfiTrEEProtocolGuid           = {0x607f766c, 0x7455, 0x42be, { 0x93, 0x0b, 0xe4, 0xd7, 0x6d, 0xb2, 0x72, 0x0f }}\r
 \r
+  ## Include/Protocol/Tcg2Protocol.h\r
+  gEfiTcg2ProtocolGuid           = {0x607f766c, 0x7455, 0x42be, { 0x93, 0x0b, 0xe4, 0xd7, 0x6d, 0xb2, 0x72, 0x0f }}\r
+  gEfiTcg2FinalEventsTableGuid   = {0x1e2ed096, 0x30e2, 0x4254, { 0xbd, 0x89, 0x86, 0x3b, 0xbe, 0xf8, 0x23, 0x25 }}\r
+\r
   ## Include/Protocol/FormBrowser2.h\r
   gEfiFormBrowser2ProtocolGuid   =   {0xb9d4c360, 0xbcfb, 0x4f9b, {0x92, 0x98, 0x53, 0xc1, 0x36, 0x98, 0x22, 0x58}}\r
 \r
   ## Include/Protocol/Http.h\r
   gEfiHttpProtocolGuid                 = { 0x7a59b29b, 0x910b, 0x4171, {0x82, 0x42, 0xa8, 0x5a, 0x0d, 0xf2, 0x5b, 0x5b }}\r
 \r
+  ## Include/Protocol/HttpUtilities.h\r
+  gEfiHttpUtilitiesProtocolGuid        = { 0x3e35c163, 0x4074, 0x45dd, {0x43, 0x1e, 0x23, 0x98, 0x9d, 0xd8, 0x6b, 0x32 }}\r
+\r
+  ## Include/Protocol/Tls.h\r
+  gEfiTlsServiceBindingProtocolGuid   = { 0x952cb795, 0xff36, 0x48cf, {0xa2, 0x49, 0x4d, 0xf4, 0x86, 0xd6, 0xab, 0x8d }}\r
+\r
+  ## Include/Protocol/Tls.h\r
+  gEfiTlsProtocolGuid                 = { 0xca959f, 0x6cfa, 0x4db1, {0x95, 0xbc, 0xe4, 0x6c, 0x47, 0x51, 0x43, 0x90 }}\r
+\r
+  ## Include/Protocol/TlsConfig.h\r
+  gEfiTlsConfigurationProtocolGuid    = { 0x1682fe44, 0xbd7a, 0x4407, { 0xb7, 0xc7, 0xdc, 0xa3, 0x7c, 0xa3, 0x92, 0x2d }}\r
+\r
   ## Include/Protocol/Rest.h\r
   gEfiRestProtocolGuid                 =  { 0x0db48a36, 0x4e54, 0xea9c, {0x9b, 0x09, 0x1e, 0xa5, 0xbe, 0x3a, 0x66, 0x0b }}\r
 \r
+  ## Include/Protocol/Supplicant.h\r
+  gEfiSupplicantServiceBindingProtocolGuid  = { 0x45bcd98e, 0x59ad, 0x4174, { 0x95, 0x46, 0x34, 0x4a, 0x7, 0x48, 0x58, 0x98 }}\r
+  gEfiSupplicantProtocolGuid                = { 0x54fcc43e, 0xaa89, 0x4333, { 0x9a, 0x85, 0xcd, 0xea, 0x24, 0x5, 0x1e, 0x9e }}\r
+\r
+  #\r
+  # Protocols defined in UEFI2.6\r
+  #\r
+  ## Include/Protocol/WiFi2.h\r
+  gEfiWiFi2ProtocolGuid                = { 0x1b0fb9bf, 0x699d, 0x4fdd, {0xa7, 0xc3, 0x25, 0x46, 0x68, 0x1b, 0xf6, 0x3b }}\r
+\r
+  ## Include/Protocol/RamDisk.h\r
+  gEfiRamDiskProtocolGuid              = { 0xab38a0df, 0x6873, 0x44a9, { 0x87, 0xe6, 0xd4, 0xeb, 0x56, 0x14, 0x84, 0x49 }}\r
+\r
+  ## Include/Protocol/ImageDecoder.h\r
+  gEfiHiiImageDecoderProtocolGuid      = { 0x9e66f251, 0x727c, 0x418c, { 0xbf, 0xd6, 0xc2, 0xb4, 0x25, 0x28, 0x18, 0xea }}\r
+\r
+  ## Include/Protocol/HiiImageEx.h\r
+  gEfiHiiImageExProtocolGuid           = { 0x1a1241e6, 0x8f19, 0x41a9, { 0xbc, 0xe,  0xe8, 0xef, 0x39, 0xe0, 0x65, 0x46 }}\r
+\r
+  ## Include/Protocol/SdMmcPassThru.h\r
+  gEfiSdMmcPassThruProtocolGuid        = { 0x716ef0d9, 0xff83, 0x4f69, {0x81, 0xe9, 0x51, 0x8b, 0xd3, 0x9a, 0x8e, 0x70 }}\r
+\r
+  ## Include/Protocol/EraseBlock.h\r
+  gEfiEraseBlockProtocolGuid           = { 0x95a9a93e, 0xa86e, 0x4926, {0xaa, 0xef, 0x99, 0x18, 0xe7, 0x72, 0xd9, 0x87 }}\r
+\r
+  #\r
+  # Protocols defined in UEFI2.7\r
+  #\r
+  ## Include/Protocol/BluetoothAttribute.h\r
+  gEfiBluetoothAttributeProtocolGuid        = { 0x898890e9, 0x84b2, 0x4f3a, { 0x8c, 0x58, 0xd8, 0x57, 0x78, 0x13, 0xe0, 0xac } }\r
+  gEfiBluetoothAttributeServiceBindingProtocolGuid = { 0x5639867a, 0x8c8e, 0x408d, {0xac, 0x2f, 0x4b, 0x61, 0xbd, 0xc0, 0xbb, 0xbb }}\r
+\r
+  ## Include/Protocol/BluetoothLeConfig.h\r
+  gEfiBluetoothLeConfigProtocolGuid         = { 0x8f76da58, 0x1f99, 0x4275, { 0xa4, 0xec, 0x47, 0x56, 0x51, 0x5b, 0x1c, 0xe8 } }\r
+\r
+  ## Include/Protocol/UfsDeviceConfig.h\r
+  gEfiUfsDeviceConfigProtocolGuid           = { 0xb81bfab0, 0xeb3, 0x4cf9, { 0x84, 0x65, 0x7f, 0xa9, 0x86, 0x36, 0x16, 0x64 }}\r
+\r
+  ## Include/Protocol/HttpBootCallback.h\r
+  gEfiHttpBootCallbackProtocolGuid   = {0xba23b311, 0x343d, 0x11e6, {0x91, 0x85, 0x58, 0x20, 0xb1, 0xd6, 0x52, 0x99}}\r
+\r
+  ## Include/Protocol/ResetNotification.h\r
+  gEfiResetNotificationProtocolGuid         = { 0x9da34ae0, 0xeaf9, 0x4bbf, { 0x8e, 0xc3, 0xfd, 0x60, 0x22, 0x6c, 0x44, 0xbe } }\r
+\r
+  ## Include/Protocol/PartitionInfo.h\r
+  gEfiPartitionInfoProtocolGuid             = { 0x8cf2f62c, 0xbc9b, 0x4821, { 0x80, 0x8d, 0xec, 0x9e, 0xc4, 0x21, 0xa1, 0xa0 }}\r
+\r
+  ## Include/Protocol/HiiPopup.h\r
+  gEfiHiiPopupProtocolGuid                  = { 0x4311edc0, 0x6054, 0x46d4, { 0x9e, 0x40, 0x89, 0x3e, 0xa9, 0x52, 0xfc, 0xcc }}\r
+\r
+  ## Include/Protocol/NvdimmLabel.h\r
+  gEfiNvdimmLabelProtocolGuid               = { 0xd40b6b80, 0x97d5, 0x4282, { 0xbb, 0x1d, 0x22, 0x3a, 0x16, 0x91, 0x80, 0x58 }}\r
+\r
+  #\r
+  # Protocols defined in Shell2.0\r
+  #\r
+  ## Include/Protocol/Shell.h\r
+  gEfiShellProtocolGuid                = { 0x6302d008, 0x7f9b, 0x4f30, {0x87, 0xac, 0x60, 0xc9, 0xfe, 0xf5, 0xda, 0x4e }}\r
+\r
+  ## Include/Protocol/ShellParameters.h\r
+  gEfiShellParametersProtocolGuid      = { 0x752f3136, 0x4e16, 0x4fdc, {0xa2, 0x2a, 0xe5, 0xf4, 0x68, 0x12, 0xf4, 0xca }}\r
+\r
+  #\r
+  # Protocols defined in Shell2.1\r
+  #\r
+  ## Include/Protocol/ShellDynamicCommand.h\r
+  gEfiShellDynamicCommandProtocolGuid  = { 0x3c7200e9, 0x005f, 0x4ea4, {0x87, 0xde, 0xa3, 0xdf, 0xac, 0x8a, 0x27, 0xc3 }}\r
+\r
 #\r
 # [Error.gEfiMdePkgTokenSpaceGuid]\r
 #   0x80000001 | Invalid value provided.\r
 \r
   ## The mask is used to control PerformanceLib behavior.<BR><BR>\r
   #  BIT0 - Enable Performance Measurement.<BR>\r
+  #  BIT1 - Disable Start Image Logging.<BR>\r
+  #  BIT2 - Disable Load Image logging.<BR>\r
+  #  BIT3 - Disable Binding Support logging.<BR>\r
+  #  BIT4 - Disable Binding Start logging.<BR>\r
+  #  BIT5 - Disable Binding Stop logging.<BR>\r
+  #  BIT6 - Disable all other general Perfs.<BR>\r
+  #  BIT1-BIT6 are evaluated when BIT0 is set.<BR>\r
   # @Prompt Performance Measurement Property.\r
-  # @Expression  0x80000002 | (gEfiMdePkgTokenSpaceGuid.PcdPerformanceLibraryPropertyMask & 0xFE) == 0\r
+  # @Expression  0x80000002 | (gEfiMdePkgTokenSpaceGuid.PcdPerformanceLibraryPropertyMask & 0x80) == 0\r
   gEfiMdePkgTokenSpaceGuid.PcdPerformanceLibraryPropertyMask|0|UINT8|0x00000009\r
 \r
   ## The mask is used to control PostCodeLib behavior.<BR><BR>\r
   # @Expression  0x80000002 | (gEfiMdePkgTokenSpaceGuid.PcdPostCodePropertyMask & 0xFC) == 0\r
   gEfiMdePkgTokenSpaceGuid.PcdPostCodePropertyMask|0|UINT8|0x0000000b\r
 \r
+  ## The bit width of data to be written to Port80. The default value is 8.\r
+  # @Prompt Port80 Data Width\r
+  # @ValidList  0x80000001 | 8, 16, 32\r
+  gEfiMdePkgTokenSpaceGuid.PcdPort80DataWidth|8|UINT8|0x0000002d\r
+\r
   ## This value is used to configure X86 Processor FSB clock.\r
   # @Prompt FSB Clock.\r
   gEfiMdePkgTokenSpaceGuid.PcdFSBClock|200000000|UINT32|0x0000000c\r
   # @ValidRange 0x80000001 | 0 - 4\r
   gEfiMdePkgTokenSpaceGuid.PcdDefaultTerminalType|0|UINT8|0x00000024\r
 \r
+  ## Indicates the receive FIFO depth of UART controller.<BR><BR>\r
+  # @Prompt Default UART Receive FIFO Depth.\r
+  gEfiMdePkgTokenSpaceGuid.PcdUartDefaultReceiveFifoDepth|1|UINT16|0x00000030\r
+\r
   ## Error level for hardware recorder.\r
   #  If value 0, platform does not support feature of hardware error record.\r
   # @Prompt Error Level For Hardware Recorder\r