// It also provides the definitions(including PPIs/PROTOCOLs/GUIDs) of\r
// EFI1.10/UEFI2.4/PI1.3 and some Industry Standards.\r
//\r
-// Copyright (c) 2007 - 2015, Intel Corporation. All rights reserved.<BR>\r
+// Copyright (c) 2007 - 2016, Intel Corporation. All rights reserved.<BR>\r
// Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r
//\r
// This program and the accompanying materials are licensed and made available under\r
\r
#string STR_gEfiMdePkgTokenSpaceGuid_PcdPerformanceLibraryPropertyMask_HELP #language en-US "The mask is used to control PerformanceLib behavior.<BR><BR>\n"\r
"BIT0 - Enable Performance Measurement.<BR>"\r
+ "BIT1 - Disable Start Image Logging.<BR>"\r
+ "BIT2 - Disable Load Image logging.<BR>"\r
+ "BIT3 - Disable Binding Support logging.<BR>"\r
+ "BIT4 - Disable Binding Start logging.<BR>"\r
+ "BIT5 - Disable Binding Stop logging.<BR>"\r
+ "BIT6 - Disable all other general Perfs.<BR>"\r
\r
#string STR_gEfiMdePkgTokenSpaceGuid_PcdPostCodePropertyMask_PROMPT #language en-US "Post Code Property"\r
\r
#string STR_gEfiMdePkgTokenSpaceGuid_PcdPort80DataWidth_PROMPT #language en-US "Port80 Data Width"\r
\r
#string STR_gEfiMdePkgTokenSpaceGuid_PcdPort80DataWidth_HELP #language en-US "The bit width of data to be written to Port80. The default value is 8. "\r
+\r
+#string STR_gEfiMdePkgTokenSpaceGuid_PcdUartDefaultReceiveFifoDepth_PROMPT #language en-US "Default UART Receive FIFO Depth."\r
+\r
+#string STR_gEfiMdePkgTokenSpaceGuid_PcdUartDefaultReceiveFifoDepth_HELP #language en-US "Indicates the receive FIFO depth of UART controller.<BR><BR>"\r
+\r