Update USB init code to do a softreset.

[mirror_edk2.git] / Omap35xxPkg / PciEmulation / PciEmulation.c

diff --git a/Omap35xxPkg/PciEmulation/PciEmulation.c b/Omap35xxPkg/PciEmulation/PciEmulation.c
index fa44570b4c0453f702e4052c9ba0588b8e159533..3e49f8a1bc93042f14415ca3f8863b2d14980950 100644 (file)
--- a/Omap35xxPkg/PciEmulation/PciEmulation.c
+++ b/Omap35xxPkg/PciEmulation/PciEmulation.c
@@ -62,13 +62,19 @@ ConfigureUSBHost (
   EFI_STATUS Status;
   UINT8      Data = 0;
 
+  // Do a softreset 
+  MmioOr32 (UHH_SYSCONFIG, UHH_SYSCONFIG_SOFTRESET);
+  // When the bit clears reset is complete
+  while ((MmioRead32 (UHH_SYSCONFIG) & UHH_SYSCONFIG_SOFTRESET) == UHH_SYSCONFIG_SOFTRESET);
+
+
   // Take USB host out of force-standby mode
-  MmioWrite32(UHH_SYSCONFIG, UHH_SYSCONFIG_MIDLEMODE_NO_STANDBY
+  MmioWrite32 (UHH_SYSCONFIG, UHH_SYSCONFIG_MIDLEMODE_NO_STANDBY
                              | UHH_SYSCONFIG_CLOCKACTIVITY_ON
                              | UHH_SYSCONFIG_SIDLEMODE_NO_STANDBY
                              | UHH_SYSCONFIG_ENAWAKEUP_ENABLE    
                              | UHH_SYSCONFIG_AUTOIDLE_ALWAYS_RUN);
-  MmioWrite32(UHH_HOSTCONFIG, UHH_HOSTCONFIG_P3_CONNECT_STATUS_DISCONNECT
+  MmioWrite32 (UHH_HOSTCONFIG, UHH_HOSTCONFIG_P3_CONNECT_STATUS_DISCONNECT
                               | UHH_HOSTCONFIG_P2_CONNECT_STATUS_DISCONNECT
                               | UHH_HOSTCONFIG_P1_CONNECT_STATUS_DISCONNECT
                               | UHH_HOSTCONFIG_ENA_INCR_ALIGN_DISABLE      
@@ -80,7 +86,7 @@ ConfigureUSBHost (
 
   // USB reset (GPIO 147 - Port 5 pin 19) output high
   MmioAnd32(GPIO5_BASE + GPIO_OE, ~BIT19);
-  MmioWrite32(GPIO5_BASE + GPIO_SETDATAOUT, BIT19);
+  MmioWrite32 (GPIO5_BASE + GPIO_SETDATAOUT, BIT19);
 
   // Get the Power IC protocol.
   Status = gBS->LocateProtocol(&gEmbeddedExternalDeviceProtocolGuid, NULL, (VOID **)&gTPS65950);