--- /dev/null
+/** @file\r
+ Define the FIRST_SMI_HANDLER_CONTEXT structure, which is an exchange area\r
+ between the SMM Monarch and the hot-added CPU, for relocating the SMBASE of\r
+ the hot-added CPU.\r
+\r
+ Copyright (c) 2020, Red Hat, Inc.\r
+\r
+ SPDX-License-Identifier: BSD-2-Clause-Patent\r
+**/\r
+\r
+#ifndef FIRST_SMI_HANDLER_CONTEXT_H_\r
+#define FIRST_SMI_HANDLER_CONTEXT_H_\r
+\r
+//\r
+// The following structure is used to communicate between the SMM Monarch\r
+// (running the root MMI handler) and the hot-added CPU (handling its first\r
+// SMI). It is placed at SMM_DEFAULT_SMBASE, which is in SMRAM under QEMU's\r
+// "SMRAM at default SMBASE" feature.\r
+//\r
+#pragma pack (1)\r
+typedef struct {\r
+ //\r
+ // When ApicIdGate is MAX_UINT64, then no hot-added CPU may proceed with\r
+ // SMBASE relocation.\r
+ //\r
+ // Otherwise, the hot-added CPU whose APIC ID equals ApicIdGate may proceed\r
+ // with SMBASE relocation.\r
+ //\r
+ // This field is intentionally wider than APIC_ID (UINT32) because we need a\r
+ // "gate locked" value that is different from all possible APIC_IDs.\r
+ //\r
+ UINT64 ApicIdGate;\r
+ //\r
+ // The new SMBASE value for the hot-added CPU to set in the SMRAM Save State\r
+ // Map, before leaving SMM with the RSM instruction.\r
+ //\r
+ UINT32 NewSmbase;\r
+ //\r
+ // The hot-added CPU sets this field to 1 right before executing the RSM\r
+ // instruction. This tells the SMM Monarch to proceed to polling the last\r
+ // byte of the normal RAM reserved page (Post-SMM Pen).\r
+ //\r
+ UINT8 AboutToLeaveSmm;\r
+} FIRST_SMI_HANDLER_CONTEXT;\r
+#pragma pack ()\r
+\r
+#endif // FIRST_SMI_HANDLER_CONTEXT_H_\r