--- /dev/null
+/** @file\r
+ Defines the defitions used by TDX in OvmfPkg.\r
+\r
+ Copyright (c) 2020 - 2021, Intel Corporation. All rights reserved.<BR>\r
+ SPDX-License-Identifier: BSD-2-Clause-Patent\r
+\r
+**/\r
+\r
+#ifndef OVMF_INTEL_TDX_H_\r
+#define OVMF_INTEL_TDX_H_\r
+\r
+#include <PiPei.h>\r
+#include <Library/BaseLib.h>\r
+#include <Uefi/UefiSpec.h>\r
+#include <Uefi/UefiBaseType.h>\r
+\r
+#define MP_CPU_PROTECTED_MODE_MAILBOX_APICID_INVALID 0xFFFFFFFF\r
+#define MP_CPU_PROTECTED_MODE_MAILBOX_APICID_BROADCAST 0xFFFFFFFE\r
+\r
+typedef enum {\r
+ MpProtectedModeWakeupCommandNoop = 0,\r
+ MpProtectedModeWakeupCommandWakeup = 1,\r
+ MpProtectedModeWakeupCommandSleep = 2,\r
+ MpProtectedModeWakeupCommandAcceptPages = 3,\r
+} MP_CPU_PROTECTED_MODE_WAKEUP_CMD;\r
+\r
+#pragma pack(1)\r
+\r
+//\r
+// Describes the CPU MAILBOX control structure use to\r
+// wakeup cpus spinning in long mode\r
+//\r
+typedef struct {\r
+ UINT16 Command;\r
+ UINT16 Resv;\r
+ UINT32 ApicId;\r
+ UINT64 WakeUpVector;\r
+ UINT8 ResvForOs[2032];\r
+ //\r
+ // Arguments available for wakeup code\r
+ //\r
+ UINT64 WakeUpArgs1;\r
+ UINT64 WakeUpArgs2;\r
+ UINT64 WakeUpArgs3;\r
+ UINT64 WakeUpArgs4;\r
+ UINT8 Pad1[0xe0];\r
+ UINT64 NumCpusArriving;\r
+ UINT8 Pad2[0xf8];\r
+ UINT64 NumCpusExiting;\r
+ UINT32 Tallies[256];\r
+ UINT8 Errors[256];\r
+ UINT8 Pad3[0xf8];\r
+} MP_WAKEUP_MAILBOX;\r
+\r
+//\r
+// AP relocation code information including code address and size,\r
+// this structure will be shared be C code and assembly code.\r
+// It is natural aligned by design.\r
+//\r
+typedef struct {\r
+ UINT8 *RelocateApLoopFuncAddress;\r
+ UINTN RelocateApLoopFuncSize;\r
+} MP_RELOCATION_MAP;\r
+\r
+#pragma pack()\r
+\r
+#endif\r