/**@file\r
Platform PEI driver\r
\r
- Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.<BR>\r
+ Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR>\r
Copyright (c) 2011, Andrei Warkentin <andreiw@motorola.com>\r
\r
This program and the accompanying materials\r
};\r
\r
\r
+EFI_BOOT_MODE mBootMode = BOOT_WITH_FULL_CONFIGURATION;\r
+\r
+\r
VOID\r
AddIoMemoryBaseSizeHob (\r
EFI_PHYSICAL_ADDRESS MemoryBase,\r
AddUntestedMemoryBaseSizeHob (MemoryBase, (UINT64)(MemoryLimit - MemoryBase));\r
}\r
\r
-\r
VOID\r
MemMapInitialization (\r
- EFI_PHYSICAL_ADDRESS TopOfMemory\r
+ VOID\r
)\r
{\r
//\r
//\r
AddIoMemoryRangeHob (0x0A0000, BASE_1MB);\r
\r
- //\r
- // address purpose size\r
- // ------------ -------- -------------------------\r
- // max(top, 2g) PCI MMIO 0xFC000000 - max(top, 2g)\r
- // 0xFC000000 gap 44 MB\r
- // 0xFEC00000 IO-APIC 4 KB\r
- // 0xFEC01000 gap 1020 KB\r
- // 0xFED00000 HPET 1 KB\r
- // 0xFED00400 gap 1023 KB\r
- // 0xFEE00000 LAPIC 1 MB\r
- //\r
- AddIoMemoryRangeHob (TopOfMemory < BASE_2GB ? BASE_2GB : TopOfMemory, 0xFC000000);\r
- AddIoMemoryBaseSizeHob (0xFEC00000, SIZE_4KB);\r
- AddIoMemoryBaseSizeHob (0xFED00000, SIZE_1KB);\r
- AddIoMemoryBaseSizeHob (PcdGet32(PcdCpuLocalApicBaseAddress), SIZE_1MB);\r
+ if (!mXen) {\r
+ UINT32 TopOfLowRam;\r
+ TopOfLowRam = GetSystemMemorySizeBelow4gb ();\r
+\r
+ //\r
+ // address purpose size\r
+ // ------------ -------- -------------------------\r
+ // max(top, 2g) PCI MMIO 0xFC000000 - max(top, 2g)\r
+ // 0xFC000000 gap 44 MB\r
+ // 0xFEC00000 IO-APIC 4 KB\r
+ // 0xFEC01000 gap 1020 KB\r
+ // 0xFED00000 HPET 1 KB\r
+ // 0xFED00400 gap 1023 KB\r
+ // 0xFEE00000 LAPIC 1 MB\r
+ //\r
+ AddIoMemoryRangeHob (TopOfLowRam < BASE_2GB ?\r
+ BASE_2GB : TopOfLowRam, 0xFC000000);\r
+ AddIoMemoryBaseSizeHob (0xFEC00000, SIZE_4KB);\r
+ AddIoMemoryBaseSizeHob (0xFED00000, SIZE_1KB);\r
+ AddIoMemoryBaseSizeHob (PcdGet32(PcdCpuLocalApicBaseAddress), SIZE_1MB);\r
+ }\r
}\r
\r
\r
\r
VOID\r
BootModeInitialization (\r
+ VOID\r
)\r
{\r
- EFI_STATUS Status;\r
+ EFI_STATUS Status;\r
\r
- Status = PeiServicesSetBootMode (BOOT_WITH_FULL_CONFIGURATION);\r
+ if (CmosRead8 (0xF) == 0xFE) {\r
+ mBootMode = BOOT_ON_S3_RESUME;\r
+ }\r
+\r
+ Status = PeiServicesSetBootMode (mBootMode);\r
ASSERT_EFI_ERROR (Status);\r
\r
Status = PeiServicesInstallPpi (mPpiBootMode);\r
//\r
VariableStore =\r
(EFI_PHYSICAL_ADDRESS)(UINTN)\r
- AllocateAlignedPages (\r
+ AllocateAlignedRuntimePages (\r
EFI_SIZE_TO_PAGES (2 * PcdGet32 (PcdFlashNvStorageFtwSpareSize)),\r
PcdGet32 (PcdFlashNvStorageFtwSpareSize)\r
);\r
IN CONST EFI_PEI_SERVICES **PeiServices\r
)\r
{\r
- EFI_PHYSICAL_ADDRESS TopOfMemory;\r
-\r
DEBUG ((EFI_D_ERROR, "Platform PEIM Loaded\n"));\r
\r
DebugDumpCmos ();\r
\r
- TopOfMemory = MemDetect ();\r
+ XenDetect ();\r
+\r
+ BootModeInitialization ();\r
+\r
+ PublishPeiMemory ();\r
+\r
+ InitializeRamRegions ();\r
\r
- InitializeXen ();\r
+ if (mXen) {\r
+ DEBUG ((EFI_D_INFO, "Xen was detected\n"));\r
+ InitializeXen ();\r
+ }\r
\r
ReserveEmuVariableNvStore ();\r
\r
PeiFvInitialization ();\r
\r
- MemMapInitialization (TopOfMemory);\r
+ MemMapInitialization ();\r
\r
MiscInitialization ();\r
\r
- BootModeInitialization ();\r
-\r
return EFI_SUCCESS;\r
}\r