PciBase = (TopOfLowRam < BASE_2GB) ? BASE_2GB : TopOfLowRam;\r
if (mHostBridgeDevId == INTEL_Q35_MCH_DEVICE_ID) {\r
//\r
- // The 32-bit PCI host aperture is expected to fall between the top of\r
- // low RAM and the base of the MMCONFIG area.\r
+ // The MMCONFIG area is expected to fall between the top of low RAM and\r
+ // the base of the 32-bit PCI host aperture.\r
//\r
PciExBarBase = FixedPcdGet64 (PcdPciExpressBaseAddress);\r
- ASSERT (PciBase < PciExBarBase);\r
+ ASSERT (TopOfLowRam <= PciExBarBase);\r
ASSERT (PciExBarBase <= MAX_UINT32 - SIZE_256MB);\r
- PciSize = (UINT32)(PciExBarBase - PciBase);\r
+ PciBase = (UINT32)(PciExBarBase + SIZE_256MB);\r
+ PciSize = 0xFC000000 - PciBase;\r
} else {\r
PciSize = 0xFC000000 - PciBase;\r
}\r