/**@file\r
This contains the installation function for the driver.\r
- \r
-Copyright (c) 2005 - 2008, Intel Corporation \r
-All rights reserved. This program and the accompanying materials \r
-are licensed and made available under the terms and conditions of the BSD License \r
-which accompanies this distribution. The full text of the license may be found at \r
-http://opensource.org/licenses/bsd-license.php \r
- \r
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
+\r
+Copyright (c) 2005 - 2009, Intel Corporation. All rights reserved.<BR>\r
+This program and the accompanying materials\r
+are licensed and made available under the terms and conditions of the BSD License\r
+which accompanies this distribution. The full text of the license may be found at\r
+http://opensource.org/licenses/bsd-license.php\r
+\r
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
\r
**/\r
\r
#include "8259.h"\r
\r
//\r
-// Global for the Legacy 8259 Protocol that is prodiced by this driver\r
+// Global for the Legacy 8259 Protocol that is produced by this driver\r
//\r
EFI_LEGACY_8259_PROTOCOL m8259 = {\r
Interrupt8259SetVectorBase,\r
UINT8 mSlaveBase = 0xff;\r
EFI_8259_MODE mMode = Efi8259ProtectedMode;\r
UINT16 mProtectedModeMask = 0xffff;\r
-UINT16 mLegacyModeMask = 0x06b8;\r
+UINT16 mLegacyModeMask = FixedPcdGet16(Pcd8259LegacyModeMask);\r
UINT16 mProtectedModeEdgeLevel = 0x0000;\r
-UINT16 mLegacyModeEdgeLevel = 0x0000;\r
+UINT16 mLegacyModeEdgeLevel = FixedPcdGet16(Pcd8259LegacyModeEdgeLevel);\r
\r
//\r
// Worker Functions\r
//\r
+\r
+/**\r
+ Write to mask and edge/level triggered registers of master and slave PICs.\r
+\r
+ @param[in] Mask low byte for master PIC mask register,\r
+ high byte for slave PIC mask register.\r
+ @param[in] EdgeLevel low byte for master PIC edge/level triggered register,\r
+ high byte for slave PIC edge/level triggered register.\r
+\r
+**/\r
VOID\r
Interrupt8259WriteMask (\r
IN UINT16 Mask,\r
IN UINT16 EdgeLevel\r
)\r
-/**\r
-\r
- Routine Description:\r
- Sets the 8250 mask to the valud specified by Mask\r
-\r
- Arguments:\r
- Mask - A 16 bit valute that represents the master and slave mask values\r
-\r
- Returns:\r
- None\r
-\r
-**/\r
-// TODO: EdgeLevel - add argument and description to function comment\r
{\r
IoWrite8 (LEGACY_8259_MASK_REGISTER_MASTER, (UINT8) Mask);\r
IoWrite8 (LEGACY_8259_MASK_REGISTER_SLAVE, (UINT8) (Mask >> 8));\r
IoWrite8 (LEGACY_8259_EDGE_LEVEL_TRIGGERED_REGISTER_SLAVE, (UINT8) (EdgeLevel >> 8));\r
}\r
\r
-VOID\r
-Interrupt8259ReadMask (\r
- IN UINT16 *Mask,\r
- IN UINT16 *EdgeLevel\r
- )\r
/**\r
+ Read from mask and edge/level triggered registers of master and slave PICs.\r
\r
- Routine Description:\r
- Sets the 8250 mask to the valud specified by Mask\r
-\r
- Arguments:\r
- Mask - A 16 bit valute that represents the master and slave mask values\r
-\r
- Returns:\r
- None\r
+ @param[out] Mask low byte for master PIC mask register,\r
+ high byte for slave PIC mask register.\r
+ @param[out] EdgeLevel low byte for master PIC edge/level triggered register,\r
+ high byte for slave PIC edge/level triggered register.\r
\r
**/\r
-// TODO: EdgeLevel - add argument and description to function comment\r
+VOID\r
+Interrupt8259ReadMask (\r
+ OUT UINT16 *Mask,\r
+ OUT UINT16 *EdgeLevel\r
+ )\r
{\r
UINT16 MasterValue;\r
UINT16 SlaveValue;\r
*EdgeLevel = (UINT16) (MasterValue | (SlaveValue << 8));\r
}\r
}\r
+\r
//\r
-// Legacy 8259 Protocol Interface Function\r
+// Legacy 8259 Protocol Interface Functions\r
//\r
-EFI_STATUS\r
-EFIAPI\r
-Interrupt8259SetVectorBase (\r
- IN EFI_LEGACY_8259_PROTOCOL *This,\r
- IN UINT8 MasterBase,\r
- IN UINT8 SlaveBase\r
- )\r
-/**\r
\r
- Routine Description:\r
- Sets the base vector for the 8250 Master and Slave interrupt controllers\r
+/**\r
+ Sets the base address for the 8259 master and slave PICs.\r
\r
- Arguments:\r
- This - Protocol instance pointer.\r
- MasterBase - Base vector of the 8259 Master\r
- SlaveBase - Base vector of the 8259 Slave\r
+ @param[in] This Indicates the EFI_LEGACY_8259_PROTOCOL instance.\r
+ @param[in] MasterBase Interrupt vectors for IRQ0-IRQ7.\r
+ @param[in] SlaveBase Interrupt vectors for IRQ8-IRQ15.\r
\r
- Returns:\r
- EFI_SUCCESS - 8259 programmed\r
+ @retval EFI_SUCCESS The 8259 PIC was programmed successfully.\r
+ @retval EFI_DEVICE_ERROR There was an error while writing to the 8259 PIC.\r
\r
**/\r
+EFI_STATUS\r
+EFIAPI\r
+Interrupt8259SetVectorBase (\r
+ IN EFI_LEGACY_8259_PROTOCOL *This,\r
+ IN UINT8 MasterBase,\r
+ IN UINT8 SlaveBase\r
+ )\r
{\r
UINT8 Mask;\r
\r
+ //\r
+ // Set vector base for slave PIC\r
+ //\r
if (SlaveBase != mSlaveBase) {\r
mSlaveBase = SlaveBase;\r
\r
//\r
- // Initialize Slave interrupt controller.\r
+ // Initialization sequence is needed for setting vector base.\r
+ //\r
+\r
+ //\r
+ // Preserve interrtup mask register before initialization sequence\r
+ // because it will be cleared during intialization\r
//\r
Mask = IoRead8 (LEGACY_8259_MASK_REGISTER_SLAVE);\r
+\r
+ //\r
+ // ICW1: cascade mode, ICW4 write required\r
+ //\r
IoWrite8 (LEGACY_8259_CONTROL_REGISTER_SLAVE, 0x11);\r
+\r
+ //\r
+ // ICW2: new vector base (must be multiple of 8)\r
+ //\r
IoWrite8 (LEGACY_8259_MASK_REGISTER_SLAVE, mSlaveBase);\r
+\r
+ //\r
+ // ICW3: slave indentification code must be 2\r
+ //\r
IoWrite8 (LEGACY_8259_MASK_REGISTER_SLAVE, 0x02);\r
+\r
+ //\r
+ // ICW4: fully nested mode, non-buffered mode, normal EOI, IA processor\r
+ //\r
IoWrite8 (LEGACY_8259_MASK_REGISTER_SLAVE, 0x01);\r
+\r
+ //\r
+ // Restore interrupt mask register\r
+ //\r
IoWrite8 (LEGACY_8259_MASK_REGISTER_SLAVE, Mask);\r
}\r
\r
+ //\r
+ // Set vector base for master PIC\r
+ //\r
if (MasterBase != mMasterBase) {\r
mMasterBase = MasterBase;\r
\r
//\r
- // Initialize Master interrupt controller.\r
+ // Initialization sequence is needed for setting vector base.\r
+ //\r
+\r
+ //\r
+ // Preserve interrtup mask register before initialization sequence\r
+ // because it will be cleared during intialization\r
//\r
Mask = IoRead8 (LEGACY_8259_MASK_REGISTER_MASTER);\r
+\r
+ //\r
+ // ICW1: cascade mode, ICW4 write required\r
+ //\r
IoWrite8 (LEGACY_8259_CONTROL_REGISTER_MASTER, 0x11);\r
+\r
+ //\r
+ // ICW2: new vector base (must be multiple of 8)\r
+ //\r
IoWrite8 (LEGACY_8259_MASK_REGISTER_MASTER, mMasterBase);\r
+\r
+ //\r
+ // ICW3: slave PIC is cascaded on IRQ2\r
+ //\r
IoWrite8 (LEGACY_8259_MASK_REGISTER_MASTER, 0x04);\r
+\r
+ //\r
+ // ICW4: fully nested mode, non-buffered mode, normal EOI, IA processor\r
+ //\r
IoWrite8 (LEGACY_8259_MASK_REGISTER_MASTER, 0x01);\r
+\r
+ //\r
+ // Restore interrupt mask register\r
+ //\r
IoWrite8 (LEGACY_8259_MASK_REGISTER_MASTER, Mask);\r
}\r
\r
- IoWrite8 (LEGACY_8259_CONTROL_REGISTER_SLAVE, 0x20);\r
- IoWrite8 (LEGACY_8259_CONTROL_REGISTER_MASTER, 0x20);\r
+ IoWrite8 (LEGACY_8259_CONTROL_REGISTER_SLAVE, LEGACY_8259_EOI);\r
+ IoWrite8 (LEGACY_8259_CONTROL_REGISTER_MASTER, LEGACY_8259_EOI);\r
\r
return EFI_SUCCESS;\r
}\r
\r
+/**\r
+ Gets the current 16-bit real mode and 32-bit protected-mode IRQ masks.\r
+\r
+ @param[in] This Indicates the EFI_LEGACY_8259_PROTOCOL instance.\r
+ @param[out] LegacyMask 16-bit mode interrupt mask for IRQ0-IRQ15.\r
+ @param[out] LegacyEdgeLevel 16-bit mode edge/level mask for IRQ-IRQ15.\r
+ @param[out] ProtectedMask 32-bit mode interrupt mask for IRQ0-IRQ15.\r
+ @param[out] ProtectedEdgeLevel 32-bit mode edge/level mask for IRQ0-IRQ15.\r
+\r
+ @retval EFI_SUCCESS The 8259 PIC was programmed successfully.\r
+ @retval EFI_DEVICE_ERROR There was an error while reading the 8259 PIC.\r
+\r
+**/\r
EFI_STATUS\r
EFIAPI\r
Interrupt8259GetMask (\r
- IN EFI_LEGACY_8259_PROTOCOL * This,\r
+ IN EFI_LEGACY_8259_PROTOCOL *This,\r
OUT UINT16 *LegacyMask, OPTIONAL\r
OUT UINT16 *LegacyEdgeLevel, OPTIONAL\r
OUT UINT16 *ProtectedMask, OPTIONAL\r
OUT UINT16 *ProtectedEdgeLevel OPTIONAL\r
)\r
-/**\r
-\r
- Routine Description:\r
- Get the 8259 master and slave address that maps IRQ to processor interrupt \r
- vector number. Get the Context of the device including the state of the\r
- interrupt mask.\r
-\r
- Arguments:\r
- This - Protocol instance pointer.\r
-\r
- Returns:\r
- EFI_SUCCESS - 8259 programmed\r
- EFI_DEVICE_ERROR - Error writting to 8259\r
-\r
-**/\r
-// TODO: LegacyMask - add argument and description to function comment\r
-// TODO: LegacyEdgeLevel - add argument and description to function comment\r
-// TODO: ProtectedMask - add argument and description to function comment\r
-// TODO: ProtectedEdgeLevel - add argument and description to function comment\r
{\r
if (LegacyMask != NULL) {\r
*LegacyMask = mLegacyModeMask;\r
return EFI_SUCCESS;\r
}\r
\r
-EFI_STATUS\r
-EFIAPI\r
-Interrupt8259SetMask (\r
- IN EFI_LEGACY_8259_PROTOCOL * This,\r
- IN UINT16 *LegacyMask, OPTIONAL\r
- IN UINT16 *LegacyEdgeLevel, OPTIONAL\r
- IN UINT16 *ProtectedMask, OPTIONAL\r
- IN UINT16 *ProtectedEdgeLevel OPTIONAL\r
- )\r
/**\r
+ Sets the current 16-bit real mode and 32-bit protected-mode IRQ masks.\r
\r
- Routine Description:\r
- Set the 8259 interrupt and edge/level masks for legacy and/or protected \r
- mode operation. This routine does not touch the hardware but only the\r
- RAM copies of the masks.\r
-\r
- Arguments:\r
- This - Protocol instance pointer.\r
+ @param[in] This Indicates the EFI_LEGACY_8259_PROTOCOL instance.\r
+ @param[in] LegacyMask 16-bit mode interrupt mask for IRQ0-IRQ15.\r
+ @param[in] LegacyEdgeLevel 16-bit mode edge/level mask for IRQ-IRQ15.\r
+ @param[in] ProtectedMask 32-bit mode interrupt mask for IRQ0-IRQ15.\r
+ @param[in] ProtectedEdgeLevel 32-bit mode edge/level mask for IRQ0-IRQ15.\r
\r
- Returns:\r
- EFI_SUCCESS - 8259 masks updated\r
+ @retval EFI_SUCCESS The 8259 PIC was programmed successfully.\r
+ @retval EFI_DEVICE_ERROR There was an error while writing the 8259 PIC.\r
\r
**/\r
-// TODO: LegacyMask - add argument and description to function comment\r
-// TODO: LegacyEdgeLevel - add argument and description to function comment\r
-// TODO: ProtectedMask - add argument and description to function comment\r
-// TODO: ProtectedEdgeLevel - add argument and description to function comment\r
+EFI_STATUS\r
+EFIAPI\r
+Interrupt8259SetMask (\r
+ IN EFI_LEGACY_8259_PROTOCOL *This,\r
+ IN UINT16 *LegacyMask, OPTIONAL\r
+ IN UINT16 *LegacyEdgeLevel, OPTIONAL\r
+ IN UINT16 *ProtectedMask, OPTIONAL\r
+ IN UINT16 *ProtectedEdgeLevel OPTIONAL\r
+ )\r
{\r
if (LegacyMask != NULL) {\r
mLegacyModeMask = *LegacyMask;\r
return EFI_SUCCESS;\r
}\r
\r
-EFI_STATUS\r
-EFIAPI\r
-Interrupt8259SetMode (\r
- IN EFI_LEGACY_8259_PROTOCOL * This,\r
- IN EFI_8259_MODE Mode,\r
- IN UINT16 *Mask, OPTIONAL\r
- IN UINT16 *EdgeLevel OPTIONAL\r
- )\r
/**\r
+ Sets the mode of the PICs.\r
\r
- Routine Description:\r
- Set the 8259 master and slave address that maps IRQ to processor interrupt \r
- vector number. Restore the Context of the device, so that the interrupt\r
- mask is put back in it's previous mode.\r
-\r
- Arguments:\r
- This - Protocol instance pointer.\r
- Mode - \r
- Mask -\r
+ @param[in] This Indicates the EFI_LEGACY_8259_PROTOCOL instance.\r
+ @param[in] Mode 16-bit real or 32-bit protected mode.\r
+ @param[in] Mask The value with which to set the interrupt mask.\r
+ @param[in] EdgeLevel The value with which to set the edge/level mask.\r
\r
- Returns:\r
- EFI_SUCCESS - 8259 programmed\r
- EFI_DEVICE_ERROR - Error writting to 8259\r
+ @retval EFI_SUCCESS The mode was set successfully.\r
+ @retval EFI_INVALID_PARAMETER The mode was not set.\r
\r
**/\r
-// TODO: EdgeLevel - add argument and description to function comment\r
-// TODO: EFI_INVALID_PARAMETER - add return value to function comment\r
+EFI_STATUS\r
+EFIAPI\r
+Interrupt8259SetMode (\r
+ IN EFI_LEGACY_8259_PROTOCOL *This,\r
+ IN EFI_8259_MODE Mode,\r
+ IN UINT16 *Mask, OPTIONAL\r
+ IN UINT16 *EdgeLevel OPTIONAL\r
+ )\r
{\r
if (Mode == mMode) {\r
return EFI_SUCCESS;\r
\r
if (Mode == Efi8259LegacyMode) {\r
//\r
- // Save the protected mode mask\r
+ // In Efi8259ProtectedMode, mask and edge/level trigger registers should\r
+ // be changed through this protocol, so we can track them in the\r
+ // corresponding module variables.\r
//\r
Interrupt8259ReadMask (&mProtectedModeMask, &mProtectedModeEdgeLevel);\r
\r
mMode = Mode;\r
\r
//\r
- // Set 8259 Vector Base\r
- //\r
- //\r
- Interrupt8259SetVectorBase (This, LEGACY_MODE_BASE_VECTOR_MASTER, LEGACY_MODE_BASE_VECTOR_SLAVE);\r
-\r
- //\r
- // Enable Interrupts\r
+ // Write new legacy mode mask/trigger level\r
//\r
Interrupt8259WriteMask (mLegacyModeMask, mLegacyModeEdgeLevel);\r
\r
\r
if (Mode == Efi8259ProtectedMode) {\r
//\r
- // Save the legacy mode mask\r
+ // Save the legacy mode mask/trigger level\r
//\r
Interrupt8259ReadMask (&mLegacyModeMask, &mLegacyModeEdgeLevel);\r
//\r
mMode = Mode;\r
\r
//\r
- // Set 8259 Vector Base\r
- //\r
- //\r
- Interrupt8259SetVectorBase (This, PROTECTED_MODE_BASE_VECTOR_MASTER, PROTECTED_MODE_BASE_VECTOR_SLAVE);\r
-\r
- //\r
- // Enable Interrupts\r
+ // Write new protected mode mask/trigger level\r
//\r
Interrupt8259WriteMask (mProtectedModeMask, mProtectedModeEdgeLevel);\r
\r
return EFI_INVALID_PARAMETER;\r
}\r
\r
+/**\r
+ Translates the IRQ into a vector.\r
+\r
+ @param[in] This Indicates the EFI_LEGACY_8259_PROTOCOL instance.\r
+ @param[in] Irq IRQ0-IRQ15.\r
+ @param[out] Vector The vector that is assigned to the IRQ.\r
+\r
+ @retval EFI_SUCCESS The Vector that matches Irq was returned.\r
+ @retval EFI_INVALID_PARAMETER Irq is not valid.\r
+\r
+**/\r
EFI_STATUS\r
EFIAPI\r
Interrupt8259GetVector (\r
IN EFI_8259_IRQ Irq,\r
OUT UINT8 *Vector\r
)\r
-/**\r
-\r
- Routine Description:\r
- Convert from IRQ to processor interrupt vector number.\r
-\r
- Arguments:\r
- This - Protocol instance pointer.\r
- Irq - 8259 IRQ0 - IRQ15\r
- Vector - Processor vector number that matches Irq\r
-\r
- Returns:\r
- EFI_SUCCESS - The Vector matching Irq is returned\r
- EFI_INVALID_PARAMETER - Irq not valid\r
-\r
-**/\r
{\r
if (Irq < Efi8259Irq0 || Irq > Efi8259Irq15) {\r
return EFI_INVALID_PARAMETER;\r
return EFI_SUCCESS;\r
}\r
\r
-EFI_STATUS\r
-EFIAPI\r
-Interrupt8259EnableIrq (\r
- IN EFI_LEGACY_8259_PROTOCOL *This,\r
- IN EFI_8259_IRQ Irq,\r
- IN BOOLEAN LevelTriggered\r
- )\r
/**\r
+ Enables the specified IRQ.\r
\r
- Routine Description:\r
- Enable Irq by unmasking interrupt in 8259\r
-\r
- Arguments:\r
- This - Protocol instance pointer.\r
- Irq - 8259 IRQ0 - IRQ15\r
+ @param[in] This Indicates the EFI_LEGACY_8259_PROTOCOL instance.\r
+ @param[in] Irq IRQ0-IRQ15.\r
+ @param[in] LevelTriggered 0 = Edge triggered; 1 = Level triggered.\r
\r
- Returns:\r
- EFI_SUCCESS - Irq enabled on 8259\r
- EFI_INVALID_PARAMETER - Irq not valid\r
+ @retval EFI_SUCCESS The Irq was enabled on the 8259 PIC.\r
+ @retval EFI_INVALID_PARAMETER The Irq is not valid.\r
\r
**/\r
-// TODO: LevelTriggered - add argument and description to function comment\r
+EFI_STATUS\r
+EFIAPI\r
+Interrupt8259EnableIrq (\r
+ IN EFI_LEGACY_8259_PROTOCOL *This,\r
+ IN EFI_8259_IRQ Irq,\r
+ IN BOOLEAN LevelTriggered\r
+ )\r
{\r
if (Irq < Efi8259Irq0 || Irq > Efi8259Irq15) {\r
return EFI_INVALID_PARAMETER;\r
return EFI_SUCCESS;\r
}\r
\r
-EFI_STATUS\r
-EFIAPI\r
-Interrupt8259DisableIrq (\r
- IN EFI_LEGACY_8259_PROTOCOL *This,\r
- IN EFI_8259_IRQ Irq\r
- )\r
/**\r
+ Disables the specified IRQ.\r
\r
- Routine Description:\r
- Disable Irq by masking interrupt in 8259\r
+ @param[in] This Indicates the EFI_LEGACY_8259_PROTOCOL instance.\r
+ @param[in] Irq IRQ0-IRQ15.\r
\r
- Arguments:\r
- This - Protocol instance pointer.\r
- Irq - 8259 IRQ0 - IRQ15\r
-\r
- Returns:\r
- EFI_SUCCESS - Irq disabled on 8259\r
- EFI_INVALID_PARAMETER - Irq not valid\r
+ @retval EFI_SUCCESS The Irq was disabled on the 8259 PIC.\r
+ @retval EFI_INVALID_PARAMETER The Irq is not valid.\r
\r
**/\r
+EFI_STATUS\r
+EFIAPI\r
+Interrupt8259DisableIrq (\r
+ IN EFI_LEGACY_8259_PROTOCOL *This,\r
+ IN EFI_8259_IRQ Irq\r
+ )\r
{\r
if (Irq < Efi8259Irq0 || Irq > Efi8259Irq15) {\r
return EFI_INVALID_PARAMETER;\r
}\r
\r
- mProtectedModeMask = (UINT16) (mProtectedModeMask | (1 << Irq));\r
+ mProtectedModeMask = (UINT16) (mProtectedModeMask | (1 << Irq));\r
+\r
mProtectedModeEdgeLevel = (UINT16) (mProtectedModeEdgeLevel & ~(1 << Irq));\r
\r
Interrupt8259WriteMask (mProtectedModeMask, mProtectedModeEdgeLevel);\r
return EFI_SUCCESS;\r
}\r
\r
+/**\r
+ Reads the PCI configuration space to get the interrupt number that is assigned to the card.\r
+\r
+ @param[in] This Indicates the EFI_LEGACY_8259_PROTOCOL instance.\r
+ @param[in] PciHandle PCI function for which to return the vector.\r
+ @param[out] Vector IRQ number that corresponds to the interrupt line.\r
+\r
+ @retval EFI_SUCCESS The interrupt line value was read successfully.\r
+\r
+**/\r
EFI_STATUS\r
EFIAPI\r
Interrupt8259GetInterruptLine (\r
IN EFI_HANDLE PciHandle,\r
OUT UINT8 *Vector\r
)\r
-/**\r
-\r
- Routine Description:\r
- PciHandle represents a PCI config space of a PCI function. Vector \r
- represents Interrupt Pin (from PCI config space) and it is the data\r
- that is programmed into the Interrupt Line (from the PCI config space)\r
- register.\r
-\r
- Arguments:\r
- This - Protocol instance pointer.\r
- PciHandle - PCI function to return vector for \r
- Vector - Vector for fucntion that matches \r
+{\r
+ EFI_PCI_IO_PROTOCOL *PciIo;\r
+ UINT8 InterruptLine;\r
+ EFI_STATUS Status;\r
+\r
+ Status = gBS->HandleProtocol (\r
+ PciHandle,\r
+ &gEfiPciIoProtocolGuid,\r
+ (VOID **) &PciIo\r
+ );\r
+ if (EFI_ERROR (Status)) {\r
+ return EFI_INVALID_PARAMETER;\r
+ }\r
\r
- Returns:\r
- EFI_SUCCESS - A valid Vector is returned\r
- EFI_INVALID_PARAMETER - PciHandle not valid\r
+ PciIo->Pci.Read (\r
+ PciIo,\r
+ EfiPciIoWidthUint8,\r
+ PCI_INT_LINE_OFFSET,\r
+ 1,\r
+ &InterruptLine\r
+ );\r
+ //\r
+ // Interrupt line is same location for standard PCI cards, standard\r
+ // bridge and CardBus bridge.\r
+ //\r
+ *Vector = InterruptLine;\r
\r
-**/\r
-{\r
- return EFI_UNSUPPORTED;\r
+ return EFI_SUCCESS;\r
}\r
\r
-EFI_STATUS\r
-EFIAPI\r
-Interrupt8259EndOfInterrupt (\r
- IN EFI_LEGACY_8259_PROTOCOL *This,\r
- IN EFI_8259_IRQ Irq\r
- )\r
/**\r
+ Issues the End of Interrupt (EOI) commands to PICs.\r
\r
- Routine Description:\r
- Send an EOI to 8259\r
-\r
- Arguments:\r
- This - Protocol instance pointer.\r
- Irq - 8259 IRQ0 - IRQ15\r
+ @param[in] This Indicates the EFI_LEGACY_8259_PROTOCOL instance.\r
+ @param[in] Irq The interrupt for which to issue the EOI command.\r
\r
- Returns:\r
- EFI_SUCCESS - EOI successfully sent to 8259\r
- EFI_INVALID_PARAMETER - Irq not valid\r
+ @retval EFI_SUCCESS The EOI command was issued.\r
+ @retval EFI_INVALID_PARAMETER The Irq is not valid.\r
\r
**/\r
+EFI_STATUS\r
+EFIAPI\r
+Interrupt8259EndOfInterrupt (\r
+ IN EFI_LEGACY_8259_PROTOCOL *This,\r
+ IN EFI_8259_IRQ Irq\r
+ )\r
{\r
if (Irq < Efi8259Irq0 || Irq > Efi8259Irq15) {\r
return EFI_INVALID_PARAMETER;\r
return EFI_SUCCESS;\r
}\r
\r
-//\r
-// Legacy 8259 Driver Entry Point\r
-//\r
+/**\r
+ Driver Entry point.\r
+\r
+ @param[in] ImageHandle ImageHandle of the loaded driver.\r
+ @param[in] SystemTable Pointer to the EFI System Table.\r
+\r
+ @retval EFI_SUCCESS One or more of the drivers returned a success code.\r
+ @retval !EFI_SUCCESS Error installing Legacy 8259 Protocol.\r
+\r
+**/\r
EFI_STATUS\r
EFIAPI\r
Install8259 (\r
IN EFI_HANDLE ImageHandle,\r
IN EFI_SYSTEM_TABLE *SystemTable\r
)\r
-/**\r
-\r
-Routine Description:\r
- \r
-\r
-Arguments:\r
-\r
- (Standard EFI Image entry - EFI_IMAGE_ENTRY_POINT)\r
-\r
-Returns:\r
-\r
- EFI_SUCCESS - Legacy 8259 Protocol Installed\r
-\r
-**/\r
-// TODO: ImageHandle - add argument and description to function comment\r
-// TODO: SystemTable - add argument and description to function comment\r
{\r
EFI_STATUS Status;\r
EFI_8259_IRQ Irq;\r
);\r
return Status;\r
}\r
-\r
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