PcAtChipsetPkg: Define FixePCD's for RTC register values

[mirror_edk2.git] / PcAtChipsetPkg / 8259InterruptControllerDxe / 8259.c

diff --git a/PcAtChipsetPkg/8259InterruptControllerDxe/8259.c b/PcAtChipsetPkg/8259InterruptControllerDxe/8259.c
index ec23bd9396087535419a32d1751adcd1751fedd6..7d8265dbd1da59885114e7e5cad49e5ede5f6bdf 100644 (file)
--- a/PcAtChipsetPkg/8259InterruptControllerDxe/8259.c
+++ b/PcAtChipsetPkg/8259InterruptControllerDxe/8259.c
@@ -1,7 +1,7 @@
 /** @file\r
   This contains the installation function for the driver.\r
 \r
-Copyright (c) 2005 - 2009, Intel Corporation. All rights reserved.<BR>\r
+Copyright (c) 2005 - 2012, Intel Corporation. All rights reserved.<BR>\r
 This program and the accompanying materials\r
 are licensed and made available under the terms and conditions of the BSD License\r
 which accompanies this distribution.  The full text of the license may be found at\r
@@ -38,9 +38,9 @@ UINT8                     mMasterBase             = 0xff;
 UINT8                     mSlaveBase              = 0xff;\r
 EFI_8259_MODE             mMode                   = Efi8259ProtectedMode;\r
 UINT16                    mProtectedModeMask      = 0xffff;\r
-UINT16                    mLegacyModeMask         = FixedPcdGet16(Pcd8259LegacyModeMask);\r
+UINT16                    mLegacyModeMask;\r
 UINT16                    mProtectedModeEdgeLevel = 0x0000;\r
-UINT16                    mLegacyModeEdgeLevel    = FixedPcdGet16(Pcd8259LegacyModeEdgeLevel);\r
+UINT16                    mLegacyModeEdgeLevel;\r
 \r
 //\r
 // Worker Functions\r
@@ -123,8 +123,10 @@ Interrupt8259SetVectorBase (
   IN UINT8                     SlaveBase\r
   )\r
 {\r
-  UINT8 Mask;\r
+  UINT8   Mask;\r
+  EFI_TPL OriginalTpl;\r
 \r
+  OriginalTpl = gBS->RaiseTPL (TPL_HIGH_LEVEL);\r
   //\r
   // Set vector base for slave PIC\r
   //\r
@@ -137,7 +139,7 @@ Interrupt8259SetVectorBase (
 \r
     //\r
     // Preserve interrtup mask register before initialization sequence\r
-    // because it will be cleared during intialization\r
+    // because it will be cleared during initialization\r
     //\r
     Mask = IoRead8 (LEGACY_8259_MASK_REGISTER_SLAVE);\r
 \r
@@ -179,7 +181,7 @@ Interrupt8259SetVectorBase (
 \r
     //\r
     // Preserve interrtup mask register before initialization sequence\r
-    // because it will be cleared during intialization\r
+    // because it will be cleared during initialization\r
     //\r
     Mask = IoRead8 (LEGACY_8259_MASK_REGISTER_MASTER);\r
 \r
@@ -211,6 +213,8 @@ Interrupt8259SetVectorBase (
 \r
   IoWrite8 (LEGACY_8259_CONTROL_REGISTER_SLAVE, LEGACY_8259_EOI);\r
   IoWrite8 (LEGACY_8259_CONTROL_REGISTER_MASTER, LEGACY_8259_EOI);\r
+  \r
+  gBS->RestoreTPL (OriginalTpl);\r
 \r
   return EFI_SUCCESS;\r
 }\r
@@ -413,7 +417,7 @@ Interrupt8259GetVector (
   OUT UINT8                     *Vector\r
   )\r
 {\r
-  if (Irq < Efi8259Irq0 || Irq > Efi8259Irq15) {\r
+  if ((UINT32)Irq > Efi8259Irq15) {\r
     return EFI_INVALID_PARAMETER;\r
   }\r
 \r
@@ -445,7 +449,7 @@ Interrupt8259EnableIrq (
   IN BOOLEAN                   LevelTriggered\r
   )\r
 {\r
-  if (Irq < Efi8259Irq0 || Irq > Efi8259Irq15) {\r
+  if ((UINT32)Irq > Efi8259Irq15) {\r
     return EFI_INVALID_PARAMETER;\r
   }\r
 \r
@@ -478,7 +482,7 @@ Interrupt8259DisableIrq (
   IN EFI_8259_IRQ              Irq\r
   )\r
 {\r
-  if (Irq < Efi8259Irq0 || Irq > Efi8259Irq15) {\r
+  if ((UINT32)Irq > Efi8259Irq15) {\r
     return EFI_INVALID_PARAMETER;\r
   }\r
 \r
@@ -555,7 +559,7 @@ Interrupt8259EndOfInterrupt (
   IN EFI_8259_IRQ              Irq\r
   )\r
 {\r
-  if (Irq < Efi8259Irq0 || Irq > Efi8259Irq15) {\r
+  if ((UINT32)Irq > Efi8259Irq15) {\r
     return EFI_INVALID_PARAMETER;\r
   }\r
 \r
@@ -588,6 +592,12 @@ Install8259 (
   EFI_STATUS   Status;\r
   EFI_8259_IRQ Irq;\r
 \r
+  //\r
+  // Initialze mask values from PCDs\r
+  //\r
+  mLegacyModeMask      = PcdGet16 (Pcd8259LegacyModeMask);\r
+  mLegacyModeEdgeLevel = PcdGet16 (Pcd8259LegacyModeEdgeLevel);\r
+\r
   //\r
   // Clear all pending interrupt\r
   //\r