PcAtChipsetPkg: Define FixePCD's for RTC register values

[mirror_edk2.git] / PcAtChipsetPkg / PcAtChipsetPkg.dec

diff --git a/PcAtChipsetPkg/PcAtChipsetPkg.dec b/PcAtChipsetPkg/PcAtChipsetPkg.dec
index 11c31e1d5ae07557c23d0eb8610a86fe3496be09..f11d2045a43014cd195fd9e3dcdb79d37c45cece 100644 (file)
--- a/PcAtChipsetPkg/PcAtChipsetPkg.dec
+++ b/PcAtChipsetPkg/PcAtChipsetPkg.dec
@@ -5,6 +5,7 @@
 # PcAt defacto standard.\r
 #\r
 # Copyright (c) 2009 - 2015, Intel Corporation. All rights reserved.<BR>\r
+# Copyright (c) 2017, AMD Inc. All rights reserved.<BR>\r
 #\r
 # This program and the accompanying materials\r
 # are licensed and made available under the terms and conditions of the BSD License\r
@@ -34,6 +35,11 @@
 [Guids]\r
   gPcAtChipsetPkgTokenSpaceGuid = { 0x326ae723, 0xae32, 0x4589, { 0x98, 0xb8, 0xca, 0xc2, 0x3c, 0xdc, 0xc1, 0xb1 } }\r
 \r
+#\r
+# [Error.gPcAtChipsetPkgTokenSpaceGuid]\r
+#   0x80000001 | Invalid value provided.\r
+#\r
+\r
 [PcdsFeatureFlag]\r
   ## Indicates the HPET Timer will be configured to use MSI interrupts if the HPET timer supports them, or use I/O APIC interrupts.<BR><BR>\r
   #   TRUE  - Configures the HPET Timer to use MSI interrupts if the HPET Timer supports them.<BR>\r
@@ -123,7 +129,8 @@
 \r
   ## This PCD specifies the maximal valid year in RTC.\r
   # @Prompt Maximal valid year in RTC.\r
-  gPcAtChipsetPkgTokenSpaceGuid.PcdMaximalValidYear|2099|UINT16|0x0000000E\r
+  # @Expression 0x80000001 | gPcAtChipsetPkgTokenSpaceGuid.PcdMaximalValidYear < gPcAtChipsetPkgTokenSpaceGuid.PcdMinimalValidYear + 100\r
+  gPcAtChipsetPkgTokenSpaceGuid.PcdMaximalValidYear|2097|UINT16|0x0000000E\r
   \r
 [PcdsFixedAtBuild, PcdsPatchableInModule]\r
   ## Defines the ACPI register set base address.\r
@@ -163,5 +170,29 @@
   # @Prompt Offset to 32-bit Timer register in ACPI BAR\r
   gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiPm1TmrOffset              |0x0008|UINT16|0x00000017\r
 \r
+  ## Defines the bit mask to retrieve ACPI IO Port Base Address\r
+  # @Prompt ACPI IO Port Base Address Mask\r
+  gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPortBaseAddressMask     |0xFFFE|UINT16|0x00000018\r
+\r
+  ## Reset Control Register address in I/O space.\r
+  # @Prompt Reset Control Register address\r
+  gPcAtChipsetPkgTokenSpaceGuid.PcdResetControlRegister|0x64|UINT64|0x00000019\r
+\r
+  ## 8bit Reset Control Register value for cold reset.\r
+  # @Prompt Reset Control Register value for cold reset\r
+  gPcAtChipsetPkgTokenSpaceGuid.PcdResetControlValueColdReset|0xFE|UINT8|0x0000001A\r
+\r
+  ## Specifies the initial value for Register_A in RTC.\r
+  # @Prompt Initial value for Register_A in RTC.\r
+  gPcAtChipsetPkgTokenSpaceGuid.PcdInitialValueRtcRegisterA|0x26|UINT8|0x0000001B\r
+\r
+  ## Specifies the initial value for Register_B in RTC.\r
+  # @Prompt Initial value for Register_B in RTC.\r
+  gPcAtChipsetPkgTokenSpaceGuid.PcdInitialValueRtcRegisterB|0x02|UINT8|0x0000001C\r
+\r
+  ## Specifies the initial value for Register_D in RTC.\r
+  # @Prompt Initial value for Register_D in RTC.\r
+  gPcAtChipsetPkgTokenSpaceGuid.PcdInitialValueRtcRegisterD|0x00|UINT8|0x0000001D\r
+\r
 [UserExtensions.TianoCore."ExtraFiles"]\r
-  PcAtChipsetPkgExtra.uni
\ No newline at end of file
+  PcAtChipsetPkgExtra.uni\r