PcAtChipsetPkg/PcRtc: Add two new PCD for RTC Index/Target registers

[mirror_edk2.git] / PcAtChipsetPkg / PcatRealTimeClockRuntimeDxe / PcRtc.c

diff --git a/PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcRtc.c b/PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcRtc.c
index c032e16217c3d858b93186a5cf49eae8bd21833e..caecd0ac1ee6ec5db634665161f069c1fac5d031 100644 (file)
--- a/PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcRtc.c
+++ b/PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcRtc.c
@@ -1,7 +1,7 @@
 /** @file\r
   RTC Architectural Protocol GUID as defined in DxeCis 0.96.\r
 \r
-Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.<BR>\r
+Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>\r
 Copyright (c) 2017, AMD Inc. All rights reserved.<BR>\r
 \r
 This program and the accompanying materials\r
@@ -72,8 +72,8 @@ RtcRead (
   IN  UINT8 Address\r
   )\r
 {\r
-  IoWrite8 (PCAT_RTC_ADDRESS_REGISTER, (UINT8) (Address | (UINT8) (IoRead8 (PCAT_RTC_ADDRESS_REGISTER) & 0x80)));\r
-  return IoRead8 (PCAT_RTC_DATA_REGISTER);\r
+  IoWrite8 (PcdGet8 (PcdRtcIndexRegister), (UINT8) (Address | (UINT8) (IoRead8 (PcdGet8 (PcdRtcIndexRegister)) & 0x80)));\r
+  return IoRead8 (PcdGet8 (PcdRtcTargetRegister));\r
 }\r
 \r
 /**\r
@@ -90,8 +90,8 @@ RtcWrite (
   IN  UINT8   Data\r
   )\r
 {\r
-  IoWrite8 (PCAT_RTC_ADDRESS_REGISTER, (UINT8) (Address | (UINT8) (IoRead8 (PCAT_RTC_ADDRESS_REGISTER) & 0x80)));\r
-  IoWrite8 (PCAT_RTC_DATA_REGISTER, Data);\r
+  IoWrite8 (PcdGet8 (PcdRtcIndexRegister), (UINT8) (Address | (UINT8) (IoRead8 (PcdGet8 (PcdRtcIndexRegister)) & 0x80)));\r
+  IoWrite8 (PcdGet8 (PcdRtcTargetRegister), Data);\r
 }\r
 \r
 /**\r