//\r
UINTN RootBridgeNumber[1] = { 1 };\r
\r
-UINT64 RootBridgeAttribute[1][1] = { { EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM } };\r
+UINT64 RootBridgeAttribute[1][1] = {\r
+ { EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM }\r
+};\r
\r
EFI_PCI_ROOT_BRIDGE_DEVICE_PATH mEfiPciRootBridgeDevicePath[1][1] = {\r
{\r
EISA_PNP_ID(0x0A03),\r
0\r
},\r
- \r
+\r
{\r
END_DEVICE_PATH_TYPE,\r
END_ENTIRE_DEVICE_PATH_SUBTYPE,\r
UINTN Loop2;\r
PCI_HOST_BRIDGE_INSTANCE *HostBridge;\r
PCI_ROOT_BRIDGE_INSTANCE *PrivateData;\r
- \r
+\r
mDriverImageHandle = ImageHandle;\r
- \r
+\r
//\r
// Create Host Bridge Device Handle\r
//\r
for (Loop1 = 0; Loop1 < HOST_BRIDGE_NUMBER; Loop1++) {\r
- HostBridge = AllocateCopyPool (sizeof(PCI_HOST_BRIDGE_INSTANCE), &mPciHostBridgeInstanceTemplate);\r
+ HostBridge = AllocateCopyPool (sizeof(PCI_HOST_BRIDGE_INSTANCE),\r
+ &mPciHostBridgeInstanceTemplate);\r
if (HostBridge == NULL) {\r
return EFI_OUT_OF_RESOURCES;\r
}\r
- \r
+\r
HostBridge->RootBridgeNumber = RootBridgeNumber[Loop1];\r
InitializeListHead (&HostBridge->Head);\r
\r
Status = gBS->InstallMultipleProtocolInterfaces (\r
- &HostBridge->HostBridgeHandle, \r
- &gEfiPciHostBridgeResourceAllocationProtocolGuid, &HostBridge->ResAlloc,\r
+ &HostBridge->HostBridgeHandle,\r
+ &gEfiPciHostBridgeResourceAllocationProtocolGuid,\r
+ &HostBridge->ResAlloc,\r
NULL\r
);\r
if (EFI_ERROR (Status)) {\r
FreePool (HostBridge);\r
return EFI_DEVICE_ERROR;\r
}\r
- \r
+\r
//\r
// Create Root Bridge Device Handle in this Host Bridge\r
//\r
- \r
+\r
for (Loop2 = 0; Loop2 < HostBridge->RootBridgeNumber; Loop2++) {\r
PrivateData = AllocateZeroPool (sizeof(PCI_ROOT_BRIDGE_INSTANCE));\r
if (PrivateData == NULL) {\r
}\r
\r
PrivateData->Signature = PCI_ROOT_BRIDGE_SIGNATURE;\r
- PrivateData->DevicePath = (EFI_DEVICE_PATH_PROTOCOL *)&mEfiPciRootBridgeDevicePath[Loop1][Loop2];\r
+ PrivateData->DevicePath =\r
+ (EFI_DEVICE_PATH_PROTOCOL *)&mEfiPciRootBridgeDevicePath[Loop1][Loop2];\r
\r
RootBridgeConstructor (\r
- &PrivateData->Io, \r
- HostBridge->HostBridgeHandle, \r
- RootBridgeAttribute[Loop1][Loop2], \r
+ &PrivateData->Io,\r
+ HostBridge->HostBridgeHandle,\r
+ RootBridgeAttribute[Loop1][Loop2],\r
&mResAperture[Loop1][Loop2]\r
);\r
- \r
+\r
Status = gBS->InstallMultipleProtocolInterfaces(\r
- &PrivateData->Handle, \r
- &gEfiDevicePathProtocolGuid, PrivateData->DevicePath,\r
- &gEfiPciRootBridgeIoProtocolGuid, &PrivateData->Io,\r
+ &PrivateData->Handle,\r
+ &gEfiDevicePathProtocolGuid,\r
+ PrivateData->DevicePath,\r
+ &gEfiPciRootBridgeIoProtocolGuid,\r
+ &PrivateData->Io,\r
NULL\r
);\r
if (EFI_ERROR (Status)) {\r
FreePool(PrivateData);\r
return EFI_DEVICE_ERROR;\r
}\r
- \r
+\r
InsertTailList (&HostBridge->Head, &PrivateData->Link);\r
}\r
- } \r
+ }\r
\r
return EFI_SUCCESS;\r
}\r
UINTN BitsOfAlignment;\r
EFI_STATUS Status;\r
EFI_STATUS ReturnStatus;\r
- \r
+\r
HostBridgeInstance = INSTANCE_FROM_RESOURCE_ALLOCATION_THIS (This);\r
- \r
+\r
switch (Phase) {\r
\r
case EfiPciHostBridgeBeginEnumeration:\r
if (HostBridgeInstance->CanRestarted) {\r
//\r
- // Reset the Each Root Bridge \r
+ // Reset the Each Root Bridge\r
//\r
List = HostBridgeInstance->Head.ForwardLink;\r
- \r
+\r
while (List != &HostBridgeInstance->Head) {\r
RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);\r
for (Index = TypeIo; Index < TypeMax; Index++) {\r
RootBridgeInstance->ResAllocNode[Index].Length = 0;\r
RootBridgeInstance->ResAllocNode[Index].Status = ResNone;\r
}\r
- \r
+\r
List = List->ForwardLink;\r
}\r
- \r
+\r
HostBridgeInstance->ResourceSubmited = FALSE;\r
HostBridgeInstance->CanRestarted = TRUE;\r
} else {\r
//\r
// Can not restart\r
- // \r
+ //\r
return EFI_NOT_READY;\r
- } \r
+ }\r
break;\r
\r
case EfiPciHostBridgeEndEnumeration:\r
\r
case EfiPciHostBridgeBeginBusAllocation:\r
//\r
- // No specific action is required here, can perform any chipset specific programing\r
+ // No specific action is required here, can perform any chipset specific\r
+ // programing\r
//\r
HostBridgeInstance->CanRestarted = FALSE;\r
break;\r
\r
case EfiPciHostBridgeEndBusAllocation:\r
//\r
- // No specific action is required here, can perform any chipset specific programing\r
+ // No specific action is required here, can perform any chipset specific\r
+ // programing\r
//\r
//HostBridgeInstance->CanRestarted = FALSE;\r
break;\r
\r
case EfiPciHostBridgeBeginResourceAllocation:\r
//\r
- // No specific action is required here, can perform any chipset specific programing\r
+ // No specific action is required here, can perform any chipset specific\r
+ // programing\r
//\r
//HostBridgeInstance->CanRestarted = FALSE;\r
break;\r
ReturnStatus = EFI_SUCCESS;\r
if (HostBridgeInstance->ResourceSubmited) {\r
//\r
- // Take care of the resource dependencies between the root bridges \r
+ // Take care of the resource dependencies between the root bridges\r
//\r
List = HostBridgeInstance->Head.ForwardLink;\r
\r
RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);\r
for (Index = TypeIo; Index < TypeBus; Index++) {\r
if (RootBridgeInstance->ResAllocNode[Index].Status != ResNone) {\r
- \r
+\r
AddrLen = RootBridgeInstance->ResAllocNode[Index].Length;\r
- \r
+\r
//\r
// Get the number of '1' in Alignment.\r
//\r
- BitsOfAlignment = (UINTN) (HighBitSet64 (RootBridgeInstance->ResAllocNode[Index].Alignment) + 1);\r
- \r
+ BitsOfAlignment =\r
+ (UINTN)(HighBitSet64 (\r
+ RootBridgeInstance->ResAllocNode[Index].Alignment\r
+ ) + 1);\r
+\r
switch (Index) {\r
\r
- case TypeIo: \r
+ case TypeIo:\r
//\r
// It is impossible for this chipset to align 0xFFFF for IO16\r
// So clear it\r
if (BitsOfAlignment >= 16) {\r
BitsOfAlignment = 0;\r
}\r
- \r
+\r
Status = gDS->AllocateIoSpace (\r
- EfiGcdAllocateAnySearchBottomUp, \r
- EfiGcdIoTypeIo, \r
+ EfiGcdAllocateAnySearchBottomUp,\r
+ EfiGcdIoTypeIo,\r
BitsOfAlignment,\r
AddrLen,\r
&BaseAddress,\r
mDriverImageHandle,\r
NULL\r
);\r
- \r
+\r
if (!EFI_ERROR (Status)) {\r
- RootBridgeInstance->ResAllocNode[Index].Base = (UINTN)BaseAddress;\r
- RootBridgeInstance->ResAllocNode[Index].Status = ResAllocated; \r
+ RootBridgeInstance->ResAllocNode[Index].Base =\r
+ (UINTN)BaseAddress;\r
+ RootBridgeInstance->ResAllocNode[Index].Status =\r
+ ResAllocated;\r
} else {\r
- ReturnStatus = Status; \r
+ ReturnStatus = Status;\r
if (Status != EFI_OUT_OF_RESOURCES) {\r
RootBridgeInstance->ResAllocNode[Index].Length = 0;\r
}\r
\r
case TypeMem32:\r
//\r
- // It is impossible for this chipset to align 0xFFFFFFFF for Mem32\r
- // So clear it \r
+ // It is impossible for this chipset to align 0xFFFFFFFF for\r
+ // Mem32\r
+ // So clear it\r
//\r
- \r
+\r
if (BitsOfAlignment >= 32) {\r
BitsOfAlignment = 0;\r
}\r
- \r
+\r
Status = gDS->AllocateMemorySpace (\r
- EfiGcdAllocateAnySearchBottomUp, \r
- EfiGcdMemoryTypeMemoryMappedIo, \r
+ EfiGcdAllocateAnySearchBottomUp,\r
+ EfiGcdMemoryTypeMemoryMappedIo,\r
BitsOfAlignment,\r
AddrLen,\r
&BaseAddress,\r
mDriverImageHandle,\r
NULL\r
);\r
- \r
+\r
if (!EFI_ERROR (Status)) {\r
// We were able to allocate the PCI memory\r
- RootBridgeInstance->ResAllocNode[Index].Base = (UINTN)BaseAddress;\r
- RootBridgeInstance->ResAllocNode[Index].Status = ResAllocated;\r
- \r
+ RootBridgeInstance->ResAllocNode[Index].Base =\r
+ (UINTN)BaseAddress;\r
+ RootBridgeInstance->ResAllocNode[Index].Status =\r
+ ResAllocated;\r
+\r
} else {\r
// Not able to allocate enough PCI memory\r
- ReturnStatus = Status; \r
- \r
+ ReturnStatus = Status;\r
+\r
if (Status != EFI_OUT_OF_RESOURCES) {\r
RootBridgeInstance->ResAllocNode[Index].Length = 0;\r
- } \r
+ }\r
ASSERT (FALSE);\r
}\r
break;\r
- \r
- case TypePMem32: \r
- case TypeMem64: \r
+\r
+ case TypePMem32:\r
+ case TypeMem64:\r
case TypePMem64:\r
ReturnStatus = EFI_ABORTED;\r
- break; \r
+ break;\r
default:\r
ASSERT (FALSE);\r
break;\r
}; //end switch\r
}\r
}\r
- \r
+\r
List = List->ForwardLink;\r
}\r
- \r
+\r
return ReturnStatus;\r
\r
} else {\r
BaseAddress = RootBridgeInstance->ResAllocNode[Index].Base;\r
switch (Index) {\r
\r
- case TypeIo: \r
- Status = gDS->FreeIoSpace (BaseAddress, AddrLen); \r
+ case TypeIo:\r
+ Status = gDS->FreeIoSpace (BaseAddress, AddrLen);\r
if (EFI_ERROR (Status)) {\r
ReturnStatus = Status;\r
}\r
break;\r
\r
case TypePMem64:\r
- break; \r
+ break;\r
\r
default:\r
ASSERT (FALSE);\r
RootBridgeInstance->ResAllocNode[Index].Status = ResNone;\r
}\r
}\r
- \r
+\r
List = List->ForwardLink;\r
}\r
- \r
+\r
HostBridgeInstance->ResourceSubmited = FALSE;\r
- HostBridgeInstance->CanRestarted = TRUE; \r
+ HostBridgeInstance->CanRestarted = TRUE;\r
return ReturnStatus;\r
\r
case EfiPciHostBridgeEndResourceAllocation:\r
default:\r
return EFI_INVALID_PARAMETER;\r
}\r
- \r
- return EFI_SUCCESS; \r
+\r
+ return EFI_SUCCESS;\r
}\r
\r
/**\r
IN OUT EFI_HANDLE *RootBridgeHandle\r
)\r
{\r
- BOOLEAN NoRootBridge; \r
- LIST_ENTRY *List; \r
+ BOOLEAN NoRootBridge;\r
+ LIST_ENTRY *List;\r
PCI_HOST_BRIDGE_INSTANCE *HostBridgeInstance;\r
PCI_ROOT_BRIDGE_INSTANCE *RootBridgeInstance;\r
- \r
+\r
NoRootBridge = TRUE;\r
HostBridgeInstance = INSTANCE_FROM_RESOURCE_ALLOCATION_THIS (This);\r
List = HostBridgeInstance->Head.ForwardLink;\r
- \r
- \r
+\r
+\r
while (List != &HostBridgeInstance->Head) {\r
NoRootBridge = FALSE;\r
RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);\r
if (List!=&HostBridgeInstance->Head) {\r
RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);\r
*RootBridgeHandle = RootBridgeInstance->Handle;\r
- return EFI_SUCCESS; \r
+ return EFI_SUCCESS;\r
} else {\r
return EFI_NOT_FOUND;\r
}\r
}\r
}\r
- \r
+\r
List = List->ForwardLink;\r
} //end while\r
- \r
+\r
if (NoRootBridge) {\r
return EFI_NOT_FOUND;\r
} else {\r
OUT UINT64 *Attributes\r
)\r
{\r
- LIST_ENTRY *List; \r
+ LIST_ENTRY *List;\r
PCI_HOST_BRIDGE_INSTANCE *HostBridgeInstance;\r
PCI_ROOT_BRIDGE_INSTANCE *RootBridgeInstance;\r
- \r
+\r
if (Attributes == NULL) {\r
return EFI_INVALID_PARAMETER;\r
}\r
- \r
+\r
HostBridgeInstance = INSTANCE_FROM_RESOURCE_ALLOCATION_THIS (This);\r
List = HostBridgeInstance->Head.ForwardLink;\r
- \r
+\r
while (List != &HostBridgeInstance->Head) {\r
RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);\r
if (RootBridgeHandle == RootBridgeInstance->Handle) {\r
}\r
List = List->ForwardLink;\r
}\r
- \r
+\r
//\r
- // RootBridgeHandle is not an EFI_HANDLE \r
+ // RootBridgeHandle is not an EFI_HANDLE\r
// that was returned on a previous call to GetNextRootBridge()\r
//\r
return EFI_INVALID_PARAMETER;\r
OUT VOID **Configuration\r
)\r
{\r
- LIST_ENTRY *List; \r
+ LIST_ENTRY *List;\r
PCI_HOST_BRIDGE_INSTANCE *HostBridgeInstance;\r
PCI_ROOT_BRIDGE_INSTANCE *RootBridgeInstance;\r
VOID *Buffer;\r
UINT8 *Temp;\r
UINT64 BusStart;\r
UINT64 BusEnd;\r
- \r
+\r
HostBridgeInstance = INSTANCE_FROM_RESOURCE_ALLOCATION_THIS (This);\r
List = HostBridgeInstance->Head.ForwardLink;\r
- \r
+\r
while (List != &HostBridgeInstance->Head) {\r
RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);\r
if (RootBridgeHandle == RootBridgeInstance->Handle) {\r
//\r
// Program the Hardware(if needed) if error return EFI_DEVICE_ERROR\r
//\r
- \r
- Buffer = AllocatePool (sizeof(EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) + sizeof(EFI_ACPI_END_TAG_DESCRIPTOR));\r
+\r
+ Buffer = AllocatePool (\r
+ sizeof(EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) +\r
+ sizeof(EFI_ACPI_END_TAG_DESCRIPTOR)\r
+ );\r
if (Buffer == NULL) {\r
return EFI_OUT_OF_RESOURCES;\r
}\r
- \r
+\r
Temp = (UINT8 *)Buffer;\r
- \r
+\r
((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->Desc = 0x8A;\r
((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->Len = 0x2B;\r
((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->ResType = 2;\r
- ((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->GenFlag = 0; \r
+ ((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->GenFlag = 0;\r
((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->SpecificFlag = 0;\r
((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->AddrSpaceGranularity = 0;\r
((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->AddrRangeMin = BusStart;\r
((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->AddrRangeMax = 0;\r
- ((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->AddrTranslationOffset = 0; \r
- ((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->AddrLen = BusEnd - BusStart + 1;\r
- \r
+ ((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->AddrTranslationOffset = 0;\r
+ ((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->AddrLen =\r
+ BusEnd - BusStart + 1;\r
+\r
Temp = Temp + sizeof(EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR);\r
- ((EFI_ACPI_END_TAG_DESCRIPTOR *)Temp)->Desc = 0x79; \r
+ ((EFI_ACPI_END_TAG_DESCRIPTOR *)Temp)->Desc = 0x79;\r
((EFI_ACPI_END_TAG_DESCRIPTOR *)Temp)->Checksum = 0x0;\r
- \r
- *Configuration = Buffer; \r
+\r
+ *Configuration = Buffer;\r
return EFI_SUCCESS;\r
}\r
List = List->ForwardLink;\r
}\r
- \r
+\r
return EFI_INVALID_PARAMETER;\r
}\r
\r
IN VOID *Configuration\r
)\r
{\r
- LIST_ENTRY *List; \r
+ LIST_ENTRY *List;\r
PCI_HOST_BRIDGE_INSTANCE *HostBridgeInstance;\r
PCI_ROOT_BRIDGE_INSTANCE *RootBridgeInstance;\r
UINT8 *Ptr;\r
UINTN BusStart;\r
UINTN BusEnd;\r
UINTN BusLen;\r
- \r
+\r
if (Configuration == NULL) {\r
return EFI_INVALID_PARAMETER;\r
}\r
- \r
+\r
Ptr = Configuration;\r
- \r
+\r
//\r
// Check the Configuration is valid\r
//\r
if(*Ptr != ACPI_ADDRESS_SPACE_DESCRIPTOR) {\r
return EFI_INVALID_PARAMETER;\r
}\r
- \r
+\r
if (((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Ptr)->ResType != 2) {\r
return EFI_INVALID_PARAMETER;\r
}\r
if (*Ptr != ACPI_END_TAG_DESCRIPTOR) {\r
return EFI_INVALID_PARAMETER;\r
}\r
- \r
+\r
HostBridgeInstance = INSTANCE_FROM_RESOURCE_ALLOCATION_THIS (This);\r
List = HostBridgeInstance->Head.ForwardLink;\r
- \r
+\r
Ptr = Configuration;\r
- \r
+\r
while (List != &HostBridgeInstance->Head) {\r
RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);\r
if (RootBridgeHandle == RootBridgeInstance->Handle) {\r
- BusStart = (UINTN)((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Ptr)->AddrRangeMin;\r
- BusLen = (UINTN)((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Ptr)->AddrLen;\r
+ EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Desc;\r
+\r
+ Desc = (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Ptr;\r
+ BusStart = (UINTN)Desc->AddrRangeMin;\r
+ BusLen = (UINTN)Desc->AddrLen;\r
BusEnd = BusStart + BusLen - 1;\r
- \r
+\r
if (BusStart > BusEnd) {\r
return EFI_INVALID_PARAMETER;\r
}\r
- \r
- if ((BusStart < RootBridgeInstance->BusBase) || (BusEnd > RootBridgeInstance->BusLimit)) {\r
+\r
+ if ((BusStart < RootBridgeInstance->BusBase) ||\r
+ (BusEnd > RootBridgeInstance->BusLimit)) {\r
return EFI_INVALID_PARAMETER;\r
}\r
- \r
+\r
//\r
// Update the Bus Range\r
//\r
RootBridgeInstance->ResAllocNode[TypeBus].Base = BusStart;\r
RootBridgeInstance->ResAllocNode[TypeBus].Length = BusLen;\r
RootBridgeInstance->ResAllocNode[TypeBus].Status = ResAllocated;\r
- \r
+\r
//\r
// Program the Root Bridge Hardware\r
//\r
- \r
+\r
return EFI_SUCCESS;\r
}\r
- \r
+\r
List = List->ForwardLink;\r
}\r
- \r
+\r
return EFI_INVALID_PARAMETER;\r
}\r
\r
IN VOID *Configuration\r
)\r
{\r
- LIST_ENTRY *List; \r
+ LIST_ENTRY *List;\r
PCI_HOST_BRIDGE_INSTANCE *HostBridgeInstance;\r
PCI_ROOT_BRIDGE_INSTANCE *RootBridgeInstance;\r
UINT8 *Temp;\r
EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Ptr;\r
UINT64 AddrLen;\r
UINT64 Alignment;\r
- \r
+\r
//\r
// Check the input parameter: Configuration\r
//\r
if (Configuration == NULL) {\r
return EFI_INVALID_PARAMETER;\r
}\r
- \r
+\r
HostBridgeInstance = INSTANCE_FROM_RESOURCE_ALLOCATION_THIS (This);\r
List = HostBridgeInstance->Head.ForwardLink;\r
- \r
+\r
Temp = (UINT8 *)Configuration;\r
- while ( *Temp == 0x8A) { \r
+ while ( *Temp == 0x8A) {\r
Temp += sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) ;\r
}\r
if (*Temp != 0x79) {\r
return EFI_INVALID_PARAMETER;\r
}\r
- \r
+\r
Temp = (UINT8 *)Configuration;\r
while (List != &HostBridgeInstance->Head) {\r
RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);\r
//\r
// Check address range alignment\r
//\r
- if (Ptr->AddrRangeMax >= 0xffffffff || Ptr->AddrRangeMax != (GetPowerOfTwo64 (Ptr->AddrRangeMax + 1) - 1)) {\r
+ if (Ptr->AddrRangeMax >= 0xffffffff ||\r
+ Ptr->AddrRangeMax != (GetPowerOfTwo64 (\r
+ Ptr->AddrRangeMax + 1) - 1)) {\r
return EFI_INVALID_PARAMETER;\r
}\r
- \r
+\r
switch (Ptr->ResType) {\r
\r
case 0:\r
- \r
+\r
//\r
// Check invalid Address Sapce Granularity\r
//\r
if (Ptr->AddrSpaceGranularity != 32) {\r
return EFI_INVALID_PARAMETER;\r
}\r
- \r
+\r
//\r
// check the memory resource request is supported by PCI root bridge\r
//\r
- if (RootBridgeInstance->RootBridgeAttrib == EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM &&\r
- Ptr->SpecificFlag == 0x06) {\r
+ if (RootBridgeInstance->RootBridgeAttrib ==\r
+ EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM &&\r
+ Ptr->SpecificFlag == 0x06) {\r
return EFI_INVALID_PARAMETER;\r
}\r
- \r
+\r
AddrLen = Ptr->AddrLen;\r
Alignment = Ptr->AddrRangeMax;\r
if (Ptr->AddrSpaceGranularity == 32) {\r
//\r
// Apply from GCD\r
//\r
- RootBridgeInstance->ResAllocNode[TypePMem32].Status = ResSubmitted;\r
+ RootBridgeInstance->ResAllocNode[TypePMem32].Status =\r
+ ResSubmitted;\r
} else {\r
RootBridgeInstance->ResAllocNode[TypeMem32].Length = AddrLen;\r
- RootBridgeInstance->ResAllocNode[TypeMem32].Alignment = Alignment;\r
- RootBridgeInstance->ResAllocNode[TypeMem32].Status = ResRequested; \r
+ RootBridgeInstance->ResAllocNode[TypeMem32].Alignment =\r
+ Alignment;\r
+ RootBridgeInstance->ResAllocNode[TypeMem32].Status =\r
+ ResRequested;\r
HostBridgeInstance->ResourceSubmited = TRUE;\r
}\r
}\r
\r
if (Ptr->AddrSpaceGranularity == 64) {\r
if (Ptr->SpecificFlag == 0x06) {\r
- RootBridgeInstance->ResAllocNode[TypePMem64].Status = ResSubmitted;\r
+ RootBridgeInstance->ResAllocNode[TypePMem64].Status =\r
+ ResSubmitted;\r
} else {\r
- RootBridgeInstance->ResAllocNode[TypeMem64].Status = ResSubmitted;\r
+ RootBridgeInstance->ResAllocNode[TypeMem64].Status =\r
+ ResSubmitted;\r
}\r
}\r
break;\r
RootBridgeInstance->ResAllocNode[TypeIo].Length = AddrLen;\r
RootBridgeInstance->ResAllocNode[TypeIo].Alignment = Alignment;\r
RootBridgeInstance->ResAllocNode[TypeIo].Status = ResRequested;\r
- HostBridgeInstance->ResourceSubmited = TRUE; \r
+ HostBridgeInstance->ResourceSubmited = TRUE;\r
break;\r
\r
default:\r
break;\r
};\r
- \r
+\r
Temp += sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) ;\r
- } \r
- \r
+ }\r
+\r
return EFI_SUCCESS;\r
}\r
- \r
+\r
List = List->ForwardLink;\r
}\r
- \r
+\r
return EFI_INVALID_PARAMETER;\r
}\r
\r
OUT VOID **Configuration\r
)\r
{\r
- LIST_ENTRY *List; \r
+ LIST_ENTRY *List;\r
PCI_HOST_BRIDGE_INSTANCE *HostBridgeInstance;\r
PCI_ROOT_BRIDGE_INSTANCE *RootBridgeInstance;\r
UINTN Index;\r
- UINTN Number; \r
- VOID *Buffer; \r
+ UINTN Number;\r
+ VOID *Buffer;\r
UINT8 *Temp;\r
EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Ptr;\r
UINT64 ResStatus;\r
- \r
+\r
Buffer = NULL;\r
Number = 0;\r
//\r
//\r
HostBridgeInstance = INSTANCE_FROM_RESOURCE_ALLOCATION_THIS (This);\r
List = HostBridgeInstance->Head.ForwardLink;\r
- \r
+\r
//\r
// Enumerate the root bridges in this host bridge\r
//\r
for (Index = 0; Index < TypeBus; Index ++) {\r
if (RootBridgeInstance->ResAllocNode[Index].Status != ResNone) {\r
Number ++;\r
- } \r
+ }\r
}\r
- \r
+\r
if (Number == 0) {\r
return EFI_INVALID_PARAMETER;\r
}\r
\r
- Buffer = AllocateZeroPool (Number * sizeof(EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) + sizeof(EFI_ACPI_END_TAG_DESCRIPTOR));\r
+ Buffer = AllocateZeroPool (\r
+ Number * sizeof(EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) +\r
+ sizeof(EFI_ACPI_END_TAG_DESCRIPTOR)\r
+ );\r
if (Buffer == NULL) {\r
return EFI_OUT_OF_RESOURCES;\r
}\r
- \r
+\r
Temp = Buffer;\r
for (Index = 0; Index < TypeBus; Index ++) {\r
if (RootBridgeInstance->ResAllocNode[Index].Status != ResNone) {\r
Ptr = (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *) Temp ;\r
ResStatus = RootBridgeInstance->ResAllocNode[Index].Status;\r
- \r
+\r
switch (Index) {\r
\r
case TypeIo:\r
Ptr->Desc = 0x8A;\r
Ptr->Len = 0x2B;\r
Ptr->ResType = 1;\r
- Ptr->GenFlag = 0; \r
+ Ptr->GenFlag = 0;\r
Ptr->SpecificFlag = 0;\r
Ptr->AddrRangeMin = RootBridgeInstance->ResAllocNode[Index].Base;\r
Ptr->AddrRangeMax = 0;\r
- Ptr->AddrTranslationOffset = \\r
- (ResStatus == ResAllocated) ? EFI_RESOURCE_SATISFIED : EFI_RESOURCE_LESS;\r
+ Ptr->AddrTranslationOffset = (ResStatus == ResAllocated) ?\r
+ EFI_RESOURCE_SATISFIED :\r
+ EFI_RESOURCE_LESS;\r
Ptr->AddrLen = RootBridgeInstance->ResAllocNode[Index].Length;\r
break;\r
\r
case TypeMem32:\r
//\r
// Memory 32\r
- // \r
+ //\r
Ptr->Desc = 0x8A;\r
Ptr->Len = 0x2B;\r
Ptr->ResType = 0;\r
- Ptr->GenFlag = 0; \r
+ Ptr->GenFlag = 0;\r
Ptr->SpecificFlag = 0;\r
Ptr->AddrSpaceGranularity = 32;\r
Ptr->AddrRangeMin = RootBridgeInstance->ResAllocNode[Index].Base;\r
Ptr->AddrRangeMax = 0;\r
- Ptr->AddrTranslationOffset = \\r
- (ResStatus == ResAllocated) ? EFI_RESOURCE_SATISFIED : EFI_RESOURCE_LESS; \r
+ Ptr->AddrTranslationOffset = (ResStatus == ResAllocated) ?\r
+ EFI_RESOURCE_SATISFIED :\r
+ EFI_RESOURCE_LESS;\r
Ptr->AddrLen = RootBridgeInstance->ResAllocNode[Index].Length;\r
break;\r
\r
Ptr->Desc = 0x8A;\r
Ptr->Len = 0x2B;\r
Ptr->ResType = 0;\r
- Ptr->GenFlag = 0; \r
+ Ptr->GenFlag = 0;\r
Ptr->SpecificFlag = 6;\r
Ptr->AddrSpaceGranularity = 32;\r
Ptr->AddrRangeMin = 0;\r
Ptr->AddrRangeMax = 0;\r
- Ptr->AddrTranslationOffset = EFI_RESOURCE_NONEXISTENT; \r
+ Ptr->AddrTranslationOffset = EFI_RESOURCE_NONEXISTENT;\r
Ptr->AddrLen = 0;\r
break;\r
\r
Ptr->Desc = 0x8A;\r
Ptr->Len = 0x2B;\r
Ptr->ResType = 0;\r
- Ptr->GenFlag = 0; \r
+ Ptr->GenFlag = 0;\r
Ptr->SpecificFlag = 0;\r
Ptr->AddrSpaceGranularity = 64;\r
Ptr->AddrRangeMin = 0;\r
Ptr->AddrRangeMax = 0;\r
- Ptr->AddrTranslationOffset = EFI_RESOURCE_NONEXISTENT; \r
+ Ptr->AddrTranslationOffset = EFI_RESOURCE_NONEXISTENT;\r
Ptr->AddrLen = 0;\r
break;\r
\r
Ptr->Desc = 0x8A;\r
Ptr->Len = 0x2B;\r
Ptr->ResType = 0;\r
- Ptr->GenFlag = 0; \r
+ Ptr->GenFlag = 0;\r
Ptr->SpecificFlag = 6;\r
Ptr->AddrSpaceGranularity = 64;\r
Ptr->AddrRangeMin = 0;\r
Ptr->AddrRangeMax = 0;\r
- Ptr->AddrTranslationOffset = EFI_RESOURCE_NONEXISTENT; \r
+ Ptr->AddrTranslationOffset = EFI_RESOURCE_NONEXISTENT;\r
Ptr->AddrLen = 0;\r
break;\r
};\r
- \r
+\r
Temp += sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR);\r
- } \r
+ }\r
}\r
- \r
- ((EFI_ACPI_END_TAG_DESCRIPTOR *)Temp)->Desc = 0x79; \r
+\r
+ ((EFI_ACPI_END_TAG_DESCRIPTOR *)Temp)->Desc = 0x79;\r
((EFI_ACPI_END_TAG_DESCRIPTOR *)Temp)->Checksum = 0x0;\r
- \r
- *Configuration = Buffer; \r
- \r
+\r
+ *Configuration = Buffer;\r
+\r
return EFI_SUCCESS;\r
}\r
- \r
+\r
List = List->ForwardLink;\r
}\r
- \r
+\r
return EFI_INVALID_PARAMETER;\r
}\r
\r
EFI_STATUS\r
EFIAPI\r
PreprocessController (\r
- IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,\r
- IN EFI_HANDLE RootBridgeHandle,\r
- IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS PciAddress,\r
- IN EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE Phase\r
+ IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,\r
+ IN EFI_HANDLE RootBridgeHandle,\r
+ IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS PciAddress,\r
+ IN EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE Phase\r
)\r
{\r
PCI_HOST_BRIDGE_INSTANCE *HostBridgeInstance;\r
PCI_ROOT_BRIDGE_INSTANCE *RootBridgeInstance;\r
- LIST_ENTRY *List; \r
+ LIST_ENTRY *List;\r
\r
HostBridgeInstance = INSTANCE_FROM_RESOURCE_ALLOCATION_THIS (This);\r
List = HostBridgeInstance->Head.ForwardLink;\r
projects / mirror_edk2.git / blobdiff