/** @file\r
PCI Root Bridge Io Protocol implementation\r
\r
- Copyright (c) 2008 - 2009, Intel Corporation<BR> All rights\r
- reserved. This program and the accompanying materials are\r
- licensed and made available under the terms and conditions of the BSD License\r
- which accompanies this distribution. The full text of the license may be found at\r
- http://opensource.org/licenses/bsd-license.php\r
- \r
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+Copyright (c) 2008 - 2010, Intel Corporation. All rights reserved. <BR> \r
+This program and the accompanying materials are\r
+licensed and made available under the terms and conditions of the BSD License\r
+which accompanies this distribution. The full text of the license may be found at\r
+http://opensource.org/licenses/bsd-license.php\r
+\r
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
\r
**/ \r
\r
// Protocol Member Function Prototypes\r
//\r
\r
+/**\r
+ Polls an address in memory mapped I/O space until an exit condition is met, or \r
+ a timeout occurs. \r
+\r
+ This function provides a standard way to poll a PCI memory location. A PCI memory read\r
+ operation is performed at the PCI memory address specified by Address for the width specified\r
+ by Width. The result of this PCI memory read operation is stored in Result. This PCI memory\r
+ read operation is repeated until either a timeout of Delay 100 ns units has expired, or (Result &\r
+ Mask) is equal to Value.\r
+\r
+ @param[in] This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.\r
+ @param[in] Width Signifies the width of the memory operations.\r
+ @param[in] Address The base address of the memory operations. The caller is\r
+ responsible for aligning Address if required.\r
+ @param[in] Mask Mask used for the polling criteria. Bytes above Width in Mask\r
+ are ignored. The bits in the bytes below Width which are zero in\r
+ Mask are ignored when polling the memory address.\r
+ @param[in] Value The comparison value used for the polling exit criteria.\r
+ @param[in] Delay The number of 100 ns units to poll. Note that timer available may\r
+ be of poorer granularity.\r
+ @param[out] Result Pointer to the last value read from the memory location.\r
+ \r
+ @retval EFI_SUCCESS The last data returned from the access matched the poll exit criteria.\r
+ @retval EFI_INVALID_PARAMETER Width is invalid.\r
+ @retval EFI_INVALID_PARAMETER Result is NULL.\r
+ @retval EFI_TIMEOUT Delay expired before a match occurred.\r
+ @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.\r
+\r
+**/\r
EFI_STATUS\r
EFIAPI\r
RootBridgeIoPollMem ( \r
OUT UINT64 *Result\r
);\r
\r
+/**\r
+ Reads from the I/O space of a PCI Root Bridge. Returns when either the polling exit criteria is\r
+ satisfied or after a defined duration.\r
+\r
+ This function provides a standard way to poll a PCI I/O location. A PCI I/O read operation is\r
+ performed at the PCI I/O address specified by Address for the width specified by Width.\r
+ The result of this PCI I/O read operation is stored in Result. This PCI I/O read operation is\r
+ repeated until either a timeout of Delay 100 ns units has expired, or (Result & Mask) is equal\r
+ to Value.\r
+\r
+ @param[in] This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.\r
+ @param[in] Width Signifies the width of the I/O operations.\r
+ @param[in] Address The base address of the I/O operations. The caller is responsible\r
+ for aligning Address if required.\r
+ @param[in] Mask Mask used for the polling criteria. Bytes above Width in Mask\r
+ are ignored. The bits in the bytes below Width which are zero in\r
+ Mask are ignored when polling the I/O address.\r
+ @param[in] Value The comparison value used for the polling exit criteria.\r
+ @param[in] Delay The number of 100 ns units to poll. Note that timer available may\r
+ be of poorer granularity.\r
+ @param[out] Result Pointer to the last value read from the memory location.\r
+ \r
+ @retval EFI_SUCCESS The last data returned from the access matched the poll exit criteria.\r
+ @retval EFI_INVALID_PARAMETER Width is invalid.\r
+ @retval EFI_INVALID_PARAMETER Result is NULL.\r
+ @retval EFI_TIMEOUT Delay expired before a match occurred.\r
+ @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.\r
+\r
+**/\r
EFI_STATUS\r
EFIAPI\r
RootBridgeIoPollIo ( \r
OUT UINT64 *Result\r
);\r
\r
+/**\r
+ Enables a PCI driver to access PCI controller registers in the PCI root bridge memory space.\r
+\r
+ The Mem.Read(), and Mem.Write() functions enable a driver to access PCI controller\r
+ registers in the PCI root bridge memory space.\r
+ The memory operations are carried out exactly as requested. The caller is responsible for satisfying\r
+ any alignment and memory width restrictions that a PCI Root Bridge on a platform might require.\r
+\r
+ @param[in] This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.\r
+ @param[in] Width Signifies the width of the memory operation.\r
+ @param[in] Address The base address of the memory operation. The caller is\r
+ responsible for aligning the Address if required.\r
+ @param[in] Count The number of memory operations to perform. Bytes moved is\r
+ Width size * Count, starting at Address.\r
+ @param[out] Buffer For read operations, the destination buffer to store the results. For\r
+ write operations, the source buffer to write data from.\r
+ \r
+ @retval EFI_SUCCESS The data was read from or written to the PCI root bridge.\r
+ @retval EFI_INVALID_PARAMETER Width is invalid for this PCI root bridge.\r
+ @retval EFI_INVALID_PARAMETER Buffer is NULL.\r
+ @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.\r
+\r
+**/\r
EFI_STATUS\r
EFIAPI\r
RootBridgeIoMemRead (\r
IN OUT VOID *Buffer\r
);\r
\r
+/**\r
+ Enables a PCI driver to access PCI controller registers in the PCI root bridge memory space.\r
+\r
+ The Mem.Read(), and Mem.Write() functions enable a driver to access PCI controller\r
+ registers in the PCI root bridge memory space.\r
+ The memory operations are carried out exactly as requested. The caller is responsible for satisfying\r
+ any alignment and memory width restrictions that a PCI Root Bridge on a platform might require.\r
+\r
+ @param[in] This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.\r
+ @param[in] Width Signifies the width of the memory operation.\r
+ @param[in] Address The base address of the memory operation. The caller is\r
+ responsible for aligning the Address if required.\r
+ @param[in] Count The number of memory operations to perform. Bytes moved is\r
+ Width size * Count, starting at Address.\r
+ @param[out] Buffer For read operations, the destination buffer to store the results. For\r
+ write operations, the source buffer to write data from.\r
+ \r
+ @retval EFI_SUCCESS The data was read from or written to the PCI root bridge.\r
+ @retval EFI_INVALID_PARAMETER Width is invalid for this PCI root bridge.\r
+ @retval EFI_INVALID_PARAMETER Buffer is NULL.\r
+ @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.\r
+**/\r
EFI_STATUS\r
EFIAPI\r
RootBridgeIoMemWrite (\r
IN OUT VOID *Buffer\r
);\r
\r
+/**\r
+ Enables a PCI driver to access PCI controller registers in the PCI root bridge I/O space.\r
+\r
+ @param[in] This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.\r
+ @param[in] Width Signifies the width of the memory operations.\r
+ @param[in] Address The base address of the I/O operation. The caller is responsible for\r
+ aligning the Address if required.\r
+ @param[in] Count The number of I/O operations to perform. Bytes moved is Width\r
+ size * Count, starting at Address.\r
+ @param[out] Buffer For read operations, the destination buffer to store the results. For\r
+ write operations, the source buffer to write data from.\r
+ \r
+ @retval EFI_SUCCESS The data was read from or written to the PCI root bridge.\r
+ @retval EFI_INVALID_PARAMETER Width is invalid for this PCI root bridge.\r
+ @retval EFI_INVALID_PARAMETER Buffer is NULL.\r
+ @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.\r
+\r
+**/\r
EFI_STATUS\r
EFIAPI\r
RootBridgeIoIoRead (\r
IN OUT VOID *UserBuffer\r
);\r
\r
+/**\r
+ Enables a PCI driver to access PCI controller registers in the PCI root bridge I/O space.\r
+\r
+ @param[in] This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.\r
+ @param[in] Width Signifies the width of the memory operations.\r
+ @param[in] Address The base address of the I/O operation. The caller is responsible for\r
+ aligning the Address if required.\r
+ @param[in] Count The number of I/O operations to perform. Bytes moved is Width\r
+ size * Count, starting at Address.\r
+ @param[out] Buffer For read operations, the destination buffer to store the results. For\r
+ write operations, the source buffer to write data from.\r
+ \r
+ @retval EFI_SUCCESS The data was read from or written to the PCI root bridge.\r
+ @retval EFI_INVALID_PARAMETER Width is invalid for this PCI root bridge.\r
+ @retval EFI_INVALID_PARAMETER Buffer is NULL.\r
+ @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.\r
+\r
+**/\r
EFI_STATUS\r
EFIAPI\r
RootBridgeIoIoWrite (\r
IN OUT VOID *UserBuffer\r
);\r
\r
+/**\r
+ Enables a PCI driver to copy one region of PCI root bridge memory space to another region of PCI\r
+ root bridge memory space.\r
+\r
+ The CopyMem() function enables a PCI driver to copy one region of PCI root bridge memory\r
+ space to another region of PCI root bridge memory space. This is especially useful for video scroll\r
+ operation on a memory mapped video buffer.\r
+ The memory operations are carried out exactly as requested. The caller is responsible for satisfying\r
+ any alignment and memory width restrictions that a PCI root bridge on a platform might require.\r
+\r
+ @param[in] This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL instance.\r
+ @param[in] Width Signifies the width of the memory operations.\r
+ @param[in] DestAddress The destination address of the memory operation. The caller is\r
+ responsible for aligning the DestAddress if required.\r
+ @param[in] SrcAddress The source address of the memory operation. The caller is\r
+ responsible for aligning the SrcAddress if required.\r
+ @param[in] Count The number of memory operations to perform. Bytes moved is\r
+ Width size * Count, starting at DestAddress and SrcAddress.\r
+ \r
+ @retval EFI_SUCCESS The data was copied from one memory region to another memory region.\r
+ @retval EFI_INVALID_PARAMETER Width is invalid for this PCI root bridge.\r
+ @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.\r
+\r
+**/\r
EFI_STATUS\r
EFIAPI\r
RootBridgeIoCopyMem (\r
IN UINTN Count\r
);\r
\r
+/**\r
+ Enables a PCI driver to access PCI controller registers in a PCI root bridge's configuration space.\r
+\r
+ The Pci.Read() and Pci.Write() functions enable a driver to access PCI configuration\r
+ registers for a PCI controller.\r
+ The PCI Configuration operations are carried out exactly as requested. The caller is responsible for\r
+ any alignment and PCI configuration width issues that a PCI Root Bridge on a platform might\r
+ require.\r
+\r
+ @param[in] This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.\r
+ @param[in] Width Signifies the width of the memory operations.\r
+ @param[in] Address The address within the PCI configuration space for the PCI controller.\r
+ @param[in] Count The number of PCI configuration operations to perform. Bytes\r
+ moved is Width size * Count, starting at Address.\r
+ @param[out] Buffer For read operations, the destination buffer to store the results. For\r
+ write operations, the source buffer to write data from.\r
+ \r
+ @retval EFI_SUCCESS The data was read from or written to the PCI root bridge.\r
+ @retval EFI_INVALID_PARAMETER Width is invalid for this PCI root bridge.\r
+ @retval EFI_INVALID_PARAMETER Buffer is NULL.\r
+ @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.\r
+\r
+**/\r
EFI_STATUS\r
EFIAPI\r
RootBridgeIoPciRead (\r
IN OUT VOID *Buffer\r
);\r
\r
+/**\r
+ Enables a PCI driver to access PCI controller registers in a PCI root bridge's configuration space.\r
+\r
+ The Pci.Read() and Pci.Write() functions enable a driver to access PCI configuration\r
+ registers for a PCI controller.\r
+ The PCI Configuration operations are carried out exactly as requested. The caller is responsible for\r
+ any alignment and PCI configuration width issues that a PCI Root Bridge on a platform might\r
+ require.\r
+\r
+ @param[in] This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.\r
+ @param[in] Width Signifies the width of the memory operations.\r
+ @param[in] Address The address within the PCI configuration space for the PCI controller.\r
+ @param[in] Count The number of PCI configuration operations to perform. Bytes\r
+ moved is Width size * Count, starting at Address.\r
+ @param[out] Buffer For read operations, the destination buffer to store the results. For\r
+ write operations, the source buffer to write data from.\r
+ \r
+ @retval EFI_SUCCESS The data was read from or written to the PCI root bridge.\r
+ @retval EFI_INVALID_PARAMETER Width is invalid for this PCI root bridge.\r
+ @retval EFI_INVALID_PARAMETER Buffer is NULL.\r
+ @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.\r
+\r
+**/\r
EFI_STATUS\r
EFIAPI\r
RootBridgeIoPciWrite (\r
IN OUT VOID *Buffer\r
);\r
\r
+/**\r
+ Provides the PCI controller-specific addresses required to access system memory from a\r
+ DMA bus master.\r
+\r
+ The Map() function provides the PCI controller specific addresses needed to access system\r
+ memory. This function is used to map system memory for PCI bus master DMA accesses.\r
+\r
+ @param[in] This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.\r
+ @param[in] Operation Indicates if the bus master is going to read or write to system memory.\r
+ @param[in] HostAddress The system memory address to map to the PCI controller.\r
+ @param[in][out] NumberOfBytes On input the number of bytes to map. On output the number of bytes that were mapped.\r
+ @param[out] DeviceAddress The resulting map address for the bus master PCI controller to use\r
+ to access the system memory's HostAddress.\r
+ @param[out] Mapping The value to pass to Unmap() when the bus master DMA operation is complete.\r
+ \r
+ @retval EFI_SUCCESS The range was mapped for the returned NumberOfBytes.\r
+ @retval EFI_INVALID_PARAMETER Operation is invalid.\r
+ @retval EFI_INVALID_PARAMETER HostAddress is NULL.\r
+ @retval EFI_INVALID_PARAMETER NumberOfBytes is NULL.\r
+ @retval EFI_INVALID_PARAMETER DeviceAddress is NULL.\r
+ @retval EFI_INVALID_PARAMETER Mapping is NULL.\r
+ @retval EFI_UNSUPPORTED The HostAddress cannot be mapped as a common buffer.\r
+ @retval EFI_DEVICE_ERROR The system hardware could not map the requested address.\r
+ @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.\r
+\r
+**/\r
EFI_STATUS\r
EFIAPI\r
RootBridgeIoMap (\r
OUT VOID **Mapping\r
);\r
\r
+/**\r
+ Completes the Map() operation and releases any corresponding resources.\r
+\r
+ The Unmap() function completes the Map() operation and releases any corresponding resources.\r
+ If the operation was an EfiPciOperationBusMasterWrite or\r
+ EfiPciOperationBusMasterWrite64, the data is committed to the target system memory.\r
+ Any resources used for the mapping are freed. \r
+\r
+ @param[in] This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.\r
+ @param[in] Mapping The mapping value returned from Map().\r
+ \r
+ @retval EFI_SUCCESS The range was unmapped.\r
+ @retval EFI_INVALID_PARAMETER Mapping is not a value that was returned by Map().\r
+ @retval EFI_DEVICE_ERROR The data was not committed to the target system memory.\r
+\r
+**/\r
EFI_STATUS\r
EFIAPI\r
RootBridgeIoUnmap (\r
IN VOID *Mapping\r
);\r
\r
+/**\r
+ Allocates pages that are suitable for an EfiPciOperationBusMasterCommonBuffer or\r
+ EfiPciOperationBusMasterCommonBuffer64 mapping.\r
+ \r
+ @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.\r
+ @param Type This parameter is not used and must be ignored.\r
+ @param MemoryType The type of memory to allocate, EfiBootServicesData or EfiRuntimeServicesData.\r
+ @param Pages The number of pages to allocate.\r
+ @param HostAddress A pointer to store the base system memory address of the allocated range.\r
+ @param Attributes The requested bit mask of attributes for the allocated range. Only\r
+ the attributes EFI_PCI_ATTRIBUTE_MEMORY_WRITE_COMBINE, EFI_PCI_ATTRIBUTE_MEMORY_CACHED, \r
+ and EFI_PCI_ATTRIBUTE_DUAL_ADDRESS_CYCLE may be used with this function.\r
+ \r
+ @retval EFI_SUCCESS The requested memory pages were allocated.\r
+ @retval EFI_INVALID_PARAMETER MemoryType is invalid.\r
+ @retval EFI_INVALID_PARAMETER HostAddress is NULL.\r
+ @retval EFI_UNSUPPORTED Attributes is unsupported. The only legal attribute bits are\r
+ MEMORY_WRITE_COMBINE, MEMORY_CACHED, and DUAL_ADDRESS_CYCLE.\r
+ @retval EFI_OUT_OF_RESOURCES The memory pages could not be allocated.\r
+\r
+**/\r
EFI_STATUS\r
EFIAPI\r
RootBridgeIoAllocateBuffer (\r
IN UINT64 Attributes\r
);\r
\r
+/**\r
+ Frees memory that was allocated with AllocateBuffer().\r
+\r
+ The FreeBuffer() function frees memory that was allocated with AllocateBuffer().\r
+\r
+ @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.\r
+ @param Pages The number of pages to free.\r
+ @param HostAddress The base system memory address of the allocated range.\r
+ \r
+ @retval EFI_SUCCESS The requested memory pages were freed.\r
+ @retval EFI_INVALID_PARAMETER The memory range specified by HostAddress and Pages\r
+ was not allocated with AllocateBuffer().\r
+\r
+**/\r
EFI_STATUS\r
EFIAPI\r
RootBridgeIoFreeBuffer (\r
OUT VOID *HostAddress\r
);\r
\r
+/**\r
+ Flushes all PCI posted write transactions from a PCI host bridge to system memory.\r
+\r
+ The Flush() function flushes any PCI posted write transactions from a PCI host bridge to system\r
+ memory. Posted write transactions are generated by PCI bus masters when they perform write\r
+ transactions to target addresses in system memory.\r
+ This function does not flush posted write transactions from any PCI bridges. A PCI controller\r
+ specific action must be taken to guarantee that the posted write transactions have been flushed from\r
+ the PCI controller and from all the PCI bridges into the PCI host bridge. This is typically done with\r
+ a PCI read transaction from the PCI controller prior to calling Flush().\r
+\r
+ @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.\r
+ \r
+ @retval EFI_SUCCESS The PCI posted write transactions were flushed from the PCI host\r
+ bridge to system memory.\r
+ @retval EFI_DEVICE_ERROR The PCI posted write transactions were not flushed from the PCI\r
+ host bridge due to a hardware error.\r
+\r
+**/\r
EFI_STATUS\r
EFIAPI\r
RootBridgeIoFlush (\r
IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This\r
);\r
\r
+/**\r
+ Gets the attributes that a PCI root bridge supports setting with SetAttributes(), and the\r
+ attributes that a PCI root bridge is currently using. \r
+\r
+ The GetAttributes() function returns the mask of attributes that this PCI root bridge supports\r
+ and the mask of attributes that the PCI root bridge is currently using.\r
+\r
+ @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.\r
+ @param Supported A pointer to the mask of attributes that this PCI root bridge\r
+ supports setting with SetAttributes().\r
+ @param Attributes A pointer to the mask of attributes that this PCI root bridge is\r
+ currently using.\r
+ \r
+ @retval EFI_SUCCESS If Supports is not NULL, then the attributes that the PCI root\r
+ bridge supports is returned in Supports. If Attributes is\r
+ not NULL, then the attributes that the PCI root bridge is currently\r
+ using is returned in Attributes.\r
+ @retval EFI_INVALID_PARAMETER Both Supports and Attributes are NULL.\r
+\r
+**/\r
EFI_STATUS\r
EFIAPI\r
RootBridgeIoGetAttributes (\r
OUT UINT64 *Attributes\r
);\r
\r
+/**\r
+ Sets attributes for a resource range on a PCI root bridge.\r
+\r
+ The SetAttributes() function sets the attributes specified in Attributes for the PCI root\r
+ bridge on the resource range specified by ResourceBase and ResourceLength. Since the\r
+ granularity of setting these attributes may vary from resource type to resource type, and from\r
+ platform to platform, the actual resource range and the one passed in by the caller may differ. As a\r
+ result, this function may set the attributes specified by Attributes on a larger resource range\r
+ than the caller requested. The actual range is returned in ResourceBase and\r
+ ResourceLength. The caller is responsible for verifying that the actual range for which the\r
+ attributes were set is acceptable.\r
+\r
+ @param[in] This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.\r
+ @param[in] Attributes The mask of attributes to set. If the attribute bit\r
+ MEMORY_WRITE_COMBINE, MEMORY_CACHED, or\r
+ MEMORY_DISABLE is set, then the resource range is specified by\r
+ ResourceBase and ResourceLength. If\r
+ MEMORY_WRITE_COMBINE, MEMORY_CACHED, and\r
+ MEMORY_DISABLE are not set, then ResourceBase and\r
+ ResourceLength are ignored, and may be NULL.\r
+ @param[in][out] ResourceBase A pointer to the base address of the resource range to be modified\r
+ by the attributes specified by Attributes.\r
+ @param[in][out] ResourceLength A pointer to the length of the resource range to be modified by the\r
+ attributes specified by Attributes.\r
+ \r
+ @retval EFI_SUCCESS The current configuration of this PCI root bridge was returned in Resources.\r
+ @retval EFI_UNSUPPORTED The current configuration of this PCI root bridge could not be retrieved.\r
+ @retval EFI_INVALID_PARAMETER Invalid pointer of EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL\r
+\r
+**/\r
EFI_STATUS\r
EFIAPI\r
RootBridgeIoSetAttributes (\r
IN OUT UINT64 *ResourceLength \r
); \r
\r
+/**\r
+ Retrieves the current resource settings of this PCI root bridge in the form of a set of ACPI 2.0\r
+ resource descriptors.\r
+\r
+ There are only two resource descriptor types from the ACPI Specification that may be used to\r
+ describe the current resources allocated to a PCI root bridge. These are the QWORD Address\r
+ Space Descriptor (ACPI 2.0 Section 6.4.3.5.1), and the End Tag (ACPI 2.0 Section 6.4.2.8). The\r
+ QWORD Address Space Descriptor can describe memory, I/O, and bus number ranges for dynamic\r
+ or fixed resources. The configuration of a PCI root bridge is described with one or more QWORD\r
+ Address Space Descriptors followed by an End Tag.\r
+\r
+ @param[in] This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.\r
+ @param[out] Resources A pointer to the ACPI 2.0 resource descriptors that describe the\r
+ current configuration of this PCI root bridge. The storage for the\r
+ ACPI 2.0 resource descriptors is allocated by this function. The\r
+ caller must treat the return buffer as read-only data, and the buffer\r
+ must not be freed by the caller.\r
+ \r
+ @retval EFI_SUCCESS The current configuration of this PCI root bridge was returned in Resources.\r
+ @retval EFI_UNSUPPORTED The current configuration of this PCI root bridge could not be retrieved.\r
+ @retval EFI_INVALID_PARAMETER Invalid pointer of EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL\r
+\r
+**/\r
EFI_STATUS\r
EFIAPI\r
RootBridgeIoConfiguration (\r
//\r
// Sub Function Prototypes\r
//\r
+/**\r
+ Internal help function for read and write PCI configuration space.\r
+\r
+ @param[in] This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.\r
+ @param[in] Write Switch value for Read or Write.\r
+ @param[in] Width Signifies the width of the memory operations.\r
+ @param[in] UserAddress The address within the PCI configuration space for the PCI controller.\r
+ @param[in] Count The number of PCI configuration operations to perform. Bytes\r
+ moved is Width size * Count, starting at Address.\r
+ @param[out] UserBuffer For read operations, the destination buffer to store the results. For\r
+ write operations, the source buffer to write data from.\r
+ \r
+ @retval EFI_SUCCESS The data was read from or written to the PCI root bridge.\r
+ @retval EFI_INVALID_PARAMETER Width is invalid for this PCI root bridge.\r
+ @retval EFI_INVALID_PARAMETER Buffer is NULL.\r
+ @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.\r
+\r
+**/\r
EFI_STATUS\r
RootBridgeIoPciRW (\r
IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,\r
EFI_METRONOME_ARCH_PROTOCOL *mMetronome;\r
EFI_CPU_IO2_PROTOCOL *mCpuIo;\r
\r
+/**\r
+\r
+ Construct the Pci Root Bridge Io protocol\r
+\r
+ @param Protocol Point to protocol instance\r
+ @param HostBridgeHandle Handle of host bridge\r
+ @param Attri Attribute of host bridge\r
+ @param ResAppeture ResourceAppeture for host bridge\r
+\r
+ @retval EFI_SUCCESS Success to initialize the Pci Root Bridge.\r
+\r
+**/\r
EFI_STATUS\r
RootBridgeConstructor (\r
IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *Protocol,\r
IN UINT64 Attri,\r
IN PCI_ROOT_BRIDGE_RESOURCE_APPETURE *ResAppeture\r
)\r
-/*++\r
-\r
-Routine Description:\r
-\r
- Construct the Pci Root Bridge Io protocol\r
-\r
-Arguments:\r
-\r
- Protocol - protocol to initialize\r
- \r
-Returns:\r
-\r
- None\r
-\r
---*/\r
{\r
EFI_STATUS Status;\r
PCI_ROOT_BRIDGE_INSTANCE *PrivateData;\r
return EFI_SUCCESS;\r
}\r
\r
+/**\r
+ Polls an address in memory mapped I/O space until an exit condition is met, or \r
+ a timeout occurs. \r
+\r
+ This function provides a standard way to poll a PCI memory location. A PCI memory read\r
+ operation is performed at the PCI memory address specified by Address for the width specified\r
+ by Width. The result of this PCI memory read operation is stored in Result. This PCI memory\r
+ read operation is repeated until either a timeout of Delay 100 ns units has expired, or (Result &\r
+ Mask) is equal to Value.\r
+\r
+ @param[in] This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.\r
+ @param[in] Width Signifies the width of the memory operations.\r
+ @param[in] Address The base address of the memory operations. The caller is\r
+ responsible for aligning Address if required.\r
+ @param[in] Mask Mask used for the polling criteria. Bytes above Width in Mask\r
+ are ignored. The bits in the bytes below Width which are zero in\r
+ Mask are ignored when polling the memory address.\r
+ @param[in] Value The comparison value used for the polling exit criteria.\r
+ @param[in] Delay The number of 100 ns units to poll. Note that timer available may\r
+ be of poorer granularity.\r
+ @param[out] Result Pointer to the last value read from the memory location.\r
+ \r
+ @retval EFI_SUCCESS The last data returned from the access matched the poll exit criteria.\r
+ @retval EFI_INVALID_PARAMETER Width is invalid.\r
+ @retval EFI_INVALID_PARAMETER Result is NULL.\r
+ @retval EFI_TIMEOUT Delay expired before a match occurred.\r
+ @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.\r
+\r
+**/\r
EFI_STATUS\r
EFIAPI\r
RootBridgeIoPollMem ( \r
IN UINT64 Delay,\r
OUT UINT64 *Result\r
)\r
-/*++\r
-\r
-Routine Description:\r
- Memory Poll\r
- \r
-Arguments:\r
- \r
-Returns:\r
-\r
---*/ \r
{\r
EFI_STATUS Status;\r
UINT64 NumberOfTicks;\r
return EFI_TIMEOUT;\r
}\r
\r
+/**\r
+ Reads from the I/O space of a PCI Root Bridge. Returns when either the polling exit criteria is\r
+ satisfied or after a defined duration.\r
+\r
+ This function provides a standard way to poll a PCI I/O location. A PCI I/O read operation is\r
+ performed at the PCI I/O address specified by Address for the width specified by Width.\r
+ The result of this PCI I/O read operation is stored in Result. This PCI I/O read operation is\r
+ repeated until either a timeout of Delay 100 ns units has expired, or (Result & Mask) is equal\r
+ to Value.\r
+\r
+ @param[in] This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.\r
+ @param[in] Width Signifies the width of the I/O operations.\r
+ @param[in] Address The base address of the I/O operations. The caller is responsible\r
+ for aligning Address if required.\r
+ @param[in] Mask Mask used for the polling criteria. Bytes above Width in Mask\r
+ are ignored. The bits in the bytes below Width which are zero in\r
+ Mask are ignored when polling the I/O address.\r
+ @param[in] Value The comparison value used for the polling exit criteria.\r
+ @param[in] Delay The number of 100 ns units to poll. Note that timer available may\r
+ be of poorer granularity.\r
+ @param[out] Result Pointer to the last value read from the memory location.\r
+ \r
+ @retval EFI_SUCCESS The last data returned from the access matched the poll exit criteria.\r
+ @retval EFI_INVALID_PARAMETER Width is invalid.\r
+ @retval EFI_INVALID_PARAMETER Result is NULL.\r
+ @retval EFI_TIMEOUT Delay expired before a match occurred.\r
+ @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.\r
+\r
+**/\r
EFI_STATUS\r
EFIAPI\r
RootBridgeIoPollIo ( \r
IN UINT64 Delay,\r
OUT UINT64 *Result\r
)\r
-/*++\r
-\r
-Routine Description:\r
- Io Poll\r
- \r
-Arguments:\r
- \r
-Returns:\r
-\r
---*/ \r
{\r
EFI_STATUS Status;\r
UINT64 NumberOfTicks;\r
return EFI_TIMEOUT;\r
}\r
\r
+/**\r
+ Enables a PCI driver to access PCI controller registers in the PCI root bridge memory space.\r
+\r
+ The Mem.Read(), and Mem.Write() functions enable a driver to access PCI controller\r
+ registers in the PCI root bridge memory space.\r
+ The memory operations are carried out exactly as requested. The caller is responsible for satisfying\r
+ any alignment and memory width restrictions that a PCI Root Bridge on a platform might require.\r
+\r
+ @param[in] This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.\r
+ @param[in] Width Signifies the width of the memory operation.\r
+ @param[in] Address The base address of the memory operation. The caller is\r
+ responsible for aligning the Address if required.\r
+ @param[in] Count The number of memory operations to perform. Bytes moved is\r
+ Width size * Count, starting at Address.\r
+ @param[out] Buffer For read operations, the destination buffer to store the results. For\r
+ write operations, the source buffer to write data from.\r
+ \r
+ @retval EFI_SUCCESS The data was read from or written to the PCI root bridge.\r
+ @retval EFI_INVALID_PARAMETER Width is invalid for this PCI root bridge.\r
+ @retval EFI_INVALID_PARAMETER Buffer is NULL.\r
+ @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.\r
+\r
+**/\r
EFI_STATUS\r
EFIAPI\r
RootBridgeIoMemRead (\r
IN UINTN Count,\r
IN OUT VOID *Buffer\r
)\r
-/*++\r
-\r
-Routine Description:\r
- Memory read\r
- \r
-Arguments:\r
- \r
-Returns:\r
-\r
---*/ \r
{\r
PCI_ROOT_BRIDGE_INSTANCE *PrivateData;\r
EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH OldWidth;\r
Address, OldCount, Buffer);\r
}\r
\r
+/**\r
+ Enables a PCI driver to access PCI controller registers in the PCI root bridge memory space.\r
+\r
+ The Mem.Read(), and Mem.Write() functions enable a driver to access PCI controller\r
+ registers in the PCI root bridge memory space.\r
+ The memory operations are carried out exactly as requested. The caller is responsible for satisfying\r
+ any alignment and memory width restrictions that a PCI Root Bridge on a platform might require.\r
+\r
+ @param[in] This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.\r
+ @param[in] Width Signifies the width of the memory operation.\r
+ @param[in] Address The base address of the memory operation. The caller is\r
+ responsible for aligning the Address if required.\r
+ @param[in] Count The number of memory operations to perform. Bytes moved is\r
+ Width size * Count, starting at Address.\r
+ @param[out] Buffer For read operations, the destination buffer to store the results. For\r
+ write operations, the source buffer to write data from.\r
+ \r
+ @retval EFI_SUCCESS The data was read from or written to the PCI root bridge.\r
+ @retval EFI_INVALID_PARAMETER Width is invalid for this PCI root bridge.\r
+ @retval EFI_INVALID_PARAMETER Buffer is NULL.\r
+ @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.\r
+**/\r
EFI_STATUS\r
EFIAPI\r
RootBridgeIoMemWrite (\r
IN UINTN Count,\r
IN OUT VOID *Buffer\r
)\r
-/*++\r
-\r
-Routine Description:\r
- Memory write\r
- \r
-Arguments:\r
- \r
-Returns:\r
-\r
---*/ \r
{\r
PCI_ROOT_BRIDGE_INSTANCE *PrivateData;\r
EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH OldWidth;\r
Address, OldCount, Buffer);\r
}\r
\r
+/**\r
+ Enables a PCI driver to access PCI controller registers in the PCI root bridge I/O space.\r
+\r
+ @param[in] This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.\r
+ @param[in] Width Signifies the width of the memory operations.\r
+ @param[in] Address The base address of the I/O operation. The caller is responsible for\r
+ aligning the Address if required.\r
+ @param[in] Count The number of I/O operations to perform. Bytes moved is Width\r
+ size * Count, starting at Address.\r
+ @param[out] Buffer For read operations, the destination buffer to store the results. For\r
+ write operations, the source buffer to write data from.\r
+ \r
+ @retval EFI_SUCCESS The data was read from or written to the PCI root bridge.\r
+ @retval EFI_INVALID_PARAMETER Width is invalid for this PCI root bridge.\r
+ @retval EFI_INVALID_PARAMETER Buffer is NULL.\r
+ @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.\r
+\r
+**/\r
EFI_STATUS\r
EFIAPI\r
RootBridgeIoIoRead (\r
IN UINTN Count,\r
IN OUT VOID *Buffer\r
)\r
-/*++\r
-\r
-Routine Description:\r
- Io read\r
- \r
-Arguments:\r
- \r
-Returns:\r
-\r
---*/ \r
{\r
\r
\r
\r
}\r
\r
+/**\r
+ Enables a PCI driver to access PCI controller registers in the PCI root bridge I/O space.\r
+\r
+ @param[in] This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.\r
+ @param[in] Width Signifies the width of the memory operations.\r
+ @param[in] Address The base address of the I/O operation. The caller is responsible for\r
+ aligning the Address if required.\r
+ @param[in] Count The number of I/O operations to perform. Bytes moved is Width\r
+ size * Count, starting at Address.\r
+ @param[out] Buffer For read operations, the destination buffer to store the results. For\r
+ write operations, the source buffer to write data from.\r
+ \r
+ @retval EFI_SUCCESS The data was read from or written to the PCI root bridge.\r
+ @retval EFI_INVALID_PARAMETER Width is invalid for this PCI root bridge.\r
+ @retval EFI_INVALID_PARAMETER Buffer is NULL.\r
+ @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.\r
+\r
+**/\r
EFI_STATUS\r
EFIAPI\r
RootBridgeIoIoWrite (\r
IN UINTN Count,\r
IN OUT VOID *Buffer\r
)\r
-/*++\r
-\r
-Routine Description:\r
- Io write\r
- \r
-Arguments:\r
- \r
-Returns:\r
-\r
---*/ \r
{\r
UINTN AlignMask;\r
PCI_ROOT_BRIDGE_INSTANCE *PrivateData;\r
\r
}\r
\r
+/**\r
+ Enables a PCI driver to copy one region of PCI root bridge memory space to another region of PCI\r
+ root bridge memory space.\r
+\r
+ The CopyMem() function enables a PCI driver to copy one region of PCI root bridge memory\r
+ space to another region of PCI root bridge memory space. This is especially useful for video scroll\r
+ operation on a memory mapped video buffer.\r
+ The memory operations are carried out exactly as requested. The caller is responsible for satisfying\r
+ any alignment and memory width restrictions that a PCI root bridge on a platform might require.\r
+\r
+ @param[in] This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL instance.\r
+ @param[in] Width Signifies the width of the memory operations.\r
+ @param[in] DestAddress The destination address of the memory operation. The caller is\r
+ responsible for aligning the DestAddress if required.\r
+ @param[in] SrcAddress The source address of the memory operation. The caller is\r
+ responsible for aligning the SrcAddress if required.\r
+ @param[in] Count The number of memory operations to perform. Bytes moved is\r
+ Width size * Count, starting at DestAddress and SrcAddress.\r
+ \r
+ @retval EFI_SUCCESS The data was copied from one memory region to another memory region.\r
+ @retval EFI_INVALID_PARAMETER Width is invalid for this PCI root bridge.\r
+ @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.\r
+\r
+**/\r
EFI_STATUS\r
EFIAPI\r
RootBridgeIoCopyMem (\r
IN UINT64 SrcAddress,\r
IN UINTN Count\r
)\r
-/*++\r
-\r
-Routine Description:\r
- Memory copy\r
- \r
-Arguments:\r
- \r
-Returns:\r
-\r
---*/\r
{\r
EFI_STATUS Status;\r
BOOLEAN Direction;\r
return EFI_SUCCESS;\r
}\r
\r
+/**\r
+ Enables a PCI driver to access PCI controller registers in a PCI root bridge's configuration space.\r
+\r
+ The Pci.Read() and Pci.Write() functions enable a driver to access PCI configuration\r
+ registers for a PCI controller.\r
+ The PCI Configuration operations are carried out exactly as requested. The caller is responsible for\r
+ any alignment and PCI configuration width issues that a PCI Root Bridge on a platform might\r
+ require.\r
+\r
+ @param[in] This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.\r
+ @param[in] Width Signifies the width of the memory operations.\r
+ @param[in] Address The address within the PCI configuration space for the PCI controller.\r
+ @param[in] Count The number of PCI configuration operations to perform. Bytes\r
+ moved is Width size * Count, starting at Address.\r
+ @param[out] Buffer For read operations, the destination buffer to store the results. For\r
+ write operations, the source buffer to write data from.\r
+ \r
+ @retval EFI_SUCCESS The data was read from or written to the PCI root bridge.\r
+ @retval EFI_INVALID_PARAMETER Width is invalid for this PCI root bridge.\r
+ @retval EFI_INVALID_PARAMETER Buffer is NULL.\r
+ @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.\r
+\r
+**/\r
EFI_STATUS\r
EFIAPI\r
RootBridgeIoPciRead (\r
IN UINTN Count,\r
IN OUT VOID *Buffer\r
)\r
-/*++\r
-\r
-Routine Description:\r
- Pci read\r
- \r
-Arguments:\r
- \r
-Returns:\r
-\r
---*/ \r
{\r
\r
if (Buffer == NULL) {\r
return RootBridgeIoPciRW (This, FALSE, Width, Address, Count, Buffer);\r
}\r
\r
+/**\r
+ Enables a PCI driver to access PCI controller registers in a PCI root bridge's configuration space.\r
+\r
+ The Pci.Read() and Pci.Write() functions enable a driver to access PCI configuration\r
+ registers for a PCI controller.\r
+ The PCI Configuration operations are carried out exactly as requested. The caller is responsible for\r
+ any alignment and PCI configuration width issues that a PCI Root Bridge on a platform might\r
+ require.\r
+\r
+ @param[in] This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.\r
+ @param[in] Width Signifies the width of the memory operations.\r
+ @param[in] Address The address within the PCI configuration space for the PCI controller.\r
+ @param[in] Count The number of PCI configuration operations to perform. Bytes\r
+ moved is Width size * Count, starting at Address.\r
+ @param[out] Buffer For read operations, the destination buffer to store the results. For\r
+ write operations, the source buffer to write data from.\r
+ \r
+ @retval EFI_SUCCESS The data was read from or written to the PCI root bridge.\r
+ @retval EFI_INVALID_PARAMETER Width is invalid for this PCI root bridge.\r
+ @retval EFI_INVALID_PARAMETER Buffer is NULL.\r
+ @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.\r
+\r
+**/\r
EFI_STATUS\r
EFIAPI\r
RootBridgeIoPciWrite (\r
IN UINTN Count,\r
IN OUT VOID *Buffer\r
)\r
-/*++\r
-\r
-Routine Description:\r
- Pci write\r
- \r
-Arguments:\r
- \r
-Returns:\r
-\r
---*/ \r
{\r
\r
if (Buffer == NULL) {\r
return RootBridgeIoPciRW (This, TRUE, Width, Address, Count, Buffer);\r
}\r
\r
+/**\r
+ Provides the PCI controller-specific addresses required to access system memory from a\r
+ DMA bus master.\r
+\r
+ The Map() function provides the PCI controller specific addresses needed to access system\r
+ memory. This function is used to map system memory for PCI bus master DMA accesses.\r
+\r
+ @param[in] This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.\r
+ @param[in] Operation Indicates if the bus master is going to read or write to system memory.\r
+ @param[in] HostAddress The system memory address to map to the PCI controller.\r
+ @param[in][out] NumberOfBytes On input the number of bytes to map. On output the number of bytes that were mapped.\r
+ @param[out] DeviceAddress The resulting map address for the bus master PCI controller to use\r
+ to access the system memory's HostAddress.\r
+ @param[out] Mapping The value to pass to Unmap() when the bus master DMA operation is complete.\r
+ \r
+ @retval EFI_SUCCESS The range was mapped for the returned NumberOfBytes.\r
+ @retval EFI_INVALID_PARAMETER Operation is invalid.\r
+ @retval EFI_INVALID_PARAMETER HostAddress is NULL.\r
+ @retval EFI_INVALID_PARAMETER NumberOfBytes is NULL.\r
+ @retval EFI_INVALID_PARAMETER DeviceAddress is NULL.\r
+ @retval EFI_INVALID_PARAMETER Mapping is NULL.\r
+ @retval EFI_UNSUPPORTED The HostAddress cannot be mapped as a common buffer.\r
+ @retval EFI_DEVICE_ERROR The system hardware could not map the requested address.\r
+ @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.\r
+\r
+**/\r
EFI_STATUS\r
EFIAPI\r
RootBridgeIoMap (\r
OUT EFI_PHYSICAL_ADDRESS *DeviceAddress,\r
OUT VOID **Mapping\r
)\r
-\r
{\r
EFI_STATUS Status;\r
EFI_PHYSICAL_ADDRESS PhysicalAddress;\r
return EFI_SUCCESS;\r
}\r
\r
+/**\r
+ Completes the Map() operation and releases any corresponding resources.\r
+\r
+ The Unmap() function completes the Map() operation and releases any corresponding resources.\r
+ If the operation was an EfiPciOperationBusMasterWrite or\r
+ EfiPciOperationBusMasterWrite64, the data is committed to the target system memory.\r
+ Any resources used for the mapping are freed. \r
+\r
+ @param[in] This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.\r
+ @param[in] Mapping The mapping value returned from Map().\r
+ \r
+ @retval EFI_SUCCESS The range was unmapped.\r
+ @retval EFI_INVALID_PARAMETER Mapping is not a value that was returned by Map().\r
+ @retval EFI_DEVICE_ERROR The data was not committed to the target system memory.\r
+\r
+**/\r
EFI_STATUS\r
EFIAPI\r
RootBridgeIoUnmap (\r
IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,\r
IN VOID *Mapping\r
)\r
-\r
{\r
MAP_INFO *MapInfo;\r
\r
return EFI_SUCCESS;\r
}\r
\r
+/**\r
+ Allocates pages that are suitable for an EfiPciOperationBusMasterCommonBuffer or\r
+ EfiPciOperationBusMasterCommonBuffer64 mapping.\r
+ \r
+ @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.\r
+ @param Type This parameter is not used and must be ignored.\r
+ @param MemoryType The type of memory to allocate, EfiBootServicesData or EfiRuntimeServicesData.\r
+ @param Pages The number of pages to allocate.\r
+ @param HostAddress A pointer to store the base system memory address of the allocated range.\r
+ @param Attributes The requested bit mask of attributes for the allocated range. Only\r
+ the attributes EFI_PCI_ATTRIBUTE_MEMORY_WRITE_COMBINE, EFI_PCI_ATTRIBUTE_MEMORY_CACHED, \r
+ and EFI_PCI_ATTRIBUTE_DUAL_ADDRESS_CYCLE may be used with this function.\r
+ \r
+ @retval EFI_SUCCESS The requested memory pages were allocated.\r
+ @retval EFI_INVALID_PARAMETER MemoryType is invalid.\r
+ @retval EFI_INVALID_PARAMETER HostAddress is NULL.\r
+ @retval EFI_UNSUPPORTED Attributes is unsupported. The only legal attribute bits are\r
+ MEMORY_WRITE_COMBINE, MEMORY_CACHED, and DUAL_ADDRESS_CYCLE.\r
+ @retval EFI_OUT_OF_RESOURCES The memory pages could not be allocated.\r
+\r
+**/\r
EFI_STATUS\r
EFIAPI\r
RootBridgeIoAllocateBuffer (\r
OUT VOID **HostAddress,\r
IN UINT64 Attributes\r
)\r
-\r
{\r
EFI_STATUS Status;\r
EFI_PHYSICAL_ADDRESS PhysicalAddress;\r
return EFI_SUCCESS;\r
}\r
\r
+/**\r
+ Frees memory that was allocated with AllocateBuffer().\r
+\r
+ The FreeBuffer() function frees memory that was allocated with AllocateBuffer().\r
+\r
+ @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.\r
+ @param Pages The number of pages to free.\r
+ @param HostAddress The base system memory address of the allocated range.\r
+ \r
+ @retval EFI_SUCCESS The requested memory pages were freed.\r
+ @retval EFI_INVALID_PARAMETER The memory range specified by HostAddress and Pages\r
+ was not allocated with AllocateBuffer().\r
+\r
+**/\r
EFI_STATUS\r
EFIAPI\r
RootBridgeIoFreeBuffer (\r
IN UINTN Pages,\r
OUT VOID *HostAddress\r
)\r
-\r
{\r
return gBS->FreePages ((EFI_PHYSICAL_ADDRESS) (UINTN) HostAddress, Pages);\r
}\r
\r
+/**\r
+ Flushes all PCI posted write transactions from a PCI host bridge to system memory.\r
+\r
+ The Flush() function flushes any PCI posted write transactions from a PCI host bridge to system\r
+ memory. Posted write transactions are generated by PCI bus masters when they perform write\r
+ transactions to target addresses in system memory.\r
+ This function does not flush posted write transactions from any PCI bridges. A PCI controller\r
+ specific action must be taken to guarantee that the posted write transactions have been flushed from\r
+ the PCI controller and from all the PCI bridges into the PCI host bridge. This is typically done with\r
+ a PCI read transaction from the PCI controller prior to calling Flush().\r
+\r
+ @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.\r
+ \r
+ @retval EFI_SUCCESS The PCI posted write transactions were flushed from the PCI host\r
+ bridge to system memory.\r
+ @retval EFI_DEVICE_ERROR The PCI posted write transactions were not flushed from the PCI\r
+ host bridge due to a hardware error.\r
+\r
+**/\r
EFI_STATUS\r
EFIAPI\r
RootBridgeIoFlush (\r
IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This\r
)\r
-/*++\r
-\r
-Routine Description:\r
-\r
-Arguments:\r
- \r
-Returns:\r
-\r
---*/\r
{\r
//\r
// not supported yet\r
return EFI_SUCCESS;\r
}\r
\r
+/**\r
+ Gets the attributes that a PCI root bridge supports setting with SetAttributes(), and the\r
+ attributes that a PCI root bridge is currently using. \r
+\r
+ The GetAttributes() function returns the mask of attributes that this PCI root bridge supports\r
+ and the mask of attributes that the PCI root bridge is currently using.\r
+\r
+ @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.\r
+ @param Supported A pointer to the mask of attributes that this PCI root bridge\r
+ supports setting with SetAttributes().\r
+ @param Attributes A pointer to the mask of attributes that this PCI root bridge is\r
+ currently using.\r
+ \r
+ @retval EFI_SUCCESS If Supports is not NULL, then the attributes that the PCI root\r
+ bridge supports is returned in Supports. If Attributes is\r
+ not NULL, then the attributes that the PCI root bridge is currently\r
+ using is returned in Attributes.\r
+ @retval EFI_INVALID_PARAMETER Both Supports and Attributes are NULL.\r
+\r
+**/\r
EFI_STATUS\r
EFIAPI\r
RootBridgeIoGetAttributes (\r
OUT UINT64 *Supported,\r
OUT UINT64 *Attributes\r
)\r
-/*++\r
-\r
-Routine Description:\r
-\r
-Arguments:\r
- \r
-Returns:\r
-\r
---*/\r
{\r
PCI_ROOT_BRIDGE_INSTANCE *PrivateData;\r
\r
return EFI_SUCCESS;\r
}\r
\r
+/**\r
+ Sets attributes for a resource range on a PCI root bridge.\r
+\r
+ The SetAttributes() function sets the attributes specified in Attributes for the PCI root\r
+ bridge on the resource range specified by ResourceBase and ResourceLength. Since the\r
+ granularity of setting these attributes may vary from resource type to resource type, and from\r
+ platform to platform, the actual resource range and the one passed in by the caller may differ. As a\r
+ result, this function may set the attributes specified by Attributes on a larger resource range\r
+ than the caller requested. The actual range is returned in ResourceBase and\r
+ ResourceLength. The caller is responsible for verifying that the actual range for which the\r
+ attributes were set is acceptable.\r
+\r
+ @param[in] This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.\r
+ @param[in] Attributes The mask of attributes to set. If the attribute bit\r
+ MEMORY_WRITE_COMBINE, MEMORY_CACHED, or\r
+ MEMORY_DISABLE is set, then the resource range is specified by\r
+ ResourceBase and ResourceLength. If\r
+ MEMORY_WRITE_COMBINE, MEMORY_CACHED, and\r
+ MEMORY_DISABLE are not set, then ResourceBase and\r
+ ResourceLength are ignored, and may be NULL.\r
+ @param[in][out] ResourceBase A pointer to the base address of the resource range to be modified\r
+ by the attributes specified by Attributes.\r
+ @param[in][out] ResourceLength A pointer to the length of the resource range to be modified by the\r
+ attributes specified by Attributes.\r
+ \r
+ @retval EFI_SUCCESS The current configuration of this PCI root bridge was returned in Resources.\r
+ @retval EFI_UNSUPPORTED The current configuration of this PCI root bridge could not be retrieved.\r
+ @retval EFI_INVALID_PARAMETER Invalid pointer of EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL\r
+\r
+**/\r
EFI_STATUS\r
EFIAPI\r
RootBridgeIoSetAttributes (\r
IN OUT UINT64 *ResourceBase,\r
IN OUT UINT64 *ResourceLength \r
)\r
-/*++\r
-\r
-Routine Description:\r
-\r
-Arguments:\r
- \r
-Returns:\r
-\r
---*/\r
{\r
PCI_ROOT_BRIDGE_INSTANCE *PrivateData;\r
\r
return EFI_SUCCESS;\r
}\r
\r
+/**\r
+ Retrieves the current resource settings of this PCI root bridge in the form of a set of ACPI 2.0\r
+ resource descriptors.\r
+\r
+ There are only two resource descriptor types from the ACPI Specification that may be used to\r
+ describe the current resources allocated to a PCI root bridge. These are the QWORD Address\r
+ Space Descriptor (ACPI 2.0 Section 6.4.3.5.1), and the End Tag (ACPI 2.0 Section 6.4.2.8). The\r
+ QWORD Address Space Descriptor can describe memory, I/O, and bus number ranges for dynamic\r
+ or fixed resources. The configuration of a PCI root bridge is described with one or more QWORD\r
+ Address Space Descriptors followed by an End Tag.\r
+\r
+ @param[in] This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.\r
+ @param[out] Resources A pointer to the ACPI 2.0 resource descriptors that describe the\r
+ current configuration of this PCI root bridge. The storage for the\r
+ ACPI 2.0 resource descriptors is allocated by this function. The\r
+ caller must treat the return buffer as read-only data, and the buffer\r
+ must not be freed by the caller.\r
+ \r
+ @retval EFI_SUCCESS The current configuration of this PCI root bridge was returned in Resources.\r
+ @retval EFI_UNSUPPORTED The current configuration of this PCI root bridge could not be retrieved.\r
+ @retval EFI_INVALID_PARAMETER Invalid pointer of EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL\r
+\r
+**/\r
EFI_STATUS\r
EFIAPI\r
RootBridgeIoConfiguration (\r
IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,\r
OUT VOID **Resources\r
)\r
-/*++\r
-\r
-Routine Description:\r
-\r
-Arguments:\r
- \r
-Returns:\r
-\r
---*/\r
{\r
PCI_ROOT_BRIDGE_INSTANCE *PrivateData;\r
UINTN Index;\r
//\r
// Internal function\r
//\r
+/**\r
+ Internal help function for read and write PCI configuration space.\r
+\r
+ @param[in] This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.\r
+ @param[in] Write Switch value for Read or Write.\r
+ @param[in] Width Signifies the width of the memory operations.\r
+ @param[in] UserAddress The address within the PCI configuration space for the PCI controller.\r
+ @param[in] Count The number of PCI configuration operations to perform. Bytes\r
+ moved is Width size * Count, starting at Address.\r
+ @param[out] UserBuffer For read operations, the destination buffer to store the results. For\r
+ write operations, the source buffer to write data from.\r
+ \r
+ @retval EFI_SUCCESS The data was read from or written to the PCI root bridge.\r
+ @retval EFI_INVALID_PARAMETER Width is invalid for this PCI root bridge.\r
+ @retval EFI_INVALID_PARAMETER Buffer is NULL.\r
+ @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.\r
+\r
+**/\r
EFI_STATUS\r
RootBridgeIoPciRW (\r
IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,\r
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