edk2: Remove packages moved to edk2-platforms

[mirror_edk2.git] / QuarkPlatformPkg / Library / PlatformSecLib / Ia32 / Platform.inc

diff --git a/QuarkPlatformPkg/Library/PlatformSecLib/Ia32/Platform.inc b/QuarkPlatformPkg/Library/PlatformSecLib/Ia32/Platform.inc
deleted file mode 100644 (file)
index d3ba5f0..0000000
--- a/QuarkPlatformPkg/Library/PlatformSecLib/Ia32/Platform.inc
+++ /dev/null
@@ -1,134 +0,0 @@
-;\r
-; Copyright (c) 2013-2015 Intel Corporation.\r
-;\r
-; SPDX-License-Identifier: BSD-2-Clause-Patent\r
-;\r
-;------------------------------------------------------------------------------\r
-;\r
-; Module Name:\r
-;\r
-;   Platform.inc\r
-;\r
-; Abstract:\r
-;\r
-;   Quark A0 Platform Specific Definitions\r
-;\r
-;------------------------------------------------------------------------------\r
-\r
-JMP32 MACRO FunctionName\r
-  lea  esp, @F\r
-  jmp  FunctionName\r
-@@:\r
-ENDM\r
-\r
-RET32 MACRO\r
-    jmp    esp\r
-ENDM\r
-\r
-;\r
-; ROM/SPI/MEMORY Definitions\r
-;\r
-QUARK_DDR3_MEM_BASE_ADDRESS    EQU 000000000h    ; Memory Base Address = 0\r
-QUARK_MAX_DDR3_MEM_SIZE_BYTES    EQU 080000000h    ; DDR3 Memory Size = 2GB\r
-QUARK_ESRAM_MEM_SIZE_BYTES    EQU 000080000h    ; eSRAM Memory Size = 512K\r
-QUARK_STACK_SIZE_BYTES      EQU 008000h      ; Quark stack size = 32K\r
-\r
-;\r
-; RTC/CMOS definitions\r
-;\r
-RTC_INDEX      EQU 070h\r
-  NMI_DISABLE  EQU 080h    ; Bit7=1 disables NMI\r
-  NMI_ENABLE  EQU 000h    ; Bit7=0 disables NMI\r
-RTC_DATA      EQU 071h\r
-\r
-;\r
-; PCI Configuration definitions\r
-;\r
-PCI_CFG            EQU 1 SHL 01Fh  ; PCI configuration access mechanism\r
-PCI_ADDRESS_PORT  EQU 0CF8h\r
-PCI_DATA_PORT      EQU 0CFCh\r
-\r
-;\r
-; Quark PCI devices\r
-;\r
-HOST_BRIDGE_PFA        EQU 0000h          ; B0:D0:F0 (Host Bridge)\r
-ILB_PFA          EQU 00F8h          ; B0:D31:F0 (Legacy Block)\r
-\r
-;\r
-; ILB PCI Config Registers\r
-;\r
-BDE                              EQU 0D4h        ; BIOS Decode Enable register\r
-  DECODE_ALL_REGIONS_ENABLE      EQU 0FF000000h  ; Decode all BIOS decode ranges\r
-\r
-\r
-;\r
-; iLB Reset Register\r
-;\r
-ILB_RESET_REG      EQU 0CF9h\r
-  CF9_WARM_RESET    EQU  02h\r
-  CF9_COLD_RESET    EQU  08h\r
-\r
-;\r
-; Host Bridge PCI Config Registers\r
-;\r
-MESSAGE_BUS_CONTROL_REG                    EQU 0D0h  ; Message Bus Control Register\r
-  SB_OPCODE_FIELD                EQU 018h  ; Bit location of Opcode field\r
-    OPCODE_SIDEBAND_REG_READ    EQU 010h  ; Read opcode\r
-    OPCODE_SIDEBAND_REG_WRITE    EQU 011h  ; Write opcode\r
-    OPCODE_SIDEBAND_ALT_REG_READ  EQU 06h    ; Alternate Read opcode\r
-    OPCODE_SIDEBAND_ALT_REG_WRITE  EQU 07h    ; Alternate Write opcode\r
-    OPCODE_WARM_RESET_REQUEST    EQU 0F4h  ; Reset Warm\r
-    OPCODE_COLD_RESET_REQUEST    EQU 0F5h  ; Reset Cold\r
-  SB_PORT_FIELD                  EQU 010h  ; Bit location of Port ID field\r
-    MEMORY_ARBITER_PORT_ID                EQU 00h\r
-    HOST_BRIDGE_PORT_ID                EQU 03h\r
-    RMU_PORT_ID                EQU 04h\r
-    MEMORY_MANAGER_PORT_ID                EQU 05h\r
-    SOC_UNIT_PORT_ID              EQU  031h\r
-  SB_ADDR_FIELD                  EQU 008h  ; Bit location of Register field\r
-  SB_BE_FIELD                    EQU  004h  ; Bit location of Byte Enables field\r
-    ALL_BYTE_EN                  EQU  00Fh  ; All Byte Enables\r
-MESSAGE_DATA_REG                      EQU 0D4h  ; Message Data Register\r
-\r
-;\r
-; Memory Arbiter Config Registers\r
-;\r
-AEC_CTRL_OFFSET    EQU 00h\r
-\r
-;\r
-; Host Bridge Config Registers\r
-;\r
-HMISC2_OFFSET      EQU 03h\r
-  OR_PM_FIELD      EQU 010h\r
-    SMI_EN        EQU 1 SHL 13h\r
-\r
-HMBOUND_OFFSET    EQU 08h\r
-  HMBOUND_ADDRESS  EQU (QUARK_DDR3_MEM_BASE_ADDRESS + QUARK_MAX_DDR3_MEM_SIZE_BYTES + QUARK_ESRAM_MEM_SIZE_BYTES)\r
-  HMBOUND_LOCK  EQU 00000001h\r
-HECREG_OFFSET    EQU 09h\r
-  EC_BASE      EQU 0E0000000h\r
-  EC_ENABLE    EQU 01h\r
-HLEGACY_OFFSET    EQU 0Ah\r
-  NMI              EQU 1 SHL 0Eh  ; Pin 14\r
-  SMI              EQU 1 SHL 0Ch  ; Pin 12\r
-  INTR             EQU 1 SHL 0Ah  ; Pin 10\r
-\r
-\r
-;\r
-; Memory Manager Config Registers\r
-;\r
-ESRAMPGCTRL_BLOCK_OFFSET  EQU 082h\r
-  BLOCK_ENABLE_PG      EQU 010000000h\r
-BIMRVCTL_OFFSET        EQU 019h\r
-  ENABLE_IMR_INTERRUPT  EQU 080000000h\r
-\r
-;\r
-; SOC UNIT Debug Registers\r
-;\r
-CFGSTICKY_W1_OFFSET          EQU 050h\r
-  FORCE_COLD_RESET      EQU  00000001h\r
-CFGSTICKY_RW_OFFSET            EQU 051h\r
-  RESET_FOR_ESRAM_LOCK    EQU  00000020h\r
-  RESET_FOR_HMBOUND_LOCK    EQU  00000040h\r
-CFGNONSTICKY_W1_OFFSET        EQU 052h\r
-  FORCE_WARM_RESET      EQU  00000001h\r