+++ /dev/null
-/** @file\r
-Principle source module for Clanton Peak platform config PEIM driver.\r
-\r
-Copyright (c) 2013 Intel Corporation.\r
-\r
-SPDX-License-Identifier: BSD-2-Clause-Patent\r
-\r
-**/\r
-\r
-#include <PiPei.h>\r
-#include <Library/IntelQNCLib.h>\r
-#include <Library/PlatformHelperLib.h>\r
-#include <Library/QNCAccessLib.h>\r
-\r
-VOID\r
-EFIAPI\r
-LegacySpiProtect (\r
- VOID\r
- )\r
-{\r
- UINT32 RegVal;\r
-\r
- RegVal = PcdGet32 (PcdLegacyProtectedBIOSRange0Pei);\r
- if (RegVal != 0) {\r
- PlatformWriteFirstFreeSpiProtect (\r
- RegVal,\r
- 0,\r
- 0\r
- );\r
- }\r
- RegVal = PcdGet32 (PcdLegacyProtectedBIOSRange1Pei);\r
- if (RegVal != 0) {\r
- PlatformWriteFirstFreeSpiProtect (\r
- RegVal,\r
- 0,\r
- 0\r
- );\r
- }\r
- RegVal = PcdGet32 (PcdLegacyProtectedBIOSRange2Pei);\r
- if (RegVal != 0) {\r
- PlatformWriteFirstFreeSpiProtect (\r
- RegVal,\r
- 0,\r
- 0\r
- );\r
- }\r
-\r
- //\r
- // Make legacy SPI READ/WRITE enabled if not a secure build\r
- //\r
- LpcPciCfg32And (R_QNC_LPC_BIOS_CNTL, ~B_QNC_LPC_BIOS_CNTL_BIOSWE);\r
-}\r
-\r
-/** PlatformConfigPei driver entry point.\r
-\r
- Platform config in PEI stage.\r
-\r
- @param[in] FfsHeader Pointer to Firmware File System file header.\r
- @param[in] PeiServices General purpose services available to every PEIM.\r
-\r
- @retval EFI_SUCCESS Platform config success.\r
-*/\r
-EFI_STATUS\r
-EFIAPI\r
-PlatformConfigPeiInit (\r
- IN EFI_PEI_FILE_HANDLE FileHandle,\r
- IN CONST EFI_PEI_SERVICES **PeiServices\r
- )\r
-{\r
- //\r
- // Do SOC Init Pre memory init.\r
- //\r
- PeiQNCPreMemInit ();\r
-\r
- //\r
- // Protect areas specified by PCDs.\r
- //\r
- LegacySpiProtect ();\r
-\r
- return EFI_SUCCESS;\r
-}\r