+++ /dev/null
-/** @file\r
-Some configuration of QNC Package\r
-\r
-Copyright (c) 2013-2015 Intel Corporation.\r
-\r
-SPDX-License-Identifier: BSD-2-Clause-Patent\r
-\r
-**/\r
-\r
-#ifndef __INTEL_QNC_CONFIG_H__\r
-#define __INTEL_QNC_CONFIG_H__\r
-\r
-//\r
-// QNC Fixed configurations.\r
-//\r
-\r
-//\r
-// Memory arbiter fixed config values.\r
-//\r
-#define QNC_FIXED_CONFIG_ASTATUS ((UINT32) (\\r
- (ASTATUS_PRI_NORMAL << ASTATUS0_DEFAULT_BP) | \\r
- (ASTATUS_PRI_NORMAL << ASTATUS1_DEFAULT_BP) | \\r
- (ASTATUS_PRI_URGENT << ASTATUS0_RASISED_BP) | \\r
- (ASTATUS_PRI_URGENT << ASTATUS1_RASISED_BP) \\r
- ))\r
-\r
-//\r
-// Memory Manager fixed config values.\r
-//\r
-#define V_DRAM_NON_HOST_RQ_LIMIT 2\r
-\r
-//\r
-// RMU Thermal config fixed config values for TS in Vref Mode.\r
-//\r
-#define V_TSCGF1_CONFIG_ISNSCURRENTSEL_VREF_MODE 0x04\r
-#define V_TSCGF2_CONFIG2_ISPARECTRL_VREF_MODE 0x01\r
-#define V_TSCGF1_CONFIG_IBGEN_VREF_MODE 1\r
-#define V_TSCGF2_CONFIG_IDSCONTROL_VREF_MODE 0x011b\r
-#define V_TSCGF2_CONFIG2_ICALCOARSETUNE_VREF_MODE 0x34\r
-\r
-//\r
-// RMU Thermal config fixed config values for TS in Ratiometric mode.\r
-//\r
-#define V_TSCGF1_CONFIG_ISNSCURRENTSEL_RATIO_MODE 0x04\r
-#define V_TSCGF1_CONFIG_ISNSCHOPSEL_RATIO_MODE 0x02\r
-#define V_TSCGF1_CONFIG_ISNSINTERNALVREFEN_RATIO_MODE 1\r
-#define V_TSCGF2_CONFIG_IDSCONTROL_RATIO_MODE 0x011f\r
-#define V_TSCGF2_CONFIG_IDSTIMING_RATIO_MODE 0x0001\r
-#define V_TSCGF2_CONFIG2_ICALCONFIGSEL_RATIO_MODE 0x01\r
-#define V_TSCGF2_CONFIG2_ISPARECTRL_RATIO_MODE 0x00\r
-#define V_TSCGF1_CONFIG_IBGEN_RATIO_MODE 0\r
-#define V_TSCGF1_CONFIG_IBGCHOPEN_RATIO_MODE 0\r
-#define V_TSCGF3_CONFIG_ITSGAMMACOEFF_RATIO_MODE 0xC8\r
-#define V_TSCGF2_CONFIG2_ICALCOARSETUNE_RATIO_MODE 0x17\r
-\r
-//\r
-// iCLK fixed config values.\r
-//\r
-#define V_MUXTOP_FLEX2 3\r
-#define V_MUXTOP_FLEX1 1\r
-\r
-//\r
-// PCIe Root Port fixed config values.\r
-//\r
-#define V_PCIE_ROOT_PORT_SBIC_VALUE (B_QNC_PCIE_IOSFSBCTL_SBIC_IDLE_NEVER)\r
-\r
-//\r
-// QNC structures for configuration.\r
-//\r
-\r
-typedef union {\r
- struct {\r
- UINT32 PortErrorMask :8;\r
- UINT32 SlotImplemented :1;\r
- UINT32 Reserved1 :1;\r
- UINT32 AspmEnable :1;\r
- UINT32 AspmAutoEnable :1;\r
- UINT32 AspmL0sEnable :2;\r
- UINT32 AspmL1Enable :1;\r
- UINT32 PmeInterruptEnable :1;\r
- UINT32 PhysicalSlotNumber :13;\r
- UINT32 Reserved2 :1;\r
- UINT32 PmSciEnable :1;\r
- UINT32 HotplugSciEnable :1;\r
- } Bits;\r
- UINT32 Uint32;\r
-} PCIEXP_ROOT_PORT_CONFIGURATION;\r
-\r
-typedef union {\r
- UINT32 Uint32;\r
- struct {\r
- UINT32 Pcie_0 :1; // 0: Disabled; 1: Enabled*\r
- UINT32 Pcie_1 :1; // 0: Disabled; 1: Enabled*\r
- UINT32 Smbus :1; // 0: Disabled; 1: Enabled*\r
- UINT32 Rsvd :29; // 0\r
- } Bits;\r
-} QNC_DEVICE_ENABLES;\r
-\r
-#endif\r
-\r