--- /dev/null
+/************************************************************************\r
+ *\r
+ * Copyright (c) 2013-2015 Intel Corporation.\r
+ *\r
+* This program and the accompanying materials\r
+* are licensed and made available under the terms and conditions of the BSD License\r
+* which accompanies this distribution. The full text of the license may be found at\r
+* http://opensource.org/licenses/bsd-license.php\r
+*\r
+* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+ *\r
+ ************************************************************************/\r
+#include "mrc.h"\r
+#include "memory_options.h"\r
+\r
+#include "meminit.h"\r
+#include "meminit_utils.h"\r
+#include "prememinit.h"\r
+#include "io.h"\r
+\r
+// Base address for UART registers\r
+extern uint32_t UartMmioBase;\r
+\r
+//\r
+// Memory Reference Code entry point when executing from BIOS\r
+//\r
+void Mrc( MRCParams_t *mrc_params)\r
+{\r
+ // configure uart base address assuming code relocated to eSRAM\r
+ UartMmioBase = mrc_params->uart_mmio_base;\r
+\r
+ ENTERFN();\r
+\r
+ DPF(D_INFO, "MRC Version %04X %s %s\n", MRC_VERSION, __DATE__, __TIME__);\r
+\r
+ // this will set up the data structures used by MemInit()\r
+ PreMemInit(mrc_params);\r
+\r
+ // this will initialize system memory\r
+ MemInit(mrc_params);\r
+\r
+ LEAVEFN();\r
+ return;\r
+}\r
+\r