#define USB3DBG_DBG_CAB 1 // The XHCI host controller supports debug capability\r
#define USB3DBG_ENABLED 2 // The XHCI debug device is enabled\r
#define USB3DBG_NOT_ENABLED 4 // The XHCI debug device is not enabled\r
+#define USB3DBG_UNINITIALIZED 255 // The XHCI debug device is uninitialized\r
\r
#define USB3_DEBUG_PORT_WRITE_MAX_PACKET_SIZE 0x08\r
\r
UINT8 Initialized;\r
\r
//\r
- // The flag indicates debug device is ready\r
+ // The flag indicates debug capability is supported\r
//\r
BOOLEAN DebugSupport;\r
\r
//\r
BOOLEAN Ready;\r
\r
+ //\r
+ // The flag indicates the instance is from HOB\r
+ //\r
+ BOOLEAN FromHob;\r
+\r
+ //\r
+ // Prevent notification being interrupted by debug timer\r
+ //\r
+ BOOLEAN InNotify;\r
+\r
+ //\r
+ // PciIo protocol event\r
+ //\r
+ EFI_PHYSICAL_ADDRESS PciIoEvent;\r
+\r
//\r
// The flag indicates if USB 3.0 ports has been turn off/on power\r
// \r
IN UINTN Timeout\r
);\r
\r
-#endif //__USB3_DEBUG_PORT_LIB_INTERNAL__\r
+/**\r
+ Initialize usb debug port hardware.\r
+\r
+ @param Handle Debug port handle.\r
+\r
+ @retval TRUE The usb debug port hardware configuration is changed.\r
+ @retval FALSE The usb debug port hardware configuration is not changed.\r
+\r
+**/\r
+RETURN_STATUS\r
+EFIAPI\r
+InitializeUsbDebugHardware (\r
+ IN USB3_DEBUG_PORT_HANDLE *Handle\r
+ );\r
+\r
+/**\r
+ Return USB3 debug instance address pointer.\r
+\r
+**/ \r
+EFI_PHYSICAL_ADDRESS *\r
+GetUsb3DebugPortInstanceAddrPtr (\r
+ VOID\r
+ );\r
+\r
+/**\r
+ Return USB3 debug instance address.\r
+\r
+**/ \r
+USB3_DEBUG_PORT_HANDLE *\r
+GetUsb3DebugPortInstance (\r
+ VOID\r
+ );\r
+\r
+#endif //__SERIAL_PORT_LIB_USB__\r