]> git.proxmox.com Git - mirror_edk2.git/blobdiff - UefiCpuPkg/CpuDxe/CpuGdt.c
UefiCpuPkg/CpuDxe: Enable protection for newly added page table
[mirror_edk2.git] / UefiCpuPkg / CpuDxe / CpuGdt.c
index 35a87a6e453e8bcf85a993df18c678d6c76c9978..9ef2fdfefbcb591eb69e52632374f19310af6b1a 100644 (file)
@@ -2,7 +2,7 @@
   C based implemention of IA32 interrupt handling only\r
   requiring a minimal assembly interrupt entry point.\r
 \r
-  Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>\r
+  Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>\r
   This program and the accompanying materials\r
   are licensed and made available under the terms and conditions of the BSD License\r
   which accompanies this distribution.  The full text of the license may be found at\r
@@ -35,10 +35,10 @@ STATIC GDT_ENTRIES GdtTemplate = {
   // LINEAR_SEL\r
   //\r
   {\r
-    0x0FFFF,        // limit 0xFFFFF\r
-    0x0,            // base 0\r
-    0x0,\r
-    0x092,          // present, ring 0, data, expand-up, writable\r
+    0x0FFFF,        // limit 15:0\r
+    0x0,            // base 15:0\r
+    0x0,            // base 23:16\r
+    0x092,          // present, ring 0, data, read/write\r
     0x0CF,          // page-granular, 32-bit\r
     0x0,\r
   },\r
@@ -46,10 +46,10 @@ STATIC GDT_ENTRIES GdtTemplate = {
   // LINEAR_CODE_SEL\r
   //\r
   {\r
-    0x0FFFF,        // limit 0xFFFFF\r
-    0x0,            // base 0\r
-    0x0,\r
-    0x09A,          // present, ring 0, data, expand-up, writable\r
+    0x0FFFF,        // limit 15:0\r
+    0x0,            // base 15:0\r
+    0x0,            // base 23:16\r
+    0x09F,          // present, ring 0, code, execute/read, conforming, accessed\r
     0x0CF,          // page-granular, 32-bit\r
     0x0,\r
   },\r
@@ -57,10 +57,10 @@ STATIC GDT_ENTRIES GdtTemplate = {
   // SYS_DATA_SEL\r
   //\r
   {\r
-    0x0FFFF,        // limit 0xFFFFF\r
-    0x0,            // base 0\r
-    0x0,\r
-    0x092,          // present, ring 0, data, expand-up, writable\r
+    0x0FFFF,        // limit 15:0\r
+    0x0,            // base 15:0\r
+    0x0,            // base 23:16\r
+    0x093,          // present, ring 0, data, read/write, accessed\r
     0x0CF,          // page-granular, 32-bit\r
     0x0,\r
   },\r
@@ -68,45 +68,56 @@ STATIC GDT_ENTRIES GdtTemplate = {
   // SYS_CODE_SEL\r
   //\r
   {\r
-    0x0FFFF,        // limit 0xFFFFF\r
-    0x0,            // base 0\r
-    0x0,\r
-    0x09A,          // present, ring 0, data, expand-up, writable\r
+    0x0FFFF,        // limit 15:0\r
+    0x0,            // base 15:0\r
+    0x0,            // base 23:16\r
+    0x09A,          // present, ring 0, code, execute/read\r
     0x0CF,          // page-granular, 32-bit\r
     0x0,\r
   },\r
   //\r
-  // LINEAR_CODE64_SEL\r
+  // SPARE4_SEL\r
   //\r
   {\r
-    0x0FFFF,        // limit 0xFFFFF\r
-    0x0,            // base 0\r
-    0x0,\r
-    0x09B,          // present, ring 0, code, expand-up, writable\r
-    0x0AF,          // LimitHigh (CS.L=1, CS.D=0)\r
-    0x0,            // base (high)\r
+    0x0,            // limit 15:0\r
+    0x0,            // base 15:0\r
+    0x0,            // base 23:16\r
+    0x0,            // type\r
+    0x0,            // limit 19:16, flags\r
+    0x0,            // base 31:24\r
   },\r
   //\r
-  // SPARE4_SEL\r
+  // LINEAR_DATA64_SEL\r
   //\r
   {\r
-    0x0,            // limit 0\r
-    0x0,            // base 0\r
-    0x0,\r
-    0x0,            // present, ring 0, data, expand-up, writable\r
-    0x0,            // page-granular, 32-bit\r
+    0x0FFFF,        // limit 15:0\r
+    0x0,            // base 15:0\r
+    0x0,            // base 23:16\r
+    0x092,          // present, ring 0, data, read/write\r
+    0x0CF,          // page-granular, 32-bit\r
     0x0,\r
   },\r
   //\r
+  // LINEAR_CODE64_SEL\r
+  //\r
+  {\r
+    0x0FFFF,        // limit 15:0\r
+    0x0,            // base 15:0\r
+    0x0,            // base 23:16\r
+    0x09A,          // present, ring 0, code, execute/read\r
+    0x0AF,          // page-granular, 64-bit code\r
+    0x0,            // base (high)\r
+  },\r
+  //\r
   // SPARE5_SEL\r
   //\r
   {\r
-    0x0,            // limit 0\r
-    0x0,            // base 0\r
-    0x0,\r
-    0x0,            // present, ring 0, data, expand-up, writable\r
-    0x0,            // page-granular, 32-bit\r
-    0x0,\r
+    0x0,            // limit 15:0\r
+    0x0,            // base 15:0\r
+    0x0,            // base 23:16\r
+    0x0,            // type\r
+    0x0,            // limit 19:16, flags\r
+    0x0,            // base 31:24\r
   },\r
 };\r
 \r