-# TITLE CpuAsm.asm:
-
-#------------------------------------------------------------------------------
-#*
-#* Copyright 2008 - 2009, Intel Corporation
-#* All rights reserved. This program and the accompanying materials
-#* are licensed and made available under the terms and conditions of the BSD License
-#* which accompanies this distribution. The full text of the license may be found at
-#* http://opensource.org/licenses/bsd-license.php
-#*
-#* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-#* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#*
-#* CpuAsm.S
-#*
-#* Abstract:
-#*
-#------------------------------------------------------------------------------
-
-
-#text SEGMENT
-
-
-#EXTRN ASM_PFX(mErrorCodeFlag):DWORD # Error code flags for exceptions
-
-
-#
-# point to the external interrupt vector table
-#
-ExternalVectorTablePtr:
- .byte 0, 0, 0, 0, 0, 0, 0, 0
-
-.intel_syntax
-ASM_GLOBAL ASM_PFX(InitializeExternalVectorTablePtr)
-ASM_PFX(InitializeExternalVectorTablePtr):
- lea %rax, [%rip+ExternalVectorTablePtr] # save vector number
- mov [%rax], %rcx
- ret
-
-
-#------------------------------------------------------------------------------
-# VOID
-# SetCodeSelector (
-# UINT16 Selector
-# );
-#------------------------------------------------------------------------------
-.intel_syntax
-ASM_GLOBAL ASM_PFX(SetCodeSelector)
-ASM_PFX(SetCodeSelector):
- sub %rsp, 0x10
- lea %rax, [%rip+setCodeSelectorLongJump]
- mov [%rsp], %rax
- mov [%rsp+4], %cx
- jmp fword ptr [%rsp]
-setCodeSelectorLongJump:
- add %rsp, 0x10
- ret
-
-#------------------------------------------------------------------------------
-# VOID
-# SetDataSelectors (
-# UINT16 Selector
-# );
-#------------------------------------------------------------------------------
-.intel_syntax
-ASM_GLOBAL ASM_PFX(SetDataSelectors)
-ASM_PFX(SetDataSelectors):
- mov %ss, %cx
- mov %ds, %cx
- mov %es, %cx
- mov %fs, %cx
- mov %gs, %cx
- ret
-
-#---------------------------------------;
-# CommonInterruptEntry ;
-#---------------------------------------;
-# The follow algorithm is used for the common interrupt routine.
-
-.intel_syntax
-ASM_GLOBAL ASM_PFX(CommonInterruptEntry)
-ASM_PFX(CommonInterruptEntry):
- cli
- #
- # All interrupt handlers are invoked through interrupt gates, so
- # IF flag automatically cleared at the entry point
- #
- #
- # Calculate vector number
- #
- xchg %rcx, [%rsp] # get the return address of call, actually, it is the address of vector number.
- movzx %ecx, word ptr [%rcx]
- cmp %ecx, 32 # Intel reserved vector for exceptions?
- jae NoErrorCode
- push %rax
- lea %rax, [%rip+ASM_PFX(mErrorCodeFlag)]
- bt dword ptr [%rax], %ecx
- pop %rax
- jc CommonInterruptEntry_al_0000
-
-NoErrorCode:
-
- #
- # Push a dummy error code on the stack
- # to maintain coherent stack map
- #
- push [%rsp]
- mov qword ptr [%rsp + 8], 0
-CommonInterruptEntry_al_0000:
- push %rbp
- mov %rbp, %rsp
-
- #
- # Stack:
- # +---------------------+ <-- 16-byte aligned ensured by processor
- # + Old SS +
- # +---------------------+
- # + Old RSP +
- # +---------------------+
- # + RFlags +
- # +---------------------+
- # + CS +
- # +---------------------+
- # + RIP +
- # +---------------------+
- # + Error Code +
- # +---------------------+
- # + RCX / Vector Number +
- # +---------------------+
- # + RBP +
- # +---------------------+ <-- RBP, 16-byte aligned
- #
-
-
- #
- # Since here the stack pointer is 16-byte aligned, so
- # EFI_FX_SAVE_STATE_X64 of EFI_SYSTEM_CONTEXT_x64
- # is 16-byte aligned
- #
-
-#; UINT64 Rdi, Rsi, Rbp, Rsp, Rbx, Rdx, Rcx, Rax;
-#; UINT64 R8, R9, R10, R11, R12, R13, R14, R15;
- push %r15
- push %r14
- push %r13
- push %r12
- push %r11
- push %r10
- push %r9
- push %r8
- push %rax
- push qword ptr [%rbp + 8] # RCX
- push %rdx
- push %rbx
- push qword ptr [%rbp + 48] # RSP
- push qword ptr [%rbp] # RBP
- push %rsi
- push %rdi
-
-#; UINT64 Gs, Fs, Es, Ds, Cs, Ss; insure high 16 bits of each is zero
- movzx %rax, word ptr [%rbp + 56]
- push %rax # for ss
- movzx %rax, word ptr [%rbp + 32]
- push %rax # for cs
- mov %rax, %ds
- push %rax
- mov %rax, %es
- push %rax
- mov %rax, %fs
- push %rax
- mov %rax, %gs
- push %rax
-
- mov [%rbp + 8], %rcx # save vector number
-
-#; UINT64 Rip;
- push qword ptr [%rbp + 24]
-
-#; UINT64 Gdtr[2], Idtr[2];
- xor %rax, %rax
- push %rax
- push %rax
- sidt [%rsp]
- xchg %rax, [%rsp + 2]
- xchg %rax, [%rsp]
- xchg %rax, [%rsp + 8]
-
- xor %rax, %rax
- push %rax
- push %rax
- sgdt [%rsp]
- xchg %rax, [%rsp + 2]
- xchg %rax, [%rsp]
- xchg %rax, [%rsp + 8]
-
-#; UINT64 Ldtr, Tr;
- xor %rax, %rax
- str %ax
- push %rax
- sldt %ax
- push %rax
-
-#; UINT64 RFlags;
- push qword ptr [%rbp + 40]
-
-#; UINT64 Cr0, Cr1, Cr2, Cr3, Cr4, Cr8;
- mov %rax, %cr8
- push %rax
- mov %rax, %cr4
- or %rax, 0x208
- mov %cr4, %rax
- push %rax
- mov %rax, %cr3
- push %rax
- mov %rax, %cr2
- push %rax
- xor %rax, %rax
- push %rax
- mov %rax, %cr0
- push %rax
-
-#; UINT64 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;
- mov %rax, %dr7
- push %rax
-#; clear Dr7 while executing debugger itself
- xor %rax, %rax
- mov %dr7, %rax
-
- mov %rax, %dr6
- push %rax
-#; insure all status bits in dr6 are clear...
- xor %rax, %rax
- mov %dr6, %rax
-
- mov %rax, %dr3
- push %rax
- mov %rax, %dr2
- push %rax
- mov %rax, %dr1
- push %rax
- mov %rax, %dr0
- push %rax
-
-#; FX_SAVE_STATE_X64 FxSaveState;
- sub %rsp, 512
- mov %rdi, %rsp
- .byte 0x0f, 0x0ae, 0x07 #fxsave [rdi]
-
-#; UINT32 ExceptionData;
- push qword ptr [%rbp + 16]
-
-#; call into exception handler
- mov %rcx, [%rbp + 8]
- lea %rax, [%rip+ExternalVectorTablePtr]
- mov %eax, [%eax]
- mov %rax, [%rax + %rcx * 8]
- or %rax, %rax # NULL?
-
- je nonNullValue#
-
-#; Prepare parameter and call
-# mov rcx, [rbp + 8]
- mov %rdx, %rsp
- #
- # Per X64 calling convention, allocate maximum parameter stack space
- # and make sure RSP is 16-byte aligned
- #
- sub %rsp, 4 * 8 + 8
- call %rax
- add %rsp, 4 * 8 + 8
-
-nonNullValue:
- cli
-#; UINT64 ExceptionData;
- add %rsp, 8
-
-#; FX_SAVE_STATE_X64 FxSaveState;
-
- mov %rsi, %rsp
- .byte 0x0f, 0x0ae, 0x0E # fxrstor [rsi]
- add %rsp, 512
-
-#; UINT64 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;
- pop %rax
- mov %dr0, %rax
- pop %rax
- mov %dr1, %rax
- pop %rax
- mov %dr2, %rax
- pop %rax
- mov %dr3, %rax
-#; skip restore of dr6. We cleared dr6 during the context save.
- add %rsp, 8
- pop %rax
- mov %dr7, %rax
-
-#; UINT64 Cr0, Cr1, Cr2, Cr3, Cr4, Cr8;
- pop %rax
- mov %cr0, %rax
- add %rsp, 8 # not for Cr1
- pop %rax
- mov %cr2, %rax
- pop %rax
- mov %cr3, %rax
- pop %rax
- mov %cr4, %rax
- pop %rax
- mov %cr8, %rax
-
-#; UINT64 RFlags;
- pop qword ptr [%rbp + 40]
-
-#; UINT64 Ldtr, Tr;
-#; UINT64 Gdtr[2], Idtr[2];
-#; Best not let anyone mess with these particular registers...
- add %rsp, 48
-
-#; UINT64 Rip;
- pop qword ptr [%rbp + 24]
-
-#; UINT64 Gs, Fs, Es, Ds, Cs, Ss;
- pop %rax
- # mov gs, rax ; not for gs
- pop %rax
- # mov fs, rax ; not for fs
- # (X64 will not use fs and gs, so we do not restore it)
- pop %rax
- mov %es, %rax
- pop %rax
- mov %ds, %rax
- pop qword ptr [%rbp + 32] # for cs
- pop qword ptr [%rbp + 56] # for ss
-
-#; UINT64 Rdi, Rsi, Rbp, Rsp, Rbx, Rdx, Rcx, Rax;
-#; UINT64 R8, R9, R10, R11, R12, R13, R14, R15;
- pop %rdi
- pop %rsi
- add %rsp, 8 # not for rbp
- pop qword ptr [%rbp + 48] # for rsp
- pop %rbx
- pop %rdx
- pop %rcx
- pop %rax
- pop %r8
- pop %r9
- pop %r10
- pop %r11
- pop %r12
- pop %r13
- pop %r14
- pop %r15
-
- mov %rsp, %rbp
- pop %rbp
- add %rsp, 16
- iretq
-
-
-#text ENDS
-
-#END
-
-
+# TITLE CpuAsm.S: \r
+\r
+#------------------------------------------------------------------------------\r
+#*\r
+#* Copyright (c) 2008 - 2009, Intel Corporation. All rights reserved.<BR>\r
+#* This program and the accompanying materials\r
+#* are licensed and made available under the terms and conditions of the BSD License\r
+#* which accompanies this distribution. The full text of the license may be found at\r
+#* http://opensource.org/licenses/bsd-license.php\r
+#*\r
+#* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+#* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#*\r
+#* CpuAsm.S\r
+#*\r
+#* Abstract:\r
+#*\r
+#------------------------------------------------------------------------------\r
+\r
+\r
+#text SEGMENT\r
+\r
+\r
+#EXTRN ASM_PFX(mErrorCodeFlag):DWORD # Error code flags for exceptions\r
+\r
+\r
+#\r
+# point to the external interrupt vector table\r
+#\r
+ExternalVectorTablePtr:\r
+ .byte 0, 0, 0, 0, 0, 0, 0, 0\r
+\r
+ASM_GLOBAL ASM_PFX(InitializeExternalVectorTablePtr)\r
+ASM_PFX(InitializeExternalVectorTablePtr):\r
+ lea ExternalVectorTablePtr(%rip), %rax # save vector number\r
+ mov %rcx, (%rax) \r
+ ret\r
+\r
+\r
+#------------------------------------------------------------------------------\r
+# VOID\r
+# SetCodeSelector (\r
+# UINT16 Selector\r
+# );\r
+#------------------------------------------------------------------------------\r
+ASM_GLOBAL ASM_PFX(SetCodeSelector)\r
+ASM_PFX(SetCodeSelector):\r
+ subq $0x10, %rsp \r
+ leaq setCodeSelectorLongJump(%rip), %rax \r
+ movq %rax, (%rsp) \r
+ movw %cx, 4(%rsp)\r
+ .byte 0xFF, 0x2C, 0x24 # jmp (%rsp) note:fword jmp\r
+setCodeSelectorLongJump:\r
+ addq $0x10, %rsp\r
+ ret\r
+\r
+#------------------------------------------------------------------------------\r
+# VOID\r
+# SetDataSelectors (\r
+# UINT16 Selector\r
+# );\r
+#------------------------------------------------------------------------------\r
+ASM_GLOBAL ASM_PFX(SetDataSelectors)\r
+ASM_PFX(SetDataSelectors):\r
+ movw %cx, %ss\r
+ movw %cx, %ds\r
+ movw %cx, %es\r
+ movw %cx, %fs\r
+ movw %cx, %gs\r
+ ret\r
+\r
+#---------------------------------------;\r
+# CommonInterruptEntry ;\r
+#---------------------------------------;\r
+# The follow algorithm is used for the common interrupt routine.\r
+\r
+ASM_GLOBAL ASM_PFX(CommonInterruptEntry)\r
+ASM_PFX(CommonInterruptEntry):\r
+ cli\r
+ #\r
+ # All interrupt handlers are invoked through interrupt gates, so\r
+ # IF flag automatically cleared at the entry point\r
+ #\r
+ #\r
+ # Calculate vector number\r
+ #\r
+ xchgq (%rsp), %rcx # get the return address of call, actually, it is the address of vector number.\r
+ movzwl (%rcx), %ecx \r
+ cmp $32, %ecx # Intel reserved vector for exceptions?\r
+ jae NoErrorCode\r
+ pushq %rax\r
+ leaq ASM_PFX(mErrorCodeFlag)(%rip), %rax\r
+ bt %ecx, (%rax) \r
+ popq %rax\r
+ jc CommonInterruptEntry_al_0000\r
+\r
+NoErrorCode:\r
+\r
+ #\r
+ # Push a dummy error code on the stack\r
+ # to maintain coherent stack map\r
+ #\r
+ pushq (%rsp)\r
+ movq $0, 8(%rsp)\r
+CommonInterruptEntry_al_0000:\r
+ pushq %rbp\r
+ movq %rsp, %rbp\r
+\r
+ #\r
+ # Stack:\r
+ # +---------------------+ <-- 16-byte aligned ensured by processor\r
+ # + Old SS +\r
+ # +---------------------+\r
+ # + Old RSP +\r
+ # +---------------------+\r
+ # + RFlags +\r
+ # +---------------------+\r
+ # + CS +\r
+ # +---------------------+\r
+ # + RIP +\r
+ # +---------------------+\r
+ # + Error Code +\r
+ # +---------------------+\r
+ # + RCX / Vector Number +\r
+ # +---------------------+\r
+ # + RBP +\r
+ # +---------------------+ <-- RBP, 16-byte aligned\r
+ #\r
+\r
+\r
+ #\r
+ # Since here the stack pointer is 16-byte aligned, so\r
+ # EFI_FX_SAVE_STATE_X64 of EFI_SYSTEM_CONTEXT_x64\r
+ # is 16-byte aligned\r
+ #\r
+\r
+#; UINT64 Rdi, Rsi, Rbp, Rsp, Rbx, Rdx, Rcx, Rax;\r
+#; UINT64 R8, R9, R10, R11, R12, R13, R14, R15;\r
+ pushq %r15\r
+ pushq %r14\r
+ pushq %r13\r
+ pushq %r12\r
+ pushq %r11\r
+ pushq %r10\r
+ pushq %r9\r
+ pushq %r8\r
+ pushq %rax\r
+ pushq 8(%rbp) # RCX\r
+ pushq %rdx\r
+ pushq %rbx\r
+ pushq 48(%rbp) # RSP\r
+ pushq (%rbp) # RBP\r
+ pushq %rsi\r
+ pushq %rdi\r
+\r
+#; UINT64 Gs, Fs, Es, Ds, Cs, Ss; insure high 16 bits of each is zero\r
+ movzwq 56(%rbp), %rax\r
+ pushq %rax # for ss\r
+ movzwq 32(%rbp), %rax\r
+ pushq %rax # for cs\r
+ movq %ds, %rax\r
+ pushq %rax\r
+ movq %es, %rax\r
+ pushq %rax\r
+ movq %fs, %rax\r
+ pushq %rax\r
+ movq %gs, %rax\r
+ pushq %rax\r
+\r
+ movq %rcx, 8(%rbp) # save vector number\r
+\r
+#; UINT64 Rip;\r
+ pushq 24(%rbp)\r
+\r
+#; UINT64 Gdtr[2], Idtr[2];\r
+ xorq %rax, %rax\r
+ pushq %rax\r
+ pushq %rax\r
+ sidt (%rsp)\r
+ xchgq 2(%rsp), %rax\r
+ xchgq (%rsp), %rax\r
+ xchgq 8(%rsp), %rax\r
+\r
+ xorq %rax, %rax\r
+ pushq %rax\r
+ pushq %rax\r
+ sgdt (%rsp)\r
+ xchgq 2(%rsp), %rax\r
+ xchgq (%rsp), %rax\r
+ xchgq 8(%rsp), %rax\r
+\r
+#; UINT64 Ldtr, Tr;\r
+ xorq %rax, %rax\r
+ str %ax\r
+ pushq %rax\r
+ sldt %ax\r
+ pushq %rax\r
+\r
+#; UINT64 RFlags;\r
+ pushq 40(%rbp)\r
+\r
+#; UINT64 Cr0, Cr1, Cr2, Cr3, Cr4, Cr8;\r
+ movq %cr8, %rax\r
+ pushq %rax\r
+ movq %cr4, %rax\r
+ orq $0x208, %rax \r
+ movq %rax, %cr4 \r
+ pushq %rax\r
+ mov %cr3, %rax \r
+ pushq %rax\r
+ mov %cr2, %rax \r
+ pushq %rax\r
+ xorq %rax, %rax\r
+ pushq %rax\r
+ mov %cr0, %rax \r
+ pushq %rax\r
+\r
+#; UINT64 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;\r
+ movq %dr7, %rax\r
+ pushq %rax\r
+#; clear Dr7 while executing debugger itself\r
+ xorq %rax, %rax\r
+ movq %rax, %dr7\r
+\r
+ movq %dr6, %rax\r
+ pushq %rax\r
+#; insure all status bits in dr6 are clear...\r
+ xorq %rax, %rax\r
+ movq %rax, %dr6\r
+\r
+ movq %dr3, %rax\r
+ pushq %rax\r
+ movq %dr2, %rax\r
+ pushq %rax\r
+ movq %dr1, %rax\r
+ pushq %rax\r
+ movq %dr0, %rax\r
+ pushq %rax\r
+\r
+#; FX_SAVE_STATE_X64 FxSaveState;\r
+ subq $512, %rsp\r
+ movq %rsp, %rdi\r
+ .byte 0x0f, 0x0ae, 0x07 #fxsave [rdi]\r
+\r
+#; UINT32 ExceptionData;\r
+ pushq 16(%rbp)\r
+\r
+#; call into exception handler\r
+ movq 8(%rbp), %rcx\r
+ leaq ExternalVectorTablePtr(%rip), %rax\r
+ movl (%eax), %eax\r
+ movq (%rax,%rcx,8), %rax\r
+ orq %rax, %rax # NULL?\r
+\r
+ je nonNullValue#\r
+\r
+#; Prepare parameter and call\r
+# mov rcx, [rbp + 8]\r
+ mov %rsp, %rdx\r
+ #\r
+ # Per X64 calling convention, allocate maximum parameter stack space\r
+ # and make sure RSP is 16-byte aligned\r
+ #\r
+ subq $40, %rsp \r
+ call *%rax\r
+ addq $40, %rsp\r
+\r
+nonNullValue:\r
+ cli\r
+#; UINT64 ExceptionData;\r
+ addq $8, %rsp\r
+\r
+#; FX_SAVE_STATE_X64 FxSaveState;\r
+\r
+ movq %rsp, %rsi\r
+ .byte 0x0f, 0x0ae, 0x0E # fxrstor [rsi]\r
+ addq $512, %rsp\r
+\r
+#; UINT64 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;\r
+ popq %rax\r
+ movq %rax, %dr0\r
+ popq %rax\r
+ movq %rax, %dr1\r
+ popq %rax\r
+ movq %rax, %dr2\r
+ popq %rax\r
+ movq %rax, %dr3\r
+#; skip restore of dr6. We cleared dr6 during the context save.\r
+ addq $8, %rsp\r
+ popq %rax\r
+ movq %rax, %dr7\r
+\r
+#; UINT64 Cr0, Cr1, Cr2, Cr3, Cr4, Cr8;\r
+ popq %rax\r
+ movq %rax, %cr0\r
+ addq $8, %rsp # not for Cr1\r
+ popq %rax\r
+ movq %rax, %cr2\r
+ popq %rax\r
+ movq %rax, %cr3\r
+ popq %rax\r
+ movq %rax, %cr4\r
+ popq %rax\r
+ movq %rax, %cr8\r
+\r
+#; UINT64 RFlags;\r
+ popq 40(%rbp)\r
+\r
+#; UINT64 Ldtr, Tr;\r
+#; UINT64 Gdtr[2], Idtr[2];\r
+#; Best not let anyone mess with these particular registers...\r
+ addq $48, %rsp\r
+\r
+#; UINT64 Rip;\r
+ popq 24(%rbp)\r
+\r
+#; UINT64 Gs, Fs, Es, Ds, Cs, Ss;\r
+ popq %rax\r
+ # mov %rax, %gs ; not for gs\r
+ popq %rax\r
+ # mov %rax, %fs ; not for fs\r
+ # (X64 will not use fs and gs, so we do not restore it)\r
+ popq %rax\r
+ movq %rax, %es\r
+ popq %rax\r
+ movq %rax, %ds\r
+ popq 32(%rbp) # for cs\r
+ popq 56(%rbp) # for ss\r
+\r
+#; UINT64 Rdi, Rsi, Rbp, Rsp, Rbx, Rdx, Rcx, Rax;\r
+#; UINT64 R8, R9, R10, R11, R12, R13, R14, R15;\r
+ popq %rdi\r
+ popq %rsi\r
+ addq $8, %rsp # not for rbp\r
+ popq 48(%rbp) # for rsp\r
+ popq %rbx\r
+ popq %rdx\r
+ popq %rcx\r
+ popq %rax\r
+ popq %r8\r
+ popq %r9\r
+ popq %r10\r
+ popq %r11\r
+ popq %r12\r
+ popq %r13\r
+ popq %r14\r
+ popq %r15\r
+\r
+ movq %rbp, %rsp\r
+ popq %rbp\r
+ addq $16, %rsp\r
+ iretq\r
+\r
+\r
+#text ENDS\r
+\r
+#END\r
+\r
+\r
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