TITLE CpuAsm.asm: \r
;------------------------------------------------------------------------------\r
;*\r
-;* Copyright (c) 2008 - 2009, Intel Corporation. All rights reserved.<BR>\r
+;* Copyright (c) 2008 - 2010, Intel Corporation. All rights reserved.<BR>\r
;* This program and the accompanying materials \r
;* are licensed and made available under the terms and conditions of the BSD License \r
;* which accompanies this distribution. The full text of the license may be found at \r
;; UINT64 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;\r
mov rax, dr7\r
push rax\r
-;; clear Dr7 while executing debugger itself\r
- xor rax, rax\r
- mov dr7, rax\r
-\r
mov rax, dr6\r
push rax\r
-;; insure all status bits in dr6 are clear...\r
- xor rax, rax\r
- mov dr6, rax\r
-\r
mov rax, dr3\r
push rax\r
mov rax, dr2\r
add rsp, 512\r
\r
;; UINT64 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;\r
- pop rax\r
- mov dr0, rax\r
- pop rax\r
- mov dr1, rax\r
- pop rax\r
- mov dr2, rax\r
- pop rax\r
- mov dr3, rax\r
-;; skip restore of dr6. We cleared dr6 during the context save.\r
- add rsp, 8\r
- pop rax\r
- mov dr7, rax\r
+;; Skip restoration of DRx registers to support in-circuit emualators\r
+;; or debuggers set breakpoint in interrupt/exception context\r
+ add rsp, 8 * 6\r
\r
;; UINT64 Cr0, Cr1, Cr2, Cr3, Cr4, Cr8;\r
pop rax\r