UefiCpuPkg/CpuDxe: Enable protection for newly added page table

[mirror_edk2.git] / UefiCpuPkg / CpuIoPei / CpuIoPei.c

diff --git a/UefiCpuPkg/CpuIoPei/CpuIoPei.c b/UefiCpuPkg/CpuIoPei/CpuIoPei.c
index 3c5c8a74b3a684f451dcf9bf7aba230a4c8bd874..b6d538b166776f2941b88d70c6c789353d7c5a93 100644 (file)
--- a/UefiCpuPkg/CpuIoPei/CpuIoPei.c
+++ b/UefiCpuPkg/CpuIoPei/CpuIoPei.c
@@ -2,6 +2,8 @@
   Produces the CPU I/O PPI.\r
 \r
 Copyright (c) 2009 - 2012, Intel Corporation. All rights reserved.<BR>\r
+Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>\r
+\r
 This program and the accompanying materials                          \r
 are licensed and made available under the terms and conditions of the BSD License         \r
 which accompanies this distribution.  The full text of the license may be found at        \r
@@ -375,6 +377,31 @@ CpuIoServiceRead (
   InStride = mInStride[Width];\r
   OutStride = mOutStride[Width];\r
   OperationWidth = (EFI_PEI_CPU_IO_PPI_WIDTH) (Width & 0x03);\r
+\r
+  //\r
+  // Fifo operations supported for (mInStride[Width] == 0)\r
+  //\r
+  if (InStride == 0) {\r
+    switch (OperationWidth) {\r
+    case EfiPeiCpuIoWidthUint8:\r
+      IoReadFifo8 ((UINTN)Address, Count, Buffer);\r
+      return EFI_SUCCESS;\r
+    case EfiPeiCpuIoWidthUint16:\r
+      IoReadFifo16 ((UINTN)Address, Count, Buffer);\r
+      return EFI_SUCCESS;\r
+    case EfiPeiCpuIoWidthUint32:\r
+      IoReadFifo32 ((UINTN)Address, Count, Buffer);\r
+      return EFI_SUCCESS;\r
+    default:\r
+      //\r
+      // The CpuIoCheckParameter call above will ensure that this\r
+      // path is not taken.\r
+      //\r
+      ASSERT (FALSE);\r
+      break;\r
+    }\r
+  }\r
+\r
   Aligned = (BOOLEAN)(((UINTN)Buffer & (mInStride[OperationWidth] - 1)) == 0x00);\r
   for (Uint8Buffer = Buffer; Count > 0; Address += InStride, Uint8Buffer += OutStride, Count--) {\r
     if (OperationWidth == EfiPeiCpuIoWidthUint8) {\r
@@ -447,6 +474,31 @@ CpuIoServiceWrite (
   InStride = mInStride[Width];\r
   OutStride = mOutStride[Width];\r
   OperationWidth = (EFI_PEI_CPU_IO_PPI_WIDTH) (Width & 0x03);\r
+\r
+  //\r
+  // Fifo operations supported for (mInStride[Width] == 0)\r
+  //\r
+  if (InStride == 0) {\r
+    switch (OperationWidth) {\r
+    case EfiPeiCpuIoWidthUint8:\r
+      IoWriteFifo8 ((UINTN)Address, Count, Buffer);\r
+      return EFI_SUCCESS;\r
+    case EfiPeiCpuIoWidthUint16:\r
+      IoWriteFifo16 ((UINTN)Address, Count, Buffer);\r
+      return EFI_SUCCESS;\r
+    case EfiPeiCpuIoWidthUint32:\r
+      IoWriteFifo32 ((UINTN)Address, Count, Buffer);\r
+      return EFI_SUCCESS;\r
+    default:\r
+      //\r
+      // The CpuIoCheckParameter call above will ensure that this\r
+      // path is not taken.\r
+      //\r
+      ASSERT (FALSE);\r
+      break;\r
+    }\r
+  }\r
+\r
   Aligned = (BOOLEAN)(((UINTN)Buffer & (mInStride[OperationWidth] - 1)) == 0x00);\r
   for (Uint8Buffer = (UINT8 *)Buffer; Count > 0; Address += InStride, Uint8Buffer += OutStride, Count--) {\r
     if (OperationWidth == EfiPeiCpuIoWidthUint8) {\r