-/** @file
- CPU PEI Module installs CPU Multiple Processor PPI.
-
- Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include "CpuMpPei.h"
-
-//
-// Global Descriptor Table (GDT)
-//
-GLOBAL_REMOVE_IF_UNREFERENCED IA32_GDT mGdtEntries[] = {
-/* selector { Global Segment Descriptor } */
-/* 0x00 */ {{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}}, //null descriptor
-/* 0x08 */ {{0xffff, 0, 0, 0x2, 1, 0, 1, 0xf, 0, 0, 1, 1, 0}}, //linear data segment descriptor
-/* 0x10 */ {{0xffff, 0, 0, 0xf, 1, 0, 1, 0xf, 0, 0, 1, 1, 0}}, //linear code segment descriptor
-/* 0x18 */ {{0xffff, 0, 0, 0x3, 1, 0, 1, 0xf, 0, 0, 1, 1, 0}}, //system data segment descriptor
-/* 0x20 */ {{0xffff, 0, 0, 0xa, 1, 0, 1, 0xf, 0, 0, 1, 1, 0}}, //system code segment descriptor
-/* 0x28 */ {{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}}, //spare segment descriptor
-/* 0x30 */ {{0xffff, 0, 0, 0x2, 1, 0, 1, 0xf, 0, 0, 1, 1, 0}}, //system data segment descriptor
-/* 0x38 */ {{0xffff, 0, 0, 0xa, 1, 0, 1, 0xf, 0, 1, 0, 1, 0}}, //system code segment descriptor
-/* 0x40 */ {{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}}, //spare segment descriptor
-};
-
-//
-// IA32 Gdt register
-//
-GLOBAL_REMOVE_IF_UNREFERENCED IA32_DESCRIPTOR mGdt = {
- sizeof (mGdtEntries) - 1,
- (UINTN) mGdtEntries
- };
-
-/**
- Get available system memory below 1MB by specified size.
-
- @param WakeupBufferSize Wakeup buffer size required
-
- @retval other Return wakeup buffer address below 1MB.
- @retval -1 Cannot find free memory below 1MB.
-**/
-UINTN
-GetWakeupBuffer (
- IN UINTN WakeupBufferSize
- )
-{
- EFI_PEI_HOB_POINTERS Hob;
- UINTN WakeupBufferStart;
- UINTN WakeupBufferEnd;
-
- //
- // Get the HOB list for processing
- //
- Hob.Raw = GetHobList ();
-
- //
- // Collect memory ranges
- //
- while (!END_OF_HOB_LIST (Hob)) {
- if (Hob.Header->HobType == EFI_HOB_TYPE_RESOURCE_DESCRIPTOR) {
- if ((Hob.ResourceDescriptor->PhysicalStart < BASE_1MB) &&
- (Hob.ResourceDescriptor->ResourceType == EFI_RESOURCE_SYSTEM_MEMORY) &&
- ((Hob.ResourceDescriptor->ResourceAttribute &
- (EFI_RESOURCE_ATTRIBUTE_READ_PROTECTED |
- EFI_RESOURCE_ATTRIBUTE_WRITE_PROTECTED |
- EFI_RESOURCE_ATTRIBUTE_EXECUTION_PROTECTED
- )) == 0)
- ) {
- //
- // Need memory under 1MB to be collected here
- //
- WakeupBufferEnd = (UINTN) (Hob.ResourceDescriptor->PhysicalStart + Hob.ResourceDescriptor->ResourceLength);
- if (WakeupBufferEnd > BASE_1MB) {
- //
- // Wakeup buffer should be under 1MB
- //
- WakeupBufferEnd = BASE_1MB;
- }
- //
- // Wakeup buffer should be aligned on 4KB
- //
- WakeupBufferStart = (WakeupBufferEnd - WakeupBufferSize) & ~(SIZE_4KB - 1);
- if (WakeupBufferStart < Hob.ResourceDescriptor->PhysicalStart) {
- continue;
- }
- //
- // Create a memory allocation HOB.
- //
- BuildMemoryAllocationHob (
- WakeupBufferStart,
- WakeupBufferSize,
- EfiBootServicesData
- );
- return WakeupBufferStart;
- }
- }
- //
- // Find the next HOB
- //
- Hob.Raw = GET_NEXT_HOB (Hob);
- }
-
- return (UINTN) -1;
-}
-
-/**
- The Entry point of the MP CPU PEIM.
-
- This function will wakeup APs and collect CPU AP count and install the
- Mp Service Ppi.
-
- @param FileHandle Handle of the file being invoked.
- @param PeiServices Describes the list of possible PEI Services.
-
- @retval EFI_SUCCESS MpServicePpi is installed successfully.
-
-**/
-EFI_STATUS
-EFIAPI
-CpuMpPeimInit (
- IN EFI_PEI_FILE_HANDLE FileHandle,
- IN CONST EFI_PEI_SERVICES **PeiServices
- )
-{
-
-
- //
- // Load new GDT table on BSP
- //
- AsmInitializeGdt (&mGdt);
-
- return EFI_SUCCESS;
-}
+/** @file\r
+ CPU PEI Module installs CPU Multiple Processor PPI.\r
+\r
+ Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>\r
+ This program and the accompanying materials\r
+ are licensed and made available under the terms and conditions of the BSD License\r
+ which accompanies this distribution. The full text of the license may be found at\r
+ http://opensource.org/licenses/bsd-license.php\r
+\r
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+#include "CpuMpPei.h"\r
+\r
+//\r
+// Global Descriptor Table (GDT)\r
+//\r
+GLOBAL_REMOVE_IF_UNREFERENCED IA32_GDT mGdtEntries[] = {\r
+/* selector { Global Segment Descriptor } */\r
+/* 0x00 */ {{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}}, //null descriptor\r
+/* 0x08 */ {{0xffff, 0, 0, 0x2, 1, 0, 1, 0xf, 0, 0, 1, 1, 0}}, //linear data segment descriptor\r
+/* 0x10 */ {{0xffff, 0, 0, 0xf, 1, 0, 1, 0xf, 0, 0, 1, 1, 0}}, //linear code segment descriptor\r
+/* 0x18 */ {{0xffff, 0, 0, 0x3, 1, 0, 1, 0xf, 0, 0, 1, 1, 0}}, //system data segment descriptor\r
+/* 0x20 */ {{0xffff, 0, 0, 0xa, 1, 0, 1, 0xf, 0, 0, 1, 1, 0}}, //system code segment descriptor\r
+/* 0x28 */ {{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}}, //spare segment descriptor\r
+/* 0x30 */ {{0xffff, 0, 0, 0x2, 1, 0, 1, 0xf, 0, 0, 1, 1, 0}}, //system data segment descriptor\r
+/* 0x38 */ {{0xffff, 0, 0, 0xa, 1, 0, 1, 0xf, 0, 1, 0, 1, 0}}, //system code segment descriptor\r
+/* 0x40 */ {{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}}, //spare segment descriptor\r
+};\r
+\r
+//\r
+// IA32 Gdt register\r
+//\r
+GLOBAL_REMOVE_IF_UNREFERENCED IA32_DESCRIPTOR mGdt = {\r
+ sizeof (mGdtEntries) - 1,\r
+ (UINTN) mGdtEntries\r
+ };\r
+\r
+GLOBAL_REMOVE_IF_UNREFERENCED EFI_PEI_NOTIFY_DESCRIPTOR mNotifyList = {\r
+ (EFI_PEI_PPI_DESCRIPTOR_NOTIFY_CALLBACK | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),\r
+ &gEfiEndOfPeiSignalPpiGuid,\r
+ CpuMpEndOfPeiCallback\r
+};\r
+\r
+/**\r
+ Sort the APIC ID of all processors.\r
+\r
+ This function sorts the APIC ID of all processors so that processor number is\r
+ assigned in the ascending order of APIC ID which eases MP debugging.\r
+\r
+ @param PeiCpuMpData Pointer to PEI CPU MP Data\r
+**/\r
+VOID\r
+SortApicId (\r
+ IN PEI_CPU_MP_DATA *PeiCpuMpData\r
+ )\r
+{\r
+ UINTN Index1;\r
+ UINTN Index2;\r
+ UINTN Index3;\r
+ UINT32 ApicId;\r
+ PEI_CPU_DATA CpuData;\r
+ UINT32 ApCount;\r
+\r
+ ApCount = PeiCpuMpData->CpuCount - 1;\r
+\r
+ if (ApCount != 0) {\r
+ for (Index1 = 0; Index1 < ApCount; Index1++) {\r
+ Index3 = Index1;\r
+ //\r
+ // Sort key is the hardware default APIC ID\r
+ //\r
+ ApicId = PeiCpuMpData->CpuData[Index1].ApicId;\r
+ for (Index2 = Index1 + 1; Index2 <= ApCount; Index2++) {\r
+ if (ApicId > PeiCpuMpData->CpuData[Index2].ApicId) {\r
+ Index3 = Index2;\r
+ ApicId = PeiCpuMpData->CpuData[Index2].ApicId;\r
+ }\r
+ }\r
+ if (Index3 != Index1) {\r
+ CopyMem (&CpuData, &PeiCpuMpData->CpuData[Index3], sizeof (PEI_CPU_DATA));\r
+ CopyMem (\r
+ &PeiCpuMpData->CpuData[Index3],\r
+ &PeiCpuMpData->CpuData[Index1],\r
+ sizeof (PEI_CPU_DATA)\r
+ );\r
+ CopyMem (&PeiCpuMpData->CpuData[Index1], &CpuData, sizeof (PEI_CPU_DATA));\r
+ }\r
+ }\r
+\r
+ //\r
+ // Get the processor number for the BSP\r
+ //\r
+ ApicId = GetInitialApicId ();\r
+ for (Index1 = 0; Index1 < PeiCpuMpData->CpuCount; Index1++) {\r
+ if (PeiCpuMpData->CpuData[Index1].ApicId == ApicId) {\r
+ PeiCpuMpData->BspNumber = (UINT32) Index1;\r
+ break;\r
+ }\r
+ }\r
+ }\r
+}\r
+\r
+/**\r
+ Enable x2APIC mode on APs.\r
+\r
+ @param Buffer Pointer to private data buffer.\r
+**/\r
+VOID\r
+EFIAPI\r
+ApFuncEnableX2Apic (\r
+ IN OUT VOID *Buffer\r
+ )\r
+{\r
+ SetApicMode (LOCAL_APIC_MODE_X2APIC);\r
+}\r
+\r
+/**\r
+ Get AP loop mode.\r
+\r
+ @param MonitorFilterSize Returns the largest monitor-line size in bytes.\r
+\r
+ @return The AP loop mode.\r
+**/\r
+UINT8\r
+GetApLoopMode (\r
+ OUT UINT16 *MonitorFilterSize\r
+ )\r
+{\r
+ UINT8 ApLoopMode;\r
+ UINT32 RegEbx;\r
+ UINT32 RegEcx;\r
+ UINT32 RegEdx;\r
+\r
+ ASSERT (MonitorFilterSize != NULL);\r
+\r
+ ApLoopMode = PcdGet8 (PcdCpuApLoopMode);\r
+ ASSERT (ApLoopMode >= ApInHltLoop && ApLoopMode <= ApInRunLoop);\r
+ if (ApLoopMode == ApInMwaitLoop) {\r
+ AsmCpuid (CPUID_VERSION_INFO, NULL, NULL, &RegEcx, NULL);\r
+ if ((RegEcx & BIT3) == 0) {\r
+ //\r
+ // If processor does not support MONITOR/MWAIT feature\r
+ // by CPUID.[EAX=01H]:ECX.BIT3, force AP in Hlt-loop mode\r
+ //\r
+ ApLoopMode = ApInHltLoop;\r
+ }\r
+ }\r
+\r
+ if (ApLoopMode == ApInHltLoop) {\r
+ *MonitorFilterSize = 0;\r
+ } else if (ApLoopMode == ApInRunLoop) {\r
+ *MonitorFilterSize = sizeof (UINT32);\r
+ } else if (ApLoopMode == ApInMwaitLoop) {\r
+ //\r
+ // CPUID.[EAX=05H]:EBX.BIT0-15: Largest monitor-line size in bytes\r
+ // CPUID.[EAX=05H].EDX: C-states supported using MWAIT\r
+ //\r
+ AsmCpuid (CPUID_MONITOR_MWAIT, NULL, &RegEbx, NULL, &RegEdx);\r
+ *MonitorFilterSize = RegEbx & 0xFFFF;\r
+ }\r
+\r
+ return ApLoopMode;\r
+}\r
+\r
+/**\r
+ Get CPU MP Data pointer from the Guided HOB.\r
+\r
+ @return Pointer to Pointer to PEI CPU MP Data\r
+**/\r
+PEI_CPU_MP_DATA *\r
+GetMpHobData (\r
+ VOID\r
+ )\r
+{\r
+ EFI_HOB_GUID_TYPE *GuidHob;\r
+ VOID *DataInHob;\r
+ PEI_CPU_MP_DATA *CpuMpData;\r
+\r
+ CpuMpData = NULL;\r
+ GuidHob = GetFirstGuidHob (&gEfiCallerIdGuid);\r
+ if (GuidHob != NULL) {\r
+ DataInHob = GET_GUID_HOB_DATA (GuidHob);\r
+ CpuMpData = (PEI_CPU_MP_DATA *)(*(UINTN *)DataInHob);\r
+ }\r
+ ASSERT (CpuMpData != NULL);\r
+ return CpuMpData;\r
+}\r
+\r
+/**\r
+ Save the volatile registers required to be restored following INIT IPI.\r
+ \r
+ @param VolatileRegisters Returns buffer saved the volatile resisters\r
+**/\r
+VOID\r
+SaveVolatileRegisters (\r
+ OUT CPU_VOLATILE_REGISTERS *VolatileRegisters\r
+ )\r
+{\r
+ UINT32 RegEdx;\r
+\r
+ VolatileRegisters->Cr0 = AsmReadCr0 ();\r
+ VolatileRegisters->Cr3 = AsmReadCr3 ();\r
+ VolatileRegisters->Cr4 = AsmReadCr4 ();\r
+\r
+ AsmCpuid (CPUID_VERSION_INFO, NULL, NULL, NULL, &RegEdx);\r
+ if ((RegEdx & BIT2) != 0) {\r
+ //\r
+ // If processor supports Debugging Extensions feature\r
+ // by CPUID.[EAX=01H]:EDX.BIT2\r
+ //\r
+ VolatileRegisters->Dr0 = AsmReadDr0 ();\r
+ VolatileRegisters->Dr1 = AsmReadDr1 ();\r
+ VolatileRegisters->Dr2 = AsmReadDr2 ();\r
+ VolatileRegisters->Dr3 = AsmReadDr3 ();\r
+ VolatileRegisters->Dr6 = AsmReadDr6 ();\r
+ VolatileRegisters->Dr7 = AsmReadDr7 ();\r
+ }\r
+}\r
+\r
+/**\r
+ Restore the volatile registers following INIT IPI.\r
+ \r
+ @param VolatileRegisters Pointer to volatile resisters\r
+ @param IsRestoreDr TRUE: Restore DRx if supported\r
+ FALSE: Do not restore DRx\r
+**/\r
+VOID\r
+RestoreVolatileRegisters (\r
+ IN CPU_VOLATILE_REGISTERS *VolatileRegisters,\r
+ IN BOOLEAN IsRestoreDr\r
+ )\r
+{\r
+ UINT32 RegEdx;\r
+\r
+ AsmWriteCr0 (VolatileRegisters->Cr0);\r
+ AsmWriteCr3 (VolatileRegisters->Cr3);\r
+ AsmWriteCr4 (VolatileRegisters->Cr4);\r
+\r
+ if (IsRestoreDr) {\r
+ AsmCpuid (CPUID_VERSION_INFO, NULL, NULL, NULL, &RegEdx);\r
+ if ((RegEdx & BIT2) != 0) {\r
+ //\r
+ // If processor supports Debugging Extensions feature\r
+ // by CPUID.[EAX=01H]:EDX.BIT2\r
+ //\r
+ AsmWriteDr0 (VolatileRegisters->Dr0);\r
+ AsmWriteDr1 (VolatileRegisters->Dr1);\r
+ AsmWriteDr2 (VolatileRegisters->Dr2);\r
+ AsmWriteDr3 (VolatileRegisters->Dr3);\r
+ AsmWriteDr6 (VolatileRegisters->Dr6);\r
+ AsmWriteDr7 (VolatileRegisters->Dr7);\r
+ }\r
+ }\r
+}\r
+\r
+/**\r
+ This function will be called from AP reset code if BSP uses WakeUpAP.\r
+\r
+ @param ExchangeInfo Pointer to the MP exchange info buffer\r
+ @param NumApsExecuting Number of current executing AP\r
+**/\r
+VOID\r
+EFIAPI\r
+ApCFunction (\r
+ IN MP_CPU_EXCHANGE_INFO *ExchangeInfo,\r
+ IN UINTN NumApsExecuting\r
+ )\r
+{\r
+ PEI_CPU_MP_DATA *PeiCpuMpData;\r
+ UINTN ProcessorNumber;\r
+ EFI_AP_PROCEDURE Procedure;\r
+ UINTN BistData;\r
+ volatile UINT32 *ApStartupSignalBuffer;\r
+\r
+ PeiCpuMpData = ExchangeInfo->PeiCpuMpData;\r
+ while (TRUE) {\r
+ if (PeiCpuMpData->InitFlag) {\r
+ ProcessorNumber = NumApsExecuting;\r
+ //\r
+ // Sync BSP's Control registers to APs\r
+ //\r
+ RestoreVolatileRegisters (&PeiCpuMpData->CpuData[0].VolatileRegisters, FALSE);\r
+ //\r
+ // This is first time AP wakeup, get BIST information from AP stack\r
+ //\r
+ BistData = *(UINTN *) (PeiCpuMpData->Buffer + ProcessorNumber * PeiCpuMpData->CpuApStackSize - sizeof (UINTN));\r
+ PeiCpuMpData->CpuData[ProcessorNumber].Health.Uint32 = (UINT32) BistData;\r
+ PeiCpuMpData->CpuData[ProcessorNumber].ApicId = GetInitialApicId ();\r
+ if (PeiCpuMpData->CpuData[ProcessorNumber].ApicId >= 0xFF) {\r
+ //\r
+ // Set x2APIC mode if there are any logical processor reporting\r
+ // an APIC ID of 255 or greater.\r
+ //\r
+ AcquireSpinLock(&PeiCpuMpData->MpLock);\r
+ PeiCpuMpData->X2ApicEnable = TRUE;\r
+ ReleaseSpinLock(&PeiCpuMpData->MpLock);\r
+ }\r
+ //\r
+ // Sync BSP's Mtrr table to all wakeup APs and load microcode on APs.\r
+ //\r
+ MtrrSetAllMtrrs (&PeiCpuMpData->MtrrTable);\r
+ MicrocodeDetect ();\r
+ PeiCpuMpData->CpuData[ProcessorNumber].State = CpuStateIdle;\r
+ } else {\r
+ //\r
+ // Execute AP function if AP is not disabled\r
+ //\r
+ GetProcessorNumber (PeiCpuMpData, &ProcessorNumber);\r
+ if (PeiCpuMpData->ApLoopMode == ApInHltLoop) {\r
+ //\r
+ // Restore AP's volatile registers saved\r
+ //\r
+ RestoreVolatileRegisters (&PeiCpuMpData->CpuData[ProcessorNumber].VolatileRegisters, TRUE);\r
+ }\r
+\r
+ if ((PeiCpuMpData->CpuData[ProcessorNumber].State != CpuStateDisabled) &&\r
+ (PeiCpuMpData->ApFunction != 0)) {\r
+ PeiCpuMpData->CpuData[ProcessorNumber].State = CpuStateBusy;\r
+ Procedure = (EFI_AP_PROCEDURE)(UINTN)PeiCpuMpData->ApFunction;\r
+ //\r
+ // Invoke AP function here\r
+ //\r
+ Procedure ((VOID *)(UINTN)PeiCpuMpData->ApFunctionArgument);\r
+ //\r
+ // Re-get the processor number due to BSP/AP maybe exchange in AP function\r
+ //\r
+ GetProcessorNumber (PeiCpuMpData, &ProcessorNumber);\r
+ PeiCpuMpData->CpuData[ProcessorNumber].State = CpuStateIdle;\r
+ }\r
+ }\r
+\r
+ //\r
+ // AP finished executing C code\r
+ //\r
+ InterlockedIncrement ((UINT32 *)&PeiCpuMpData->FinishedCount);\r
+\r
+ //\r
+ // Place AP is specified loop mode\r
+ //\r
+ if (PeiCpuMpData->ApLoopMode == ApInHltLoop) {\r
+ //\r
+ // Save AP volatile registers\r
+ //\r
+ SaveVolatileRegisters (&PeiCpuMpData->CpuData[ProcessorNumber].VolatileRegisters);\r
+ //\r
+ // Place AP in Hlt-loop\r
+ //\r
+ while (TRUE) {\r
+ DisableInterrupts ();\r
+ CpuSleep ();\r
+ CpuPause ();\r
+ }\r
+ }\r
+ ApStartupSignalBuffer = PeiCpuMpData->CpuData[ProcessorNumber].StartupApSignal;\r
+ //\r
+ // Clear AP start-up signal\r
+ //\r
+ *ApStartupSignalBuffer = 0;\r
+ while (TRUE) {\r
+ DisableInterrupts ();\r
+ if (PeiCpuMpData->ApLoopMode == ApInMwaitLoop) {\r
+ //\r
+ // Place AP in Mwait-loop\r
+ //\r
+ AsmMonitor ((UINTN)ApStartupSignalBuffer, 0, 0);\r
+ if (*ApStartupSignalBuffer != WAKEUP_AP_SIGNAL) {\r
+ //\r
+ // If AP start-up signal is not set, place AP into\r
+ // the maximum C-state\r
+ //\r
+ AsmMwait (PeiCpuMpData->ApTargetCState << 4, 0);\r
+ }\r
+ } else if (PeiCpuMpData->ApLoopMode == ApInRunLoop) {\r
+ //\r
+ // Place AP in Run-loop\r
+ //\r
+ CpuPause ();\r
+ } else {\r
+ ASSERT (FALSE);\r
+ }\r
+\r
+ //\r
+ // If AP start-up signal is written, AP is waken up\r
+ // otherwise place AP in loop again\r
+ //\r
+ if (*ApStartupSignalBuffer == WAKEUP_AP_SIGNAL) {\r
+ break;\r
+ }\r
+ }\r
+ }\r
+}\r
+\r
+/**\r
+ This function will be called by BSP to wakeup AP.\r
+\r
+ @param PeiCpuMpData Pointer to PEI CPU MP Data\r
+ @param Broadcast TRUE: Send broadcast IPI to all APs\r
+ FALSE: Send IPI to AP by ApicId\r
+ @param ProcessorNumber The handle number of specified processor\r
+ @param Procedure The function to be invoked by AP\r
+ @param ProcedureArgument The argument to be passed into AP function\r
+**/\r
+VOID\r
+WakeUpAP (\r
+ IN PEI_CPU_MP_DATA *PeiCpuMpData,\r
+ IN BOOLEAN Broadcast,\r
+ IN UINTN ProcessorNumber,\r
+ IN EFI_AP_PROCEDURE Procedure, OPTIONAL\r
+ IN VOID *ProcedureArgument OPTIONAL\r
+ )\r
+{\r
+ volatile MP_CPU_EXCHANGE_INFO *ExchangeInfo;\r
+ UINTN Index;\r
+\r
+ PeiCpuMpData->ApFunction = (UINTN) Procedure;\r
+ PeiCpuMpData->ApFunctionArgument = (UINTN) ProcedureArgument;\r
+ PeiCpuMpData->FinishedCount = 0;\r
+\r
+ ExchangeInfo = PeiCpuMpData->MpCpuExchangeInfo;\r
+ ExchangeInfo->Lock = 0;\r
+ ExchangeInfo->StackStart = PeiCpuMpData->Buffer;\r
+ ExchangeInfo->StackSize = PeiCpuMpData->CpuApStackSize;\r
+ ExchangeInfo->BufferStart = PeiCpuMpData->WakeupBuffer;\r
+ ExchangeInfo->PmodeOffset = PeiCpuMpData->AddressMap.PModeEntryOffset;\r
+ ExchangeInfo->LmodeOffset = PeiCpuMpData->AddressMap.LModeEntryOffset;\r
+ ExchangeInfo->Cr3 = AsmReadCr3 ();\r
+ ExchangeInfo->CFunction = (UINTN) ApCFunction;\r
+ ExchangeInfo->NumApsExecuting = 0;\r
+ ExchangeInfo->PeiCpuMpData = PeiCpuMpData;\r
+\r
+ //\r
+ // Get the BSP's data of GDT and IDT\r
+ //\r
+ CopyMem ((VOID *)&ExchangeInfo->GdtrProfile, &mGdt, sizeof(mGdt));\r
+ AsmReadIdtr ((IA32_DESCRIPTOR *) &ExchangeInfo->IdtrProfile);\r
+\r
+ if (PeiCpuMpData->ApLoopMode == ApInMwaitLoop) {\r
+ //\r
+ // Get AP target C-state each time when waking up AP,\r
+ // for it maybe updated by platform again\r
+ //\r
+ PeiCpuMpData->ApTargetCState = PcdGet8 (PcdCpuApTargetCstate);\r
+ }\r
+\r
+ //\r
+ // Wakeup APs per AP loop state\r
+ //\r
+ if (PeiCpuMpData->ApLoopMode == ApInHltLoop || PeiCpuMpData->InitFlag) {\r
+ if (Broadcast) {\r
+ SendInitSipiSipiAllExcludingSelf ((UINT32) ExchangeInfo->BufferStart);\r
+ } else {\r
+ SendInitSipiSipi (\r
+ PeiCpuMpData->CpuData[ProcessorNumber].ApicId,\r
+ (UINT32) ExchangeInfo->BufferStart\r
+ );\r
+ }\r
+ } else if ((PeiCpuMpData->ApLoopMode == ApInMwaitLoop) ||\r
+ (PeiCpuMpData->ApLoopMode == ApInRunLoop)) {\r
+ if (Broadcast) {\r
+ for (Index = 0; Index < PeiCpuMpData->CpuCount; Index++) {\r
+ if (Index != PeiCpuMpData->BspNumber) {\r
+ *(PeiCpuMpData->CpuData[Index].StartupApSignal) = WAKEUP_AP_SIGNAL;\r
+ }\r
+ }\r
+ } else {\r
+ *(PeiCpuMpData->CpuData[ProcessorNumber].StartupApSignal) = WAKEUP_AP_SIGNAL;\r
+ }\r
+ } else {\r
+ ASSERT (FALSE);\r
+ }\r
+ return ;\r
+}\r
+\r
+/**\r
+ Get available system memory below 1MB by specified size.\r
+\r
+ @param WakeupBufferSize Wakeup buffer size required\r
+\r
+ @retval other Return wakeup buffer address below 1MB.\r
+ @retval -1 Cannot find free memory below 1MB.\r
+**/\r
+UINTN\r
+GetWakeupBuffer (\r
+ IN UINTN WakeupBufferSize\r
+ )\r
+{\r
+ EFI_PEI_HOB_POINTERS Hob;\r
+ UINTN WakeupBufferStart;\r
+ UINTN WakeupBufferEnd;\r
+\r
+ //\r
+ // Get the HOB list for processing\r
+ //\r
+ Hob.Raw = GetHobList ();\r
+\r
+ //\r
+ // Collect memory ranges\r
+ //\r
+ while (!END_OF_HOB_LIST (Hob)) {\r
+ if (Hob.Header->HobType == EFI_HOB_TYPE_RESOURCE_DESCRIPTOR) {\r
+ if ((Hob.ResourceDescriptor->PhysicalStart < BASE_1MB) &&\r
+ (Hob.ResourceDescriptor->ResourceType == EFI_RESOURCE_SYSTEM_MEMORY) &&\r
+ ((Hob.ResourceDescriptor->ResourceAttribute &\r
+ (EFI_RESOURCE_ATTRIBUTE_READ_PROTECTED |\r
+ EFI_RESOURCE_ATTRIBUTE_WRITE_PROTECTED |\r
+ EFI_RESOURCE_ATTRIBUTE_EXECUTION_PROTECTED\r
+ )) == 0)\r
+ ) {\r
+ //\r
+ // Need memory under 1MB to be collected here\r
+ //\r
+ WakeupBufferEnd = (UINTN) (Hob.ResourceDescriptor->PhysicalStart + Hob.ResourceDescriptor->ResourceLength);\r
+ if (WakeupBufferEnd > BASE_1MB) {\r
+ //\r
+ // Wakeup buffer should be under 1MB\r
+ //\r
+ WakeupBufferEnd = BASE_1MB;\r
+ }\r
+ //\r
+ // Wakeup buffer should be aligned on 4KB\r
+ //\r
+ WakeupBufferStart = (WakeupBufferEnd - WakeupBufferSize) & ~(SIZE_4KB - 1);\r
+ if (WakeupBufferStart < Hob.ResourceDescriptor->PhysicalStart) {\r
+ continue;\r
+ }\r
+ //\r
+ // Create a memory allocation HOB.\r
+ //\r
+ BuildMemoryAllocationHob (\r
+ WakeupBufferStart,\r
+ WakeupBufferSize,\r
+ EfiBootServicesData\r
+ );\r
+ return WakeupBufferStart;\r
+ }\r
+ }\r
+ //\r
+ // Find the next HOB\r
+ //\r
+ Hob.Raw = GET_NEXT_HOB (Hob);\r
+ }\r
+\r
+ return (UINTN) -1;\r
+}\r
+\r
+/**\r
+ Get available system memory below 1MB by specified size.\r
+\r
+ @param PeiCpuMpData Pointer to PEI CPU MP Data\r
+**/\r
+VOID\r
+BackupAndPrepareWakeupBuffer(\r
+ IN PEI_CPU_MP_DATA *PeiCpuMpData\r
+ )\r
+{\r
+ CopyMem (\r
+ (VOID *) PeiCpuMpData->BackupBuffer,\r
+ (VOID *) PeiCpuMpData->WakeupBuffer,\r
+ PeiCpuMpData->BackupBufferSize\r
+ );\r
+ CopyMem (\r
+ (VOID *) PeiCpuMpData->WakeupBuffer,\r
+ (VOID *) PeiCpuMpData->AddressMap.RendezvousFunnelAddress,\r
+ PeiCpuMpData->AddressMap.RendezvousFunnelSize\r
+ );\r
+}\r
+\r
+/**\r
+ Restore wakeup buffer data.\r
+\r
+ @param PeiCpuMpData Pointer to PEI CPU MP Data\r
+**/\r
+VOID\r
+RestoreWakeupBuffer(\r
+ IN PEI_CPU_MP_DATA *PeiCpuMpData\r
+ )\r
+{\r
+ CopyMem ((VOID *) PeiCpuMpData->WakeupBuffer, (VOID *) PeiCpuMpData->BackupBuffer, PeiCpuMpData->BackupBufferSize);\r
+}\r
+\r
+/**\r
+ This function will get CPU count in the system.\r
+\r
+ @param PeiCpuMpData Pointer to PEI CPU MP Data\r
+\r
+ @return AP processor count\r
+**/\r
+UINT32\r
+CountProcessorNumber (\r
+ IN PEI_CPU_MP_DATA *PeiCpuMpData\r
+ )\r
+{\r
+ //\r
+ // Load Microcode on BSP\r
+ //\r
+ MicrocodeDetect ();\r
+ //\r
+ // Store BSP's MTRR setting\r
+ //\r
+ MtrrGetAllMtrrs (&PeiCpuMpData->MtrrTable);\r
+\r
+ //\r
+ // Only perform AP detection if PcdCpuMaxLogicalProcessorNumber is greater than 1\r
+ //\r
+ if (PcdGet32 (PcdCpuMaxLogicalProcessorNumber) > 1) {\r
+ //\r
+ // Send 1st broadcast IPI to APs to wakeup APs\r
+ //\r
+ PeiCpuMpData->InitFlag = TRUE;\r
+ PeiCpuMpData->X2ApicEnable = FALSE;\r
+ WakeUpAP (PeiCpuMpData, TRUE, 0, NULL, NULL);\r
+ //\r
+ // Wait for AP task to complete and then exit.\r
+ //\r
+ MicroSecondDelay (PcdGet32 (PcdCpuApInitTimeOutInMicroSeconds));\r
+ PeiCpuMpData->InitFlag = FALSE;\r
+ PeiCpuMpData->CpuCount += (UINT32)PeiCpuMpData->MpCpuExchangeInfo->NumApsExecuting;\r
+ ASSERT (PeiCpuMpData->CpuCount <= PcdGet32 (PcdCpuMaxLogicalProcessorNumber));\r
+ //\r
+ // Wait for all APs finished the initialization\r
+ //\r
+ while (PeiCpuMpData->FinishedCount < (PeiCpuMpData->CpuCount - 1)) {\r
+ CpuPause ();\r
+ }\r
+\r
+ if (PeiCpuMpData->X2ApicEnable) {\r
+ DEBUG ((EFI_D_INFO, "Force x2APIC mode!\n"));\r
+ //\r
+ // Wakeup all APs to enable x2APIC mode\r
+ //\r
+ WakeUpAP (PeiCpuMpData, TRUE, 0, ApFuncEnableX2Apic, NULL);\r
+ //\r
+ // Wait for all known APs finished\r
+ //\r
+ while (PeiCpuMpData->FinishedCount < (PeiCpuMpData->CpuCount - 1)) {\r
+ CpuPause ();\r
+ }\r
+ //\r
+ // Enable x2APIC on BSP\r
+ //\r
+ SetApicMode (LOCAL_APIC_MODE_X2APIC);\r
+ }\r
+ DEBUG ((EFI_D_INFO, "APIC MODE is %d\n", GetApicMode ()));\r
+ //\r
+ // Sort BSP/Aps by CPU APIC ID in ascending order\r
+ //\r
+ SortApicId (PeiCpuMpData);\r
+ }\r
+\r
+ DEBUG ((EFI_D_INFO, "CpuMpPei: Find %d processors in system.\n", PeiCpuMpData->CpuCount));\r
+ return PeiCpuMpData->CpuCount;\r
+}\r
+\r
+/**\r
+ Prepare for AP wakeup buffer and copy AP reset code into it.\r
+\r
+ Get wakeup buffer below 1MB. Allocate memory for CPU MP Data and APs Stack.\r
+\r
+ @return Pointer to PEI CPU MP Data\r
+**/\r
+PEI_CPU_MP_DATA *\r
+PrepareAPStartupVector (\r
+ VOID\r
+ )\r
+{\r
+ EFI_STATUS Status;\r
+ UINT32 MaxCpuCount;\r
+ PEI_CPU_MP_DATA *PeiCpuMpData;\r
+ EFI_PHYSICAL_ADDRESS Buffer;\r
+ UINTN BufferSize;\r
+ UINTN WakeupBuffer;\r
+ UINTN WakeupBufferSize;\r
+ MP_ASSEMBLY_ADDRESS_MAP AddressMap;\r
+ UINT8 ApLoopMode;\r
+ UINT16 MonitorFilterSize;\r
+ UINT8 *MonitorBuffer;\r
+ UINTN Index;\r
+\r
+ AsmGetAddressMap (&AddressMap);\r
+ WakeupBufferSize = AddressMap.RendezvousFunnelSize + sizeof (MP_CPU_EXCHANGE_INFO);\r
+ WakeupBuffer = GetWakeupBuffer ((WakeupBufferSize + SIZE_4KB - 1) & ~(SIZE_4KB - 1));\r
+ ASSERT (WakeupBuffer != (UINTN) -1);\r
+ DEBUG ((EFI_D_INFO, "CpuMpPei: WakeupBuffer = 0x%x\n", WakeupBuffer));\r
+\r
+ //\r
+ // Allocate Pages for APs stack, CPU MP Data, backup buffer for wakeup buffer,\r
+ // and monitor buffer if required.\r
+ //\r
+ MaxCpuCount = PcdGet32(PcdCpuMaxLogicalProcessorNumber);\r
+ BufferSize = PcdGet32 (PcdCpuApStackSize) * MaxCpuCount + sizeof (PEI_CPU_MP_DATA)\r
+ + WakeupBufferSize + sizeof (PEI_CPU_DATA) * MaxCpuCount;\r
+ ApLoopMode = GetApLoopMode (&MonitorFilterSize);\r
+ BufferSize += MonitorFilterSize * MaxCpuCount;\r
+ Status = PeiServicesAllocatePages (\r
+ EfiBootServicesData,\r
+ EFI_SIZE_TO_PAGES (BufferSize),\r
+ &Buffer\r
+ );\r
+ ASSERT_EFI_ERROR (Status);\r
+\r
+ PeiCpuMpData = (PEI_CPU_MP_DATA *) (UINTN) (Buffer + PcdGet32 (PcdCpuApStackSize) * MaxCpuCount);\r
+ PeiCpuMpData->Buffer = (UINTN) Buffer;\r
+ PeiCpuMpData->CpuApStackSize = PcdGet32 (PcdCpuApStackSize);\r
+ PeiCpuMpData->WakeupBuffer = WakeupBuffer;\r
+ PeiCpuMpData->BackupBuffer = (UINTN)PeiCpuMpData + sizeof (PEI_CPU_MP_DATA);\r
+ PeiCpuMpData->BackupBufferSize = WakeupBufferSize;\r
+ PeiCpuMpData->MpCpuExchangeInfo = (MP_CPU_EXCHANGE_INFO *) (UINTN) (WakeupBuffer + AddressMap.RendezvousFunnelSize);\r
+\r
+ PeiCpuMpData->CpuCount = 1;\r
+ PeiCpuMpData->BspNumber = 0;\r
+ PeiCpuMpData->CpuData = (PEI_CPU_DATA *) (PeiCpuMpData->BackupBuffer +\r
+ PeiCpuMpData->BackupBufferSize);\r
+ PeiCpuMpData->CpuData[0].ApicId = GetInitialApicId ();\r
+ PeiCpuMpData->CpuData[0].Health.Uint32 = 0;\r
+ PeiCpuMpData->EndOfPeiFlag = FALSE;\r
+ InitializeSpinLock(&PeiCpuMpData->MpLock);\r
+ SaveVolatileRegisters (&PeiCpuMpData->CpuData[0].VolatileRegisters);\r
+ CopyMem (&PeiCpuMpData->AddressMap, &AddressMap, sizeof (MP_ASSEMBLY_ADDRESS_MAP));\r
+ //\r
+ // Initialize AP loop mode\r
+ //\r
+ PeiCpuMpData->ApLoopMode = ApLoopMode;\r
+ DEBUG ((EFI_D_INFO, "AP Loop Mode is %d\n", PeiCpuMpData->ApLoopMode));\r
+ MonitorBuffer = (UINT8 *)(PeiCpuMpData->CpuData + MaxCpuCount);\r
+ if (PeiCpuMpData->ApLoopMode != ApInHltLoop) {\r
+ //\r
+ // Set up APs wakeup signal buffer\r
+ //\r
+ for (Index = 0; Index < MaxCpuCount; Index++) {\r
+ PeiCpuMpData->CpuData[Index].StartupApSignal = \r
+ (UINT32 *)(MonitorBuffer + MonitorFilterSize * Index);\r
+ }\r
+ }\r
+ //\r
+ // Backup original data and copy AP reset code in it\r
+ //\r
+ BackupAndPrepareWakeupBuffer(PeiCpuMpData);\r
+\r
+ return PeiCpuMpData;\r
+}\r
+\r
+/**\r
+ Notify function on End Of Pei PPI.\r
+\r
+ On S3 boot, this function will restore wakeup buffer data.\r
+ On normal boot, this function will flag wakeup buffer to be un-used type.\r
+\r
+ @param PeiServices The pointer to the PEI Services Table.\r
+ @param NotifyDescriptor Address of the notification descriptor data structure.\r
+ @param Ppi Address of the PPI that was installed.\r
+\r
+ @retval EFI_SUCCESS When everything is OK.\r
+\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+CpuMpEndOfPeiCallback (\r
+ IN EFI_PEI_SERVICES **PeiServices,\r
+ IN EFI_PEI_NOTIFY_DESCRIPTOR *NotifyDescriptor,\r
+ IN VOID *Ppi\r
+ )\r
+{\r
+ EFI_STATUS Status;\r
+ EFI_BOOT_MODE BootMode;\r
+ PEI_CPU_MP_DATA *PeiCpuMpData;\r
+ EFI_PEI_HOB_POINTERS Hob;\r
+ EFI_HOB_MEMORY_ALLOCATION *MemoryHob;\r
+\r
+ DEBUG ((EFI_D_INFO, "CpuMpPei: CpuMpEndOfPeiCallback () invoked\n"));\r
+\r
+ Status = PeiServicesGetBootMode (&BootMode);\r
+ ASSERT_EFI_ERROR (Status);\r
+\r
+ PeiCpuMpData = GetMpHobData ();\r
+ ASSERT (PeiCpuMpData != NULL);\r
+\r
+ if (BootMode != BOOT_ON_S3_RESUME) {\r
+ //\r
+ // Get the HOB list for processing\r
+ //\r
+ Hob.Raw = GetHobList ();\r
+ //\r
+ // Collect memory ranges\r
+ //\r
+ while (!END_OF_HOB_LIST (Hob)) {\r
+ if (Hob.Header->HobType == EFI_HOB_TYPE_MEMORY_ALLOCATION) {\r
+ MemoryHob = Hob.MemoryAllocation;\r
+ if(MemoryHob->AllocDescriptor.MemoryBaseAddress == PeiCpuMpData->WakeupBuffer) {\r
+ //\r
+ // Flag this HOB type to un-used\r
+ //\r
+ GET_HOB_TYPE (Hob) = EFI_HOB_TYPE_UNUSED;\r
+ break;\r
+ }\r
+ }\r
+ Hob.Raw = GET_NEXT_HOB (Hob);\r
+ }\r
+ } else {\r
+ RestoreWakeupBuffer (PeiCpuMpData);\r
+ PeiCpuMpData->EndOfPeiFlag = TRUE;\r
+ }\r
+ return EFI_SUCCESS;\r
+}\r
+\r
+/**\r
+ The Entry point of the MP CPU PEIM.\r
+\r
+ This function will wakeup APs and collect CPU AP count and install the\r
+ Mp Service Ppi.\r
+\r
+ @param FileHandle Handle of the file being invoked.\r
+ @param PeiServices Describes the list of possible PEI Services.\r
+\r
+ @retval EFI_SUCCESS MpServicePpi is installed successfully.\r
+\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+CpuMpPeimInit (\r
+ IN EFI_PEI_FILE_HANDLE FileHandle,\r
+ IN CONST EFI_PEI_SERVICES **PeiServices\r
+ )\r
+{\r
+ EFI_STATUS Status;\r
+ PEI_CPU_MP_DATA *PeiCpuMpData;\r
+ UINT32 ProcessorCount;\r
+\r
+ //\r
+ // Load new GDT table on BSP\r
+ //\r
+ AsmInitializeGdt (&mGdt);\r
+ //\r
+ // Get wakeup buffer and copy AP reset code in it\r
+ //\r
+ PeiCpuMpData = PrepareAPStartupVector ();\r
+ //\r
+ // Count processor number and collect processor information\r
+ //\r
+ ProcessorCount = CountProcessorNumber (PeiCpuMpData);\r
+ //\r
+ // Build location of PEI CPU MP DATA buffer in HOB\r
+ //\r
+ BuildGuidDataHob (\r
+ &gEfiCallerIdGuid,\r
+ (VOID *)&PeiCpuMpData,\r
+ sizeof(UINT64)\r
+ );\r
+ //\r
+ // Update and publish CPU BIST information\r
+ //\r
+ CollectBistDataFromPpi (PeiServices, PeiCpuMpData);\r
+ //\r
+ // register an event for EndOfPei\r
+ //\r
+ Status = PeiServicesNotifyPpi (&mNotifyList);\r
+ ASSERT_EFI_ERROR (Status);\r
+ //\r
+ // Install CPU MP PPI\r
+ //\r
+ Status = PeiServicesInstallPpi(&mPeiCpuMpPpiDesc);\r
+ ASSERT_EFI_ERROR (Status);\r
+\r
+ return Status;\r
+}\r
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