UefiCpuPkg/LocalApic.h: Remove duplicated/conflicted definitions

[mirror_edk2.git] / UefiCpuPkg / Library / BaseXApicX2ApicLib / BaseXApicX2ApicLib.c

diff --git a/UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c b/UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c
index 38f5370cc3dfd5b6e8e01b67e4cba8f2f5b0afe9..4c4269612746c2840b5c792ce3b85c2f9ee7b622 100644 (file)
--- a/UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c
+++ b/UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c
@@ -4,7 +4,7 @@
   This local APIC library instance supports x2APIC capable processors\r
   which have xAPIC and x2APIC modes.\r
 \r
-  Copyright (c) 2010 - 2015, Intel Corporation. All rights reserved.<BR>\r
+  Copyright (c) 2010 - 2016, Intel Corporation. All rights reserved.<BR>\r
   This program and the accompanying materials\r
   are licensed and made available under the terms and conditions of the BSD License\r
   which accompanies this distribution.  The full text of the license may be found at\r
@@ -16,6 +16,7 @@
 **/\r
 \r
 #include <Register/Cpuid.h>\r
+#include <Register/Msr.h>\r
 #include <Register/LocalApic.h>\r
 \r
 #include <Library/BaseLib.h>\r
@@ -68,7 +69,7 @@ GetLocalApicBaseAddress (
   VOID\r
   )\r
 {\r
-  MSR_IA32_APIC_BASE  ApicBaseMsr;\r
+  MSR_IA32_APIC_BASE_REGISTER  ApicBaseMsr;\r
 \r
   if (!LocalApicBaseAddressMsrSupported ()) {\r
     //\r
@@ -78,10 +79,10 @@ GetLocalApicBaseAddress (
     return PcdGet32 (PcdCpuLocalApicBaseAddress);\r
   }\r
 \r
-  ApicBaseMsr.Uint64 = AsmReadMsr64 (MSR_IA32_APIC_BASE_ADDRESS);\r
+  ApicBaseMsr.Uint64 = AsmReadMsr64 (MSR_IA32_APIC_BASE);\r
   \r
-  return (UINTN)(LShiftU64 ((UINT64) ApicBaseMsr.Bits.ApicBaseHigh, 32)) +\r
-           (((UINTN)ApicBaseMsr.Bits.ApicBaseLow) << 12);\r
+  return (UINTN)(LShiftU64 ((UINT64) ApicBaseMsr.Bits.ApicBaseHi, 32)) +\r
+           (((UINTN)ApicBaseMsr.Bits.ApicBase) << 12);\r
 }\r
 \r
 /**\r
@@ -98,7 +99,7 @@ SetLocalApicBaseAddress (
   IN UINTN                BaseAddress\r
   )\r
 {\r
-  MSR_IA32_APIC_BASE  ApicBaseMsr;\r
+  MSR_IA32_APIC_BASE_REGISTER  ApicBaseMsr;\r
 \r
   ASSERT ((BaseAddress & (SIZE_4KB - 1)) == 0);\r
 \r
@@ -109,12 +110,12 @@ SetLocalApicBaseAddress (
     return;\r
   }\r
 \r
-  ApicBaseMsr.Uint64 = AsmReadMsr64 (MSR_IA32_APIC_BASE_ADDRESS);\r
+  ApicBaseMsr.Uint64 = AsmReadMsr64 (MSR_IA32_APIC_BASE);\r
 \r
-  ApicBaseMsr.Bits.ApicBaseLow  = (UINT32) (BaseAddress >> 12);\r
-  ApicBaseMsr.Bits.ApicBaseHigh = (UINT32) (RShiftU64((UINT64) BaseAddress, 32));\r
+  ApicBaseMsr.Bits.ApicBase   = (UINT32) (BaseAddress >> 12);\r
+  ApicBaseMsr.Bits.ApicBaseHi = (UINT32) (RShiftU64((UINT64) BaseAddress, 32));\r
 \r
-  AsmWriteMsr64 (MSR_IA32_APIC_BASE_ADDRESS, ApicBaseMsr.Uint64);\r
+  AsmWriteMsr64 (MSR_IA32_APIC_BASE, ApicBaseMsr.Uint64);\r
 }\r
 \r
 /**\r
@@ -301,7 +302,7 @@ GetApicMode (
   VOID\r
   )\r
 {\r
-  MSR_IA32_APIC_BASE  ApicBaseMsr;\r
+  MSR_IA32_APIC_BASE_REGISTER  ApicBaseMsr;\r
 \r
   if (!LocalApicBaseAddressMsrSupported ()) {\r
     //\r
@@ -310,12 +311,12 @@ GetApicMode (
     return LOCAL_APIC_MODE_XAPIC;\r
   }\r
 \r
-  ApicBaseMsr.Uint64 = AsmReadMsr64 (MSR_IA32_APIC_BASE_ADDRESS);\r
+  ApicBaseMsr.Uint64 = AsmReadMsr64 (MSR_IA32_APIC_BASE);\r
   //\r
   // Local APIC should have been enabled\r
   //\r
-  ASSERT (ApicBaseMsr.Bits.En != 0);\r
-  if (ApicBaseMsr.Bits.Extd != 0) {\r
+  ASSERT (ApicBaseMsr.Bits.EN != 0);\r
+  if (ApicBaseMsr.Bits.EXTD != 0) {\r
     return LOCAL_APIC_MODE_X2APIC;\r
   } else {\r
     return LOCAL_APIC_MODE_XAPIC;\r
@@ -339,8 +340,8 @@ SetApicMode (
   IN UINTN  ApicMode\r
   )\r
 {\r
-  UINTN               CurrentMode;\r
-  MSR_IA32_APIC_BASE  ApicBaseMsr;\r
+  UINTN                        CurrentMode;\r
+  MSR_IA32_APIC_BASE_REGISTER  ApicBaseMsr;\r
 \r
   if (!LocalApicBaseAddressMsrSupported ()) {\r
     //\r
@@ -355,9 +356,9 @@ SetApicMode (
       case LOCAL_APIC_MODE_XAPIC:\r
         break;\r
       case LOCAL_APIC_MODE_X2APIC:\r
-        ApicBaseMsr.Uint64 = AsmReadMsr64 (MSR_IA32_APIC_BASE_ADDRESS);\r
-        ApicBaseMsr.Bits.Extd = 1;\r
-        AsmWriteMsr64 (MSR_IA32_APIC_BASE_ADDRESS, ApicBaseMsr.Uint64);\r
+        ApicBaseMsr.Uint64 = AsmReadMsr64 (MSR_IA32_APIC_BASE);\r
+        ApicBaseMsr.Bits.EXTD = 1;\r
+        AsmWriteMsr64 (MSR_IA32_APIC_BASE, ApicBaseMsr.Uint64);\r
         break;\r
       default:\r
         ASSERT (FALSE);\r
@@ -369,12 +370,12 @@ SetApicMode (
         //  Transition from x2APIC mode to xAPIC mode is a two-step process:\r
         //    x2APIC -> Local APIC disabled -> xAPIC\r
         //\r
-        ApicBaseMsr.Uint64 = AsmReadMsr64 (MSR_IA32_APIC_BASE_ADDRESS);\r
-        ApicBaseMsr.Bits.Extd = 0;\r
-        ApicBaseMsr.Bits.En = 0;\r
-        AsmWriteMsr64 (MSR_IA32_APIC_BASE_ADDRESS, ApicBaseMsr.Uint64);\r
-        ApicBaseMsr.Bits.En = 1;\r
-        AsmWriteMsr64 (MSR_IA32_APIC_BASE_ADDRESS, ApicBaseMsr.Uint64);\r
+        ApicBaseMsr.Uint64 = AsmReadMsr64 (MSR_IA32_APIC_BASE);\r
+        ApicBaseMsr.Bits.EXTD = 0;\r
+        ApicBaseMsr.Bits.EN = 0;\r
+        AsmWriteMsr64 (MSR_IA32_APIC_BASE, ApicBaseMsr.Uint64);\r
+        ApicBaseMsr.Bits.EN = 1;\r
+        AsmWriteMsr64 (MSR_IA32_APIC_BASE, ApicBaseMsr.Uint64);\r
         break;\r
       case LOCAL_APIC_MODE_X2APIC:\r
         break;\r