UefiCpuPkg/CpuCommonFeaturesLib: Register MSR base on scope Info.

[mirror_edk2.git] / UefiCpuPkg / Library / CpuCommonFeaturesLib / FeatureControl.c

diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/FeatureControl.c b/UefiCpuPkg/Library/CpuCommonFeaturesLib/FeatureControl.c
index d28c4ec51a04164480ffbae86a01f457151eee84..8c1eb5eb4f80a1996b177a8b2ee4d559a8598d23 100644 (file)
--- a/UefiCpuPkg/Library/CpuCommonFeaturesLib/FeatureControl.c
+++ b/UefiCpuPkg/Library/CpuCommonFeaturesLib/FeatureControl.c
@@ -96,6 +96,19 @@ VmxInitialize (
 {\r
   MSR_IA32_FEATURE_CONTROL_REGISTER    *MsrRegister;\r
 \r
+  //\r
+  // The scope of EnableVmxOutsideSmx bit in the MSR_IA32_FEATURE_CONTROL is core for\r
+  // below processor type, only program MSR_IA32_FEATURE_CONTROL for thread 0 in each\r
+  // core.\r
+  //\r
+  if (IS_SILVERMONT_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel) ||\r
+      IS_GOLDMONT_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel) ||\r
+      IS_GOLDMONT_PLUS_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel)) {\r
+    if (CpuInfo->ProcessorInfo.Location.Thread != 0) {\r
+      return RETURN_SUCCESS;\r
+    }\r
+  }\r
+\r
   ASSERT (ConfigData != NULL);\r
   MsrRegister = (MSR_IA32_FEATURE_CONTROL_REGISTER *) ConfigData;\r
   if (MsrRegister[ProcessorNumber].Bits.Lock == 0) {\r
@@ -171,6 +184,19 @@ LockFeatureControlRegisterInitialize (
 {\r
   MSR_IA32_FEATURE_CONTROL_REGISTER    *MsrRegister;\r
 \r
+  //\r
+  // The scope of Lock bit in the MSR_IA32_FEATURE_CONTROL is core for\r
+  // below processor type, only program MSR_IA32_FEATURE_CONTROL for thread 0 in each\r
+  // core.\r
+  //\r
+  if (IS_SILVERMONT_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel) ||\r
+      IS_GOLDMONT_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel) ||\r
+      IS_GOLDMONT_PLUS_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel)) {\r
+    if (CpuInfo->ProcessorInfo.Location.Thread != 0) {\r
+      return RETURN_SUCCESS;\r
+    }\r
+  }\r
+\r
   ASSERT (ConfigData != NULL);\r
   MsrRegister = (MSR_IA32_FEATURE_CONTROL_REGISTER *) ConfigData;\r
   if (MsrRegister[ProcessorNumber].Bits.Lock == 0) {\r
@@ -248,6 +274,18 @@ SmxInitialize (
   MSR_IA32_FEATURE_CONTROL_REGISTER    *MsrRegister;\r
   RETURN_STATUS                        Status;\r
 \r
+  //\r
+  // The scope of Lock bit in the MSR_IA32_FEATURE_CONTROL is core for\r
+  // below processor type, only program MSR_IA32_FEATURE_CONTROL for thread 0 in each\r
+  // core.\r
+  //\r
+  if (IS_GOLDMONT_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel) ||\r
+      IS_GOLDMONT_PLUS_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel)) {\r
+    if (CpuInfo->ProcessorInfo.Location.Thread != 0) {\r
+      return RETURN_SUCCESS;\r
+    }\r
+  }\r
+\r
   Status = RETURN_SUCCESS;\r
 \r
   if (State && (!IsCpuFeatureInSetting (CPU_FEATURE_VMX))) {\r